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CD4053BDTR

CD4053BDTR

  • 厂商:

    XBLW(芯伯乐)

  • 封装:

    SOP16

  • 描述:

    3路二选一模拟开关,工作电压(Vcc) 3-9V,静态电流20uA

  • 数据手册
  • 价格&库存
CD4053BDTR 数据手册
CD4052 XBLW CD4053 Triple 2-channel Analog Multiplexer/Demultiplexer General Description The CD40 5 3 is a triple single- pole double- throw ( SPDT) analog switch, suitable for use as an analog or digital two multiplexer/demultiplexer. Each switch has a digital select input ( Sn) , independent inputs/ outputs ( nY0 and nY1) and a common input/ output ( nZ) . All three — — switches share an enable input ( E) . A HIGH on E causes all switches into the high- impedance OFF- state, independent of Sn. VDD and VSS are the supply voltage connections for the digital control inputs ( Sn and — E) . The VDD to VSS range is 3 V to 9 V. The analog inputs/ outputs ( nY0 , nY1 , and nZ) can swing between VDD as a positive limit and VEE connected to VDD, VSS, VEE as a negative limit. VDD- VEE may not exceed 9 V. Unused inputs must be or another input. For operation as a digital multiplexer/ demultiplexer, is connected to VSS ( typically ground) . VEE and VSS are the supply voltage connections for the switches. Features       Wide supply voltage range from 3V to 9V Fully static operation 5 V and 9V parametric ratings Standardized symmetrical output characteristics Specified from - 40 C to + 85 C Packaging information: DIP16/ SOP16/ TSSOP16 Ordering Information Product Model Package Type Marking Packing Packing Qty CD4053BE DIP-16 CD4053BE Tube 1000/Box CD4053BDTR SOP-16 CD4053B Tape 2500/Reel CD4053BTDTR TSSOP-16 CD4053B Tape 3000/Reel XBLWversion1.0 文档仅供参考,实际应用测试为准 www.xinboleic.com 技术支持热线:4009682003 第 1 页 共 12 页 CD4052 XBLW CD4053 Triple 2-channel Analog Multiplexer/Demultiplexer 2、Block Diagram And Pin Description 2.1 Block Diagram Figure 1 . Logic symbol Figure 2 . Functional diagram Figure 3 . Logic diagram ( one multiplexer/ demultiplexer) XBLWversion1.0 文档仅供参考,实际应用测试为准 www.xinboleic.com 技术支持热线:4009682003 第 2 页 共 12 页 CD4052 XBLW CD4053 Triple 2-channel Analog Multiplexer/Demultiplexer Figure 4 . Schematic diagram ( one switch) 2.2 Pin Configurations 2.3 Pin Description Pin No. 1 Pin Name 2Y1 Description independent input or output 2 2Y0 independent input or output 3 3Y1 independent input or output 4 3Z independent output or input 5 3Y0 independent input or output 6 — E enable input (active LOW) 7 VEE supply voltage 8 ground (0V) 9 VSS S3 10 S2 select input 11 S1 select input 12 1Y0 independent input or output 13 1Y1 independent input or output 14 1Z independent output or input 15 2Z independent output or input 16 VDD supply voltage select input 2.4 Function Table Input — E Channel ON Sn L L L H H X Note: H=HIGH voltage level; L=LOW voltage level; X=don’t care. XBLWversion1.0 nY0 to nZ nY1 to nZ switches off 文档仅供参考,实际应用测试为准 www.xinboleic.com 技术支持热线:4009682003 第 3 页 共 12 页 CD4052 XBLW CD4053 Triple 2-channel Analog Multiplexer/Demultiplexer 3 Electrical Parameter 3.1 Absolute Maximum Ratings (Voltages are referenced to VSS (ground=0V), unless otherwise specified.) Parameter supply voltage power supply range Symbol VDD VDD- VEE IQ VI Conditions Min. -0.5 -0.5 - Max. +12 +12 2 VDD+0.5 VDD-VEE=12V static current input voltage -0.5 output high voltage |IIH | 1 VDD=5V, VI=VDD current output low voltage |IIL | 1 VDD=5V, VI=0V current input and output VEE-0.5 VDD+0.5 VIO voltage rage input clamping IIK VIVDD+0.5V ±20 current input and output IIOK VIOVDD+0.5V ±20 clamp current switch conduction IT VO=-0.5V to VDD+0.5V ±25 current VDD or GND IDD, IGND ±50 current storage temperature -65 Tstg +150 total power 500 Ptot dissipation DIP 245 Soldering 10s TL temperature SOP 250 Note: [1] For DIP16 packages: above 70C the value of Ptot derates linearly with 12mW/K. [2] For SOP16 packages: above 70C the value of Ptot derates linearly with 8mW/K. [3] For (T)SSOP16 packages: above 60C the value of Ptot derates linearly with 5.5mW/K. 3.2 Recommended Operating Conditions Unit V V uA V uA uA V mA mA mA mA C mW C C — (Tamb=25C; RL=10kΩ; CL=50pF; E=VDD ; Vis=VDD=5V.) Parameter supply voltage ambient temperature supply voltage supply voltage input voltage input and output voltage Symbol VDD Tamb VEE VDD- VEE VI VIO Input rise and fall time tr, tf input capacitance CI XBLWversion1.0 Conditions in free air - Typ. 5 Max. 9 +85 0 9.0 VEE - VDD VDD Unit V C V V V V - - 1000 500 400 7.5 ns ns ns pF Min. 3 -40 -6.0 3.0 0 文档仅供参考,实际应用测试为准 www.xinboleic.com 技术支持热线:4009682003 第 4 页 共 12 页 CD4052 XBLW CD4053 Triple 2-channel Analog Multiplexer/Demultiplexer 3.3 Electrical Characteristics 3.3.1 DC Characteristics 1 ( Tamb=2 5 C, voltages are referenced to VSS ( ground= 0 V), unless otherwise specified.) Tamb= 2 5 Symbol Conditions (V) Parameter Typ. Min. VDD=5V VI=VDD or supply current IDD VSS, IO=0A VDD=9V 3.5 VDD=5V HIGH-level |IO |
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