SN74LV4051ADG4

Product Folder Sample & Buy Technical Documents Support & Community Tools & Software SN74LV4051A SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 SN74LV4051A 8-Channel Analog Multiplexers and Demultiplexers 1 Features 3 Description • • The SN74LV4051A 8-channel CMOS analog multiplexers and demultiplexers are designed for 2-V to 5.5-V VCC operation. 1 • • • • • • 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports High On-Off Output-Voltage Ratio Low Crosstalk Between Switches Individual Switch Controls Extremely Low Input Current Latch-Up Performance Exceeds 100-mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) The SN74LV4051A devices handle both analog and digital signals. Each channel permits signals with amplitudes up to 5.5-V (peak) to be transmitted in either direction. Applications include: signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. Device Information(1) PART NUMBER 2 Applications • • • Telecommunications eCall Infotainment SN74LV4051A PACKAGE BODY SIZE (NOM) TSSOP (16) 5.00 mm × 6.30 mm SOIC (16) 9.90 mm × 6.00 mm SSOP (16) 6.20 mm × 7.80 mm TVSOP (16) 3.60 mm × 6.40 mm PDIP (16) 19.30 mm × 6.35 mm SO (16) 3.60 mm × 6.40 mm VQFN (16) 3.50 mm × 4.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Logic Diagram (Positive Logic) 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA. SN74LV4051A SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 6.11 7 8 1 1 1 2 3 4 Absolute Maximum Ratings ...................................... 4 ESD Ratings.............................................................. 4 Recommended Operating Conditions....................... 4 Thermal Information .................................................. 5 Electrical Characteristics .......................................... 5 Operating Characteristics.......................................... 6 Switching Characteristics: VCC = 2.5 V ± 0.2 V ....... 6 Switching Characteristics: VCC = 3.3 V ± 0.3 V ....... 6 Switching Characteristics: VCC = 5 V ± 0.5 V .......... 7 Analog Switch Characteristics ................................ 7 Typical Characteristics ............................................ 8 Parameter Measurement Information .................. 9 Detailed Description ............................................ 12 8.1 8.2 8.3 8.4 9 Overview ................................................................. Functional Block Diagram ....................................... Feature Description................................................. Device Functional Modes........................................ 12 12 12 12 Application and Implementation ........................ 13 9.1 Application Information............................................ 13 9.2 Typical Application ................................................. 13 10 Power Supply Recommendations ..................... 15 11 Layout................................................................... 15 11.1 Layout Guidelines ................................................. 15 11.2 Layout Example .................................................... 15 12 Device and Documentation Support ................. 16 12.1 12.2 12.3 12.4 12.5 Documentation Support ........................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 16 16 16 16 16 13 Mechanical, Packaging, and Orderable Information ........................................................... 16 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision H (April 2005) to Revision I Page • Added Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table, Detailed Description section, Applications and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ...... 1 • Deleted SN54LV4051A part number from the data sheet ..................................................................................................... 1 • Removed Ordering Information table. .................................................................................................................................... 1 • Deleted θJA from the Absolute Maximum Ratings table ....................................................................................................... 4 2 Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A SN74LV4051A www.ti.com SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 5 Pin Configuration and Functions D, DB, DGB, N, NS, PW Package 16-Pin SOIC, SSOP, TVSOP, PDIP, SO, TSSOP Top View 3 14 4 13 5 12 6 11 7 10 8 9 VCC Y2 Y1 Y0 Y3 A B Y6 COM Y7 Y5 INH GND VCC 15 1 16 2 15 3 14 Y2 Y1 13 Y0 12 Y3 11 A 10 B 4 5 6 7 8 9 C 16 2 Y4 1 GND Y4 Y6 COM Y7 Y5 INH GND GND RGY Package 16-Pin VQFN With Exposed Thermal Pad Top View Pin Functions PIN NAME NO. I/O DESCRIPTION A 11 I Selector line A for outputs (see Device Functional Modes for specific information) B 10 I Selector line B for outputs (see Device Functional Modes for specific information) C 9 I COM 3 GND 7, 8 — Ground INH 6 I (1) Enables the outputs of the device. Logic low level with turn the outputs on, high level will turn them off. Y0 13 I/O (1) Input/Output to mux Y1 14 I/O (1) Input/Output to mux Y2 15 I/O (1) Input/Output to mux Y3 12 I/O (1) Input/Output to mux Y4 1 I/O (1) Input/Output of mux Y5 5 I/O (1) Input/Output to mux Y6 2 I/O (1) Input/Output to mux Y7 4 I/O (1) Input/Output to mux VCC 16 — (1) O/I Selector line C for outputs (see Device Functional Modes for specific information) (1) Output/Input of mux Device power These I/O descriptions represent the device when used as a multiplexer, when this device is operated as a demultiplexer pins Y0-Y7 may be considered outputs (O) and the COM pin may be considered inputs (I). Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A 3 SN74LV4051A SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) VCC MIN MAX UNIT Supply voltage range –0.5 7.0 V (2) –0.5 7.0 V –0.5 VCC + 0.5 V VI Input voltage range VIO Switch I/O voltage range (2) (3) IIK Input clamp current VI < 0 −20 mA IIOK I/O diode current VIO < 0 −50 mA IT Switch through current VIO = 0 to VCC ±25 mA ±50 mA 150 °C 150 °C Continuous current through VCC or GND TJ Max Junction temperature Tstg Storage temperature (1) (2) (3) –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. This value is limited to 5.5-V maximum. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 Charged-device model (CDM), per JEDEC specification JESD22C101 (2) ±1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) (1) MIN VCC Supply voltage VIH High-level input voltage, control inputs 2 (2) VCC = 2 V NOM MAX 5.5 UNIT V 1.5 VCC = 2.3 V to 2.7 V VCC × 0.7 VCC = 3 V to 3.6 V VCC × 0.7 VCC = 4.5 V to 5.5 V VCC × 0.7 VCC = 2 V V 0.5 VCC = 2.3 V to 2.7 V VCC × 0.3 VCC = 3 V to 3.6 V VCC × 0.3 VIL Low-level input voltage, control inputs VI Control input voltage 0 5.5 V VIO Input or output voltage 0 VCC V Δt/Δv Input transition rise or fall rate VCC = 4.5 V to 5.5 V VCC × 0.3 VCC = 2.3 V to 2.7 V 200 VCC = 3 V to 3.6 V 100 VCC = 4.5 V to 5.5 V TA (1) (2) 4 Operating free-air temperature V ns/V 20 –40 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to TI application report Implications of Slow or Floating CMOS Inputs, SCBA004. With supply voltages at or near 2 V, the analog switch ON-state resistance becomes very nonlinear. It is recommended that only digital signals be transmitted at these low supply voltages. Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A SN74LV4051A www.ti.com SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 6.4 Thermal Information SN74LV4051A THERMAL METRIC (1) N (PDIP) PW (TSSOP) 16 PINS 16 PINS UNIT RθJA Junction-to-ambient thermal resistance 54.8 111.3 °C/W RθJC(top) Junction-to-case (top) thermal resistance 42.1 45.3 °C/W RθJB Junction-to-board thermal resistance 34.8 56.9 °C/W ψJT Junction-to-top characterization parameter 26.9 5.4 °C/W ψJB Junction-to-board characterization parameter 34.7 56.3 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 6.5 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TA = 25°C ron ON-state switch resistance IT = 2 mA, VI = VCC or GND, VINH = VIL (see Figure 2) TA = –40°C to 85°C TA = 25°C TA = –40°C to 85°C TA = 25°C TA = –40°C to 85°C TA = 25°C TA = –40°C to 85°C ron(p) Peak ON-state resistance IT = 2 mA, VI = VCC to GND, VINH = VIL TA = 25°C TA = –40°C to 85°C TA = 25°C TA = –40°C to 85°C TA = 25°C TA = –40°C to 85°C Δron Difference in ON-state resistance between switches IT = 2 mA, VI = VCC to GND, VINH = VIL TA = 25°C TA = –40°C to 85°C TA = 25°C TA = –40°C to 85°C II TA = 25°C VCC 2.3 V 3V 4.5 V 2.3 V 3V 4.5 V 2.3 V 3V 4.5 V MIN TYP MAX 38 180 UNIT 225 30 150 190 22 Ω 75 100 113 500 600 54 180 225 31 Ω 100 125 2.1 30 40 1.4 20 30 1.3 Ω 15 20 ±0.1 0 to 5.5 V μA Control input current VI = 5.5 V or GND TA = 25°C IS(off) OFF-state switch leakage current VI = VCC and VO = GND, or VI = GND and VO = VCC, VINH = VIH (see Figure 3) ON-state switch leakage current VI = VCC or GND, VINH = VIL (see Figure 4) TA = 25°C IS(on) ICC Supply current VI = VCC or GND TA = –40°C to 85°C 5.5 V CIC Control input capacitance f = 10 MHz TA = 25°C 3.3 V 2 pF CIS Common terminal capacitance TA = 25°C 3.3 V 23.4 pF COS Switch terminal capacitance TA = 25°C 3.3 V 5.7 pF CF Feedthrough capacitance TA = 25°C 3.3 V 0.5 pF TA = –40°C to 85°C TA = –40°C to 85°C TA = –40°C to 85°C ±1 ±0.1 5.5 V ±1 ±0.1 5.5 V ±1 20 Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A μA μA μA 5 SN74LV4051A SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 www.ti.com 6.6 Operating Characteristics VCC = 3.3 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance CL = 50 pF, f = 10 MHz TYP UNIT 5.9 pF 6.7 Switching Characteristics: VCC = 2.5 V ± 0.2 V over recommended operating free-air temperature range (unless otherwise noted) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS COM or Yn Yn or COM CL = 15 pF (see Figure 5) TA = 25°C tPLH tPHL Propagation delay time tPZH tPZL Enable delay time INH COM or Yn CL = 15 pF (see Figure 6) TA = 25°C tPHZ tPLZ Disable delay time INH COM or Yn CL = 15 pF (see Figure 6) TA = 25°C tPLH tPHL Propagation delay time COM or Yn Yn or COM CL = 50 pF (see Figure 6) TA = 25°C tPZH tPZL Enable delay time INH COM or Yn CL = 50 pF (see Figure 6) TA = 25°C tPHZ tPLZ Disable delay time INH COM or Yn CL = 50 pF (see Figure 6) TA = 25°C MIN TYP MAX 1.9 10 TA = –40°C to 85°C 16 6.6 TA = –40°C to 85°C 18 23 7.4 TA = –40°C to 85°C 18 23 3.8 TA = –40°C to 85°C 12 18 7.8 TA = –40°C to 85°C 28 35 11.5 TA = –40°C to 85°C 28 35 UNIT ns ns ns ns ns ns 6.8 Switching Characteristics: VCC = 3.3 V ± 0.3 V over recommended operating free-air temperature range (unless otherwise noted) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS COM or Yn Yn or COM CL = 15 pF (see Figure 5) TA = 25°C MIN tPLH tPHL Propagation delay time tPZH tPZL Enable delay time INH COM or Yn CL = 15 pF (see Figure 6) TA = 25°C tPHZ tPLZ Disable delay time INH COM or Yn CL = 15 pF (see Figure 6) TA = 25°C tPLH tPHL Propagation delay time COM or Yn Yn or COM CL = 50 pF (see Figure 5) TA = 25°C tPZH tPZL Enable delay time INH COM or Yn CL = 50 pF (see Figure 6) TA = 25°C tPHZ tPLZ Disable delay time INH COM or Yn CL = 50 pF (see Figure 6) TA = 25°C 6 TYP 1.2 TA = –40°C to 85°C 4.7 12 15 5.7 TA = –40°C to 85°C 12 15 2.5 TA = –40°C to 85°C 9 12 5.5 TA = –40°C to 85°C Submit Documentation Feedback 6 10 TA = –40°C to 85°C TA = –40°C to 85°C MAX 20 25 8.8 20 25 UNIT ns ns ns ns ns ns Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A SN74LV4051A www.ti.com SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 6.9 Switching Characteristics: VCC = 5 V ± 0.5 V over recommended operating free-air temperature range (unless otherwise noted) FROM (INPUT) TO (OUTPUT) COM or Yn Yn or COM CL = 15 pF (see Figure 5) TA = 25°C PARAMETER TEST CONDITIONS tPLH tPHL Propagation delay time tPZH tPZL Enable delay time INH COM or Yn CL = 15 pF (see Figure 6) TA = 25°C tPHZ tPLZ Disable delay time INH COM or Yn CL = 15 pF (see Figure 6) TA = 25°C tPLH tPHL Propagation delay time COM or Yn Yn or COM CL = 50 pF (see Figure 5) TA = 25°C tPZH tPZL Enable delay time INH COM or Yn CL = 50 pF (see Figure 6) TA = 25°C tPHZ tPLZ Disable delay time INH COM or Yn CL = 50 pF (see Figure 6) TA = 25°C MIN TYP MAX 0.6 4 TA = –40°C to 85°C 7 3.5 TA = –40°C to 85°C 8 10 4.4 TA = –40°C to 85°C 8 10 1.5 TA = –40°C to 85°C 6 8 4 TA = –40°C to 85°C 14 18 6.2 TA = –40°C to 85°C 14 18 UNIT ns ns ns ns ns ns 6.10 Analog Switch Characteristics over recommended operating free-air temperature range (unless otherwise noted), TA = 25°C PARAMETER Frequency response (switch on) Crosstalk (control input to signal output) Feedthrough attenuation (switch off) Sine-wave distortion (1) (2) FROM (INPUT) TO (OUTPUT) COM or Yn Yn or COM INH COM or Yn COM or Yn COM or Yn Yn or COM Yn or COM TEST CONDITIONS VCC MIN TYP CL = 50 pF, RL = 600 Ω, fin = 1 MHz (sine wave) (see (1) and Figure 7) 2.3 V 20 3V 25 4.5 V 35 CL = 50 pF, RL = 600 Ω, fin = 1 MHz (square wave) (see Figure 8) 2.3 V 20 3V 35 4.5 V 60 CL = 50 pF, RL = 600 Ω, fin = 1 MHz (see (2) and Figure 9) 2.3 V –45 3V –45 4.5 V –45 CL = 50 pF, VI = 2 Vp-p RL = 10 kΩ, VI = 2.5 Vp-p fin = 1 kHz (sine wave) V = 4 Vp-p (see Figure 10) I 2.3 V 0.1% 3V 0.1% 4.5 V 0.1% MAX UNIT MHz mV dB Adjust fin voltage to obtain 0-dBm output. Increase fin frequency until dB meter reads –3 dB. Adjust fin voltage to obtain 0-dBm input. Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A 7 SN74LV4051A SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 www.ti.com 6.11 Typical Characteristics 200 TA =25o C 160 Ron 120 MAX (Ohm) 80 40 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 Vcc(V) Figure 1. Plot at 25°C for VCC vs Max RON 8 Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A SN74LV4051A www.ti.com SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 7 Parameter Measurement Information VCC VINH = VIL VCC VI = VCC or GND VO (ON) GND r on = VI – VO 2 ˣ 10 –3 Ω 2 mA V VI − VO Figure 2. On-State Resistance Test Circuit VCC VINH = VIH VCC A VI (OFF) VO GND Condition 1: VI = 0, VO = VCC Condition 2: VI = VCC, VO = 0 Figure 3. Off-State Switch Leakage-Current Test Circuit VCC VINH = VIL VCC VI A (ON) Open GND VI = VCC or GND Figure 4. On-State Switch Leakage-Current Test Circuit VCC VINH = VIL VCC (ON) Input 50 Ω GND Output CL Figure 5. Propagation Delay Time, Signal Input to Signal Output Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A 9 SN74LV4051A SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 www.ti.com Parameter Measurement Information (continued) VCC 50 Ω VINH VCC VI S1 VO TEST S1 S2 tPLZ/tPZL tPHZ/tPZH GND VCC VCC GND 1 kΩ S2 CL GND TEST CIRCUIT VCC VCC VINH 50% 50% 0V 0V tPZH tPZL VOH ≈VCC VO 50% 50% VOL ≈0 V (tPZL, tPZH) VCC VCC VINH 50% 50% 0V 0V tPHZ tPLZ ≈VCC VOH VO VOL + 0.3 V VOL VOH – 0.3 V ≈0 V (tPLZ, tPHZ) VOLTAGE WAVEFORMS Figure 6. Switching Time (tPZL, tPLZ, tPZH, tPHZ), Control to Signal Output VCC VINH = GND 0.1 µF (1) fin VI VCC VO (ON) GND 50 Ω RL CL VCC (1) fin is a sine wave. Figure 7. Frequency Response (Switch On) 10 Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A SN74LV4051A www.ti.com SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 Parameter Measurement Information (continued) VCC VINH 50 Ω VCC VO GND RL 600 Ω VCC/2 CL VCC/2 Figure 8. Crosstalk (Control Input, Switch Output) VCC VINH = VCC 0.1 µF 50 Ω VCC VI fin VO (OFF) GND 600 Ω RL CL VCC/2 VCC/2 Figure 9. Feedthrough Attenuation (Switch Off) VCC VINH = GND 10 µF fin 10 µF VCC VO (ON) GND 600 Ω RL CL VCC/2 Figure 10. Sine-Wave Distortion Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A 11 SN74LV4051A SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 www.ti.com 8 Detailed Description 8.1 Overview The SN74LV4051A device is an 8-channel analog multiplexer. A multiplexer is used when several signals must share the same device or resource. This device allows for the selection of one of these signals at a time for analysis or propagation. 8.2 Functional Block Diagram 8.3 Feature Description The SN74LV4051A device contains one 8-channel multiplexer for use in a variety of applications and can also be configured as demultiplexer by using the COM pin as an input and the Yn pins as outputs. This device is qualified to operate in the temperature range –40°C to +85°C (maximum depends on package type). 8.4 Device Functional Modes Table 1. Function Table INPUTS 12 A ON CHANNEL L L Y0 L H Y1 L H L Y2 L L H H Y3 L H L L Y4 L H L H Y5 L H H L Y6 L H H H Y7 H X X X None INH C B L L L L L Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A SN74LV4051A www.ti.com SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information A multiplexer is used in applications where multiple signals share a resource. In Figure 11, several different sensors are connected to the analog-to-digital converter (ADC) of a microcontroller unit (MCU). 9.2 Typical Application Figure 11. Example of Multiplexer Use With Analog Sensors and the ADC of an MCU 9.2.1 Design Requirements Designing with the SN74LV4051A device requires a stable input voltage between 2 V (see Recommended Operating Conditions for details) and 5.5 V. Another important design consideration are the characteristics of the signal being multiplexed—ensure no important information is lost due to timing or incompatibility with this device. 9.2.2 Detailed Design Procedure Normally, processing eight different analog signals requires eight separate ADCs, but Figure 11 shows how to achieve this using only one ADC and four GPIOs (general-purpose input/outputs). Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A 13 SN74LV4051A SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 www.ti.com Typical Application (continued) 9.2.3 Application Curve 500 TA =25o C 400 Ron 300 Peak MAX (Ohm) 200 100 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 Vcc(V) Figure 12. Plot at 25°C for VCC vs Max RON(peak) 14 Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A SN74LV4051A www.ti.com SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 10 Power Supply Recommendations Most systems have a common 3.3-V or 5-V rail that can supply the VCC pin of this device. If this rail is not available, a switched-mode power supply (SMPS) or a low dropout regulator (LDO) can supply this device from a higher-voltage rail. 11 Layout 11.1 Layout Guidelines TI recommends keeping the signal lines as short and as straight as possible (see Figure 13). Incorporation of microstrip or stripline techniques are also recommended when signal lines are more than 1" long. These traces must be designed with a characteristic impedance of either 50-Ω or 75-Ω as required by the application. Do not place this device too close to high-voltage switching components because they may cause interference. 11.2 Layout Example Figure 13. Layout Schematic Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A 15 SN74LV4051A SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015 www.ti.com 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation For related documentation, see the following: Implications of Slow or Floating CMOS Inputs, SCBA004 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.3 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 16 Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN74LV4051A PACKAGE OPTION ADDENDUM www.ti.com 30-Jun-2023 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74LV4051AD LIFEBUY SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LV4051A SN74LV4051ADBR LIFEBUY SSOP DB 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LW051A SN74LV4051ADGVR LIFEBUY TVSOP DGV 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LW051A SN74LV4051ADGVRG4 LIFEBUY TVSOP DGV 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LW051A SN74LV4051ADR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 LV4051A SN74LV4051AN LIFEBUY PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74LV4051AN SN74LV4051ANSR LIFEBUY SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 74LV4051A SN74LV4051APW LIFEBUY TSSOP PW 16 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LW051A SN74LV4051APWG4 LIFEBUY TSSOP PW 16 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LW051A SN74LV4051APWR ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 LW051A SN74LV4051APWRE4 LIFEBUY TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LW051A SN74LV4051APWRG4 LIFEBUY TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LW051A SN74LV4051APWT LIFEBUY TSSOP PW 16 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LW051A SN74LV4051ARGYR ACTIVE VQFN RGY 16 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 LW051A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of