Advanced Analog Technology, Inc.
AAT1341
Details are subject to change without notice
2-CHANNEL SWITCHING REGULATOR
FEATURES
Complete PWM Power Control Circuitry Under-Voltage Lockout (UVLO) Protection Open Drain Output Output Short Circuit Protection Low Dissipation Current:1.6mA Dead-Time Control:0 % to 100% Wide Operating Frequency: 10kHz to 800kHz
GENERAL DESCRIPTION
The AAT1341 provides an integrated two-channel pulse-width-modulation (PWM) solution for the power supply of DC-DC system; this device offers system engineers the flexibility to tailor-make the power supply circuitry for specific applications. Each channel contains its own error amplifier, PWM comparator, dead–time control (DTC), and output driver. The under-voltage protection, oscillator, short circuit protection and voltage reference circuit are the common features of the two channels. Both channels of AAT1341 can be used for DC-DC converter operations including step-up, step-down, and inverting. Dead-time control can be set to provide 0% to 100% dead-time through a resistive divider network. Soft-start can be implemented by paralleling the DTC resistor with a capacitor. Two dead-time control inputs are assigned for CH1 and CH2 individually, and dead-time control inputs can be used to control on / off operation. With a minimal number of external components, the AAT1341 offers a simple and cost effective solution.
VDD Range:4.0V to 14.0V
PIN CONFIGURATION
TO V W P IE
Ct
Rt
N E1 IE1 O E1 D1 TC O T1 U GD N 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
V EF R
SC P N E2 IE2 O E2 D2 TC O T2 U VD D
SO P-16PA K G CAE
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AAT1341
PIN DESCRIPTION
PIN NO NAME Ct 1 I/O DESCRIPTION
I I I I I I O
External Timing Capacitance External Timing Resistance
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Rt NE1 IE1 OE1 DTC1 OUT1 GND VDD OUT2 DTC2 OE2 IE2 NE2 SCP VREF
Noninverting Input of Error Amplifier 1 Inverting Input of Error Amplifier 1 Output of Error Amplifier 1 Output 1 Dead-Time / Soft-Start Setting Output 1 Ground Power Supply I O Output 2 I Output 2 Dead-Time / Soft-Start Setting I Output of Error Amplifier 2 I Inverting Input of Error Amplifier 2 I Noninverting Input of Error Amplifier 2 I Timer Latch Setting O Reference Voltage (2.5V) Output
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AAT1341
ABSOLUTE MAXIMUM RATINGS
CHARACTERISTICS SYMBOL VDD VI VO VALUE 14.0 VDD UNIT V V
Supply Voltage Input Voltage ( IE − , DTC) Output Voltage Output Current Operating Free-Air Temperature Range Storage Temperature Range Power Dissipation
VDD +0.3 120
− 20 to + 85 − 45 to + 125
V mA
o o
IO TC
Tstorage
C C
Pd
500
mW
RECOMMENDED OPERATING CONDITION
CHARACTERISTICS Supply Voltage, VDD Input Voltage, IE1, IE2 SYMBOL VDD Vcm MIN 4.0 MAX 14.0 UNIT V
0.5 0 100 5.1 10 − 20
1.6 VDD 15,000 50.0 800 100 85
V V pF
kΩ
Output Voltage Oscillation (OSC) Capacitance Oscillation (OSC) Resistance Oscillation (OSC) Frequency Output Current, I OUT1 , I OUT 2 Operating Free-Air Temperature
VO C OSC R OSC f OSC IO TC
kHz mA
o
C
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AAT1341
ELECTRICAL CHARACTERISTICS, VDD = 6.0V (UNLESS OTHERWISE SPECIFIED) (SEE NOTE 1)
OSCILLATOR PARAMETER TEST CONDITION C OSC = 220pF, R OSC = 10kΩ MIN TYP MAX UNIT
Frequency
f OSC
320
400
480
kHz
Frequency Changes with VDD
f ∆V
VDD = 4.0V to 14.0V, TC = 25 oC C OSC = 220pF, R OSC =10 kΩ
-
1
-
%
UNDER VOLTAGE PROTECTION PARAMETER Upper Threshold Voltage VUPH
TEST CONDITION TC = 25 oC
MIN TYP MAX UNIT
-
2.90 2.53 0.37
-
V V V
Lower Threshold Voltage Hysteresis ( VUPH – VUPL )
VUPL VHYS
TC = 25 C TC = 25 C
o
o
SHORT CIRCUIT PROTECTION CONTROL PARAMETER TEST CONDITION
MIN
TYP MAX UNIT
Input Threshold Voltage Short-Circuit Detect Threshold Voltage SCP Terminal Source Current Stand-by Voltage Latch Voltage
Vr1 Vr 2 I SCP VSTB VLT
CH1, CH2
0.90 1.48
− 3 .5
1.05 1.64
− 2 .5
1.20 1.80
− 1 .5
V V
µA
-
50 30
100 100
mV mV
Note1: Typical values of all parameters are specified at
TC =25 oC.
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AAT1341
ELECTRICAL CHARACTERTISTICS, VDD = 6.0V (UNLESS OTHERWISE SPECIFIED) (SEE NOTE 1) (CONT.)
REFERENCE VOLTAGE PARAMTER
SYMBOL
TEST CONDITION
MIN
TYP MAX UNIT
Reference Voltage Input Voltage Regulation Output Regulation
VREF VRI VRO
I REF = −1mA , TC = 25 oC I REF = −1mA , VDD = 4.0V to 14.0V I REF = −0.1mA to − 3.0 mA
2.4 -
2.5 1 1
2.6 5 10
V mV mV
EA (ERROR AMPLIFIER) PARAMETER SYMBOL VIO Input Offset Voltage
TEST CONDITION
MIN
TYP MAX UNIT
CH1, CH2, Unity Gain CH1, CH2 CH1, CH2
0.5 70 2.3 -
±15 85 2.5 0.7 20
− 45
6 ±100 1.6 0.9 -
mV nA V dB V mA µA dB
Input Bias Current Input Voltage Range Open-Loop Voltage Gain Output Voltage Swing Output Sink Current Output Source Current Common-Mode Rejection Ratio
I IB VIR A VO VOS+ VOS− I OS+ I OS− CMRR
OE=1.25V OE=1.25V
3
− 75
60
80
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AAT1341
ELECTRICAL CHARACTERISTICS, VDD = 6.0V (UNLESS OTHERWISE SPECIFIED) (SEE NOTE 1) (CONT.)
DEAD-TIME CONTROL & PWM PARAMETER SYMBOL I IB Input Bias Current TEST CONDITION VDTC = 2.0V MIN TYP MAX UNIT
1.79 1.32 2.28
0.1 1.97 1.48 2.48
1.0 2.15 1.64 -
µA V V
µA
Input Threshold Voltage (DTC) Latch Input Voltage Latch Mode Source Current
OUTPUT STAGE PARAMETER
Vd 0 Vd100 VDTC I DTC
Duty = 0%, f OSC = 10kHz Duty = 100%, f OSC = 10kHz I DTC = 40µA DTC1, DTC2=0V
− 560 − 200
Saturation Voltage Leakage Current
OPERATING CURRENT PARAMETER
SYMBOL VSAT
I LEAK
TEST CONDITION MIN I O = 75mA(CH1, CH2) VO =14.0V -
TYP MAX UNIT
0.8 -
1.2 5.0
V µA
TEST CONDITION
MIN
TYP MAX UNIT
I DD−OFF Supply Current I DD−ON
Output “OFF” State R OSC = 10kΩ
-
1.3 1.6
1.8 2.3
mA mA
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AAT1341
BLOCK DIAGRAM
OE1 NE1 IE1
Err-Amp SCP Comp PWM
OUT1
GND
UVC
NE2 IE2 OE2
Err-Amp PWM V REF UVC
OUT2
Ct
DTC1 OSC
V REF UVC
Rt
DTC2
UVC LATCH
UVLO
VDD
LATCH
V SCP
DD
S CP
UVC
V REF
VREF
V REF
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AAT1341
APPLICATION CIRCUIT
VREF
VDD
R12 R13 R11
Optional Circuit: Charge Pump Circuit
VDD
VN1 C1
VP3
Q1 D1 L1 C9
NE1
R5
OUT1
VN1
D3 Inverting Output C8
D4 C7
OE1
R1 R2 R3 R4
IE1
VP2
VREF
AAT1341
OUT2
VDD
R16
VDD
VDD
L2
VP2
Q3 D2 Q2 Q4 C10 Step Up Output
R17
VREF
R14 C2
NE2
R6
OE2 IE2
R15
R18
VREF
C4 R7 R9 C5
Ct DTC1 Rt DTC2
R8
R10
GND
Ct Rt
SCP
CSCP
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AAT1341
TIMING CHART
1.97V
OE DTC
1.05V
1.48V
PWM OUTPUT OUTPUT
1.64V
SCP
tSCP
SCP Comp
2.53V
VDD
LOCKOUT FREE
Note:
t SCP ≅
C SCP Vr 2 I SCP
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AAT1341
PACKAGE DIMENSION
16-PIN SOP
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AAT1341
PACKAGE DIMENSION (CONT.)
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AAT1341
PACKAGE DIMENSION (CONT.)
SYMBOLS A A1 A2 b C D E E1 e L y
θ
NOTE: 1. 2. 3.
DIMENSIONS IN MILLIMETERS MIN TYP MAX 1.47 1.60 1.73 0.10 -----0.25 -----1.45 -----0.33 0.41 0.51 0.19 0.20 0.25 9.80 9.91 10.01 5.79 5.99 6.20 3.81 3.91 3.99 -----1.27 -----0.38 0.71 1.27 ----------0.076 o -----0 8o
DEMINSIONS IN INCHES MIN TYP MAX 0.058 0.063 0.068 0.004 -----0.010 -----0.057 -----0.013 0.016 0.020 0.0075 0.0080 0.0098 0.386 0.390 0.394 0.228 0.236 0.244 0.150 0.154 0.157 -----0.050 -----0.015 0.028 0.050 ---------0.003 o -----0 8o
4.
5. 6. 7.
CONTROLLING DIMENSION: INCH LEAD FRAME MATERIAL: COPPER 194 DIMENSION “D” DOES NOT INCLUDE MOLD FLASH, TIE BAR BURRS AND GATE BURRS. MOLD FLASH, TIE BAR BURRS AND GATE BURRS SHALL NOT EXCEED 0.006” [0.15 MILLIMETERS] PER END DIMENSION “E1” DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SAHLL NOT EXCEED 0.010” [0.25 MILLIMETERS] PER SIDE. DIMENSION “b” DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.003” [0.08 MILLIMETERS] TOTAL IN EXCESS OF THE “b” DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSION AND AN ADJACENT LEAD TO BE 0.0028” [0.07 MILLIMETERS]. TOLERANCE: ± 0.010” [0.25 MILLIMETERS] UNLESS OTHERWISE SPECIFIED. OTHERWISE DIMENSION FOLLOW ACCEPTABLE SPEC. REFERENCE DOCUMENT: JEDEC SPEC MS-012
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AAT1341
TAPE AND REEL
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AAT1341
TAPE AND REEL (CONT.)
X.XXX X X.XXX X.XX X.X X
± 0.0025 ± 0.006
± 0.025 ± 0.10 ± 0.25
UNIT: MILLIMETERS
NOTE: 1. 2. 3. 4. 5. 6.
10 SPROCKET HOLE PITCH CUMULATIVE TOLERANCE ± 0.2. CAMBER NOT TO EXCEED 1 MILLIMETER IN 100 MILLIMETERS. MATERIAL: BLACK ADVANTEK POLYSTYRENE. A 0 AND B 0 MEASURED ON A PLANE 0.3 MILLIMETERS ABOVE THE BOTTOM OF THE POCKET. K 0 MEASURED FROM A PLANE ON THE INSIDE BOTTOM OF THE POCKET TO THE TOP SURFACE OF THE CARRIER. POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET HOLE.
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AAT1341
PART MARKING
SOP16 TOP MARKING
AAT1341 BXXXXX.X YYWW TAIWAN
LOT NO. DATE CODE
(0416 = 16th week of Year 2004)
NOTE: SOP16 HAS NO BACK MARKING.
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AAT1341
ORDERING INFORMATION
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