24LC08BHT-I/SN

24AA08H/24LC08BH 8K I2C Serial EEPROM with Half-Array Write-Protect Device Selection Table Part Number 24AA08H Max. Clock Frequency 1.7V-5.5V 24LC08BH Note 1: VCC Range 2.5V-5.5V 400 kHz Temp. Ranges (1) 400 kHz Available Packages I MS, P, SN, OT, MNY, ST I, E MS, P, SN, OT, MNY, ST 100 kHz for VCC < 2.5V Features Description • Single Supply with Operation Down to 1.7V for 24AA08H Devices, 2.5V for 24LC08BH Devices • Low-Power CMOS Technology: - Read current 1 mA, maximum - Standby current 1 µA, maximum (I-temp.) • Two-Wire Serial Interface, I2C Compatible • Schmitt Trigger Inputs for Noise Suppression • Output Slope Control to Eliminate Ground Bounce • 100 kHz and 400 kHz Clock Compatibility • Page Write Time: 5 ms, Maximum • Self-Timed Erase/Write Cycle • 16-Byte Page Write Buffer • Hardware Write-Protect for Half-Array (200h-3FFh) • ESD Protection >4,000V • More than 1 Million Erase/Write Cycles • Data Retention >200 Years • Factory Programming Available • RoHS Compliant • Temperature Ranges: - Industrial (I): -40°C to +85°C - Extended (E): -40°C to +125°C • Automotive AEC-Q100 Qualified The Microchip Technology Inc. 24XX08H(1) is an 8-Kbit Electrically Erasable PROM (EEPROM). The device is organized as one block of 1024 x 8-bit memory with a two-wire serial interface. Its low-voltage design permits operation down to 1.7V, with standby and active currents of only 1 µA and 1 mA, respectively. The 24XX08H also has a page write capability for up to 16 bytes of data. Note 1: 24XX08H is used in this document as a generic part number for the 24AA08H/24LC08BH devices. Package Types A0 (1) A1(1) A2 (1) VSS 7 2 3 4 (1) 1 8 VCC (1) 2 7 WP (1) VCC A0 WP A1 6 SCL A2 3 6 SCL 5 SDA VSS 4 5 SDA TDFN (Top View) SOT-23 (Top View) SCL 1 VSS 2 SDA 3 Note 1:  2008-2021 Microchip Technology Inc. 8 1 Packages • 8-Lead MSOP, 8-Lead PDIP, 8-Lead SOIC, 5-Lead SOT-23, 8-Lead TDFN and 8-Lead TSSOP SOIC, TSSOP (Top View) MSOP, PDIP (Top View) 5 (1) 1 WP A0 (1) 2 A1 (1) 4 A2 VCC VSS 3 4 8 VCC 7 WP 6 SCL 5 SDA Pins A0, A1 and A2 are not used by the 24XX08H (no internal connections). DS20002084C-page 1 24AA08H/24LC08BH Block Diagram HV Generator WP I/O Control Logic Memory Control Logic XDEC EEPROM Array Page Latches I/O SCL YDEC SDA VCC VSS DS20002084C-page 2 Sense Amp. R/W Control  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings (†) VCC.............................................................................................................................................................................6.5V All inputs and outputs w.r.t. VSS ..........................................................................................................-0.3V to VCC +1.0V Storage temperature ............................................................................................................................... -65°C to +150°C Ambient temperature with power applied................................................................................................ -40°C to +125°C ESD protection on all pins  4 kV † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE 1-1: DC CHARACTERISTICS DC CHARACTERISTICS Param. Symbol No. Industrial (I): Extended (E): TA = -40°C to +85°C, VCC = +1.7V to +5.5V TA = -40°C to +125°C, VCC = +1.7V to +5.5V Characteristic Min. Typ. Max. Units Conditions D1 VIH High-Level Input Voltage 0.7 VCC — — V D2 VIL Low-Level Input Voltage — — 0.3 VCC V D3 VHYS Hysteresis of Schmitt Trigger Inputs 0.05 VCC — — V Note 1 D4 VOL Low-Level Output Voltage — — 0.40 V IOL = 3.0 mA, VCC = 2.5V D5 ILI Input Leakage Current — — ±1 µA VIN = VSS to VCC D6 ILO Output Leakage Current — — ±1 µA VOUT = VSS to VCC D7 CIN, COUT Pin Capacitance (all inputs/outputs) — — 10 pF VCC = 5.0V (Note 1) TA = +25°C, FCLK = 1 MHz D8 ICCWRITE VCC = 5.5V, SCL = 400 kHz D9 ICCREAD D10 Note 1: ICCS Operating Current — 0.1 3 mA — 0.05 1 mA — 0.01 1 µA SDA = SCL = VCC WP = VSS, I-Temp. — — 5 µA SDA = SCL = VCC WP = VSS, E-Temp. Standby Current This parameter is periodically sampled and not 100% tested.  2008-2021 Microchip Technology Inc. DS20002084C-page 3 24AA08H/24LC08BH TABLE 1-2: AC CHARACTERISTICS Industrial (I): Extended (E): AC CHARACTERISTICS Param. Symbol No. Characteristic 1 FCLK Clock Frequency 2 THIGH Clock High Time 3 TLOW Clock Low Time 4 TR SDA and SCL Rise Time 5 TF SDA and SCL Fall Time 6 THD:STA Start Condition Hold Time 7 TSU:STA Start Condition Setup Time 8 THD:DAT Data Input Hold Time 9 TSU:DAT Data Input Setup Time 10 TSU:STO Stop Condition Setup Time 11 TSU:WP WP Setup Time 12 THD:WP WP Hold Time Min. TA = -40°C to +85°C, VCC = +1.7V to +5.5V TA = -40°C to +125°C, VCC = +2.5V to +5.5V Max. Units — 400 kHz 2.5V  VCC  5.5V — 100 kHz 1.7V  VCC  2.5V (24AA08H) 600 — ns 2.5V  VCC  5.5V 4000 — ns 1.7V  VCC  2.5V (24AA08H) 1300 — ns 2.5V  VCC  5.5V 4700 — ns 1.7V  VCC  2.5V (24AA08H) — 300 ns 2.5V  VCC  5.5V (Note 1) — 1000 ns 1.7V  VCC  2.5V (24AA08H) (Note 1) — 300 ns Note 1 600 — ns 2.5V  VCC  5.5V 4000 — ns 1.7V  VCC  2.5V (24AA08H) 600 — ns 2.5V  VCC  5.5V 4700 — ns 1.7V  VCC  2.5V (24AA08H) 0 — ns Note 2 100 — ns 2.5V  VCC  5.5V 250 — ns 1.7V  VCC  2.5V (24AA08H) 600 — ns 2.5V  VCC  5.5V 4000 — ns 1.7V  VCC  2.5V (24AA08H) 600 — ns 2.5V VCC  5.5V 4000 — ns 1.7V VCC < 2.5V (24AA08H) 1300 — ns 2.5V VCC  5.5V 4700 — ns 1.7V VCC < 2.5V (24AA08H) — 900 ns 2.5V  VCC  5.5V (Note 2) — 3500 ns 1.7V  VCC  2.5V (24AA08H) (Note 2) 1300 — ns 2.5V  VCC  5.5V 4700 — ns 1.7V  VCC  2.5V (24AA08H) — 250 ns 2.5V  VCC  5.5V — 250 ns 1.7V  VCC  2.5V (24AA08H) Notes 1 and 3 13 TAA Output Valid from Clock 14 TBUF Bus Free Time: The time the bus must be free before a new transmission can start 15 TOF Output Fall Time from VIH Minimum to VIL Maximum 16 TSP Input Filter Spike Suppression (SDA and SCL pins) — 50 ns 17 TWC Write Cycle Time (byte or page) — 5 ms 1,000,000 — 18 Endurance Note 1: 2: 3: 4: Conditions cycles +25°C, VCC = 5.5V, Page Mode (Note 4) Not 100% tested. CB = total capacitance of one bus line in pF. As a transmitter the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike suppression. This eliminates the need for a TI specification for standard operation. This parameter is not tested but ensured by characterization. DS20002084C-page 4  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH FIGURE 1-1: BUS TIMING DATA 5 SCL SDA IN 7 3 4 D4 2 8 10 9 6 16 14 13 SDA OUT WP  2008-2021 Microchip Technology Inc. (protected) (unprotected) 11 12 DS20002084C-page 5 24AA08H/24LC08BH 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE Name MSOP PDIP SOIC SOT23 TDFN(1) TSSOP A0 1 1 1 — 1 1 Not Connected A1 2 2 2 — 2 2 Not Connected A2 3 3 3 — 3 3 Not Connected Description VSS 4 4 4 2 4 4 Ground SDA 5 5 5 3 5 5 Serial Address/Data I/O SCL 6 6 6 1 6 6 Serial Clock WP 7 7 7 5 7 7 Write-Protect Input 8 8 8 4 8 8 Power Supply VCC Note 1: 2.1 The exposed pad on the TDFN package can be connected to VSS or left floating. A0, A1, A2 2.3 Serial Clock (SCL) The A0, A1 and A2 pins are not used by the 24XX08H. They may be left floating or tied to either VSS or VCC. The SCL input is used to synchronize the data transfer to and from the device. 2.2 2.4 Serial Address/Data Input/Output (SDA) The SDA input is a bidirectional pin used to transfer addresses and data into and out of the device. Since it is an open-drain terminal, the SDA bus requires a pull-up resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz). For normal data transfer, SDA is allowed to change only during SCL low. Changes during SCL high are reserved for indicating Start and Stop conditions. DS20002084C-page 6 Write-Protect (WP) The WP pin must be connected to either VSS or VCC. If tied to VSS, normal memory operation is enabled (read/write the entire memory 000-03FF). If tied to VCC, write operations are inhibited, half of the memory will be write-protected (200h-3FFh). Read operations are not affected.  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH 3.0 FUNCTIONAL DESCRIPTION The 24XX08H supports a bidirectional, two-wire bus and data transmission protocol. A device that sends data onto the bus is defined as a transmitter, while a device receiving data is defined as a receiver. The bus has to be controlled by a host device which generates the Serial Clock (SCL), controls the bus access and generates the Start and Stop conditions, while the 24XX08H works as client. Both host and client can operate as transmitter or receiver, but the host device determines which mode is activated. 4.0 BUS CHARACTERISTICS The following bus protocol has been defined: • Data transfer may be initiated only when the bus is not busy. • During data transfer, the data line must remain stable whenever the clock line is high. Changes in the data line while the clock line is high will be interpreted as a Start or Stop condition. Accordingly, the following bus conditions have been defined (Figure 4-1). 4.1 4.4 The state of the data line represents valid data when, after a Start condition, the data line is stable for the duration of the high period of the clock signal. The data on the line must be changed during the low period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a Start condition and terminated with a Stop condition. The number of the data bytes transferred between the Start and Stop conditions is determined by the host device and is theoretically unlimited, although only the last sixteen will be stored when doing a write operation. When an overwrite does occur it will replace data in a First-In First-Out (FIFO) principle. 4.5 Both data and clock lines remain high. 4.2 Start Data Transfer (B) A high-to-low transition of the SDA line while the clock (SCL) is high determines a Start condition. All commands must be preceded by a Start condition. 4.3 Stop Data Transfer (C) A low-to-high transition of the SDA line while the clock (SCL) is high determines a Stop condition. All operations must be ended with a Stop condition. FIGURE 4-1: SCL (A) Acknowledge Each receiving device, when addressed, is obliged to generate an Acknowledge after the reception of each byte. The host device must generate an extra clock pulse which is associated with this Acknowledge bit. Note: Bus Not Busy (A) Data Valid (D) The 24XX08H does not generate any Acknowledge bits if an internal programming cycle is in progress. The device that acknowledges has to pull down the SDA line during the Acknowledge clock pulse in such a way that the SDA line is stable-low during the high period of the Acknowledge-related clock pulse. Moreover, setup and hold times must be taken into account. During reads, a host must signal an end of data to the client by not generating an Acknowledge bit on the last byte that has been clocked out of the client. In this case, the client (24XX08H) will leave the data line high to enable the host to generate the Stop condition. DATA TRANSFER SEQUENCE ON THE SERIAL BUS (B) (D) Start Condition Address or Acknowledge Valid (D) (C) (A) SDA  2008-2021 Microchip Technology Inc. Data Allowed to Change Stop Condition DS20002084C-page 7 24AA08H/24LC08BH 5.0 DEVICE ADDRESSING A control byte is the first byte received following the Start condition from the host device. The control byte consists of a four-bit control code. For the 24XX08H, this is set as ‘1010’ binary for read and write operations. The next bit of the control byte is a “don’t care” for the 24XX08H. The last two bits, B1 and B0, are used by the host device to select which of the four 256-word blocks of memory are to be accessed. These bits, in effect, are the Most Significant bits of the word address. The combination of the 4-bit control code and the next three bits are called the client address. The last bit of the control byte is the Read/Write (R/W) bit and it defines the operation to be performed. When set to ‘1’, a read operation is selected. When set to ‘0’, a write operation is selected. Following the Start condition, the 24XX08H monitors the SDA bus, checking the device type identifier being transmitted. Upon receiving a valid client address and the R/W bit, the client device outputs an Acknowledge signal on the SDA line. Depending on the state of the R/W bit, the 24XX08H will select a read or write operation. Operation Control Code Block Select R/W Write 1010 Block Address 0 FIGURE 5-1: CONTROL BYTE ALLOCATION Read/Write Bit Block Select Bits Control Code S 1 0 1 0 x B1 B0 R/W ACK Client Address Acknowledge Bit Start Bit x = “don’t care” The next byte received defines the address of the first data byte within the selected block (Figure 5-2). The word address byte uses all eight bits. Operation Control Code Block Select R/W Read 1010 Block Address 1 FIGURE 5-2: ADDRESS SEQUENCE BIT ASSIGNMENTS Control Byte 1 0 1 Control Code 0 x B1 B0 R/W Word Address Byte A7 • • • • • • A0 Block Select Bits x = “don’t care” DS20002084C-page 8  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH 6.0 WRITE OPERATION 6.1 Byte Write The higher-order four bits of the word address remain constant. If the host should transmit more than 16 words prior to generating the Stop condition, the Address Pointer will roll over and the previously received data will be overwritten. As with the byte write operation, once the Stop condition is received, an internal write cycle will begin (Figure 6-2). Following the Start condition from the host, the device code (4 bits), the block address (3 bits) and the R/W bit, which is a logic-low, are placed onto the bus by the host transmitter. This indicates to the addressed client receiver that a byte with a word address will follow once it has generated an Acknowledge bit during the ninth clock cycle. Therefore, the next byte transmitted by the host is the word address and will be written into the Address Pointer of the 24XX08H. After receiving another Acknowledge signal from the 24XX08H, the host device will transmit the data word to be written into the addressed memory location. The 24XX08H acknowledges again and the host generates a Stop condition. This initiates the internal write cycle and, during this time, the 24XX08H will not generate Acknowledge signals (Figure 6-1). 6.2 Note: Page Write The write control byte, word address and the first data byte are transmitted to the 24XX08H in the same way as in a byte write. However, instead of generating a Stop condition, the host transmits up to 16 data bytes to the 24XX08H, which are temporarily stored in the on-chip page buffer and will be written into memory once the host has transmitted a Stop condition. Upon receipt of each word, the four lower-order Address Pointer bits, which form the byte counter, are internally incremented by one. FIGURE 6-1: Write Protection The WP pin allows the user to write-protect half of the array (200h-3FFh) when the pin is tied to VCC. If the pin is tied to VSS, the write protection is disabled. BYTE WRITE Bus Activity Host S T A R T SDA Line S 1 0 1 0 X B1 B0 0 Control Byte Bus Activity Word Address Block Select Bits x = “don’t care” FIGURE 6-2: 6.3 Page write operations are limited to writing bytes within a single physical page regardless of the number of bytes actually being written. Physical page boundaries start at addresses that are integer multiples of the page buffer size (or ‘page size’) and end at addresses that are integer multiples of page size – 1. If a page write command attempts to write across a physical page boundary, the result is that the data wraps around to the beginning of the current page (overwriting data previously stored there), instead of being written to the next page, as might be expected. It is therefore necessary for the application software to prevent page write operations that would attempt to cross a page boundary. S T O P Data P A C K A C K A C K PAGE WRITE Bus Activity Host S T A R T SDA Line S 1 0 1 0 X B1B0 0 Bus Activity x = “don’t care” Control Byte Block Select Bits  2008-2021 Microchip Technology Inc. Word Address (n) Data (n) Data (n + 1) S T O P Data (n + 15) P A C K A C K A C K A C K A C K DS20002084C-page 9 24AA08H/24LC08BH 7.0 ACKNOWLEDGE POLLING Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the Stop condition for a write command has been issued from the host, the device initiates the internally-timed write cycle and ACK polling can then be initiated immediately. This involves the host sending a Start condition followed by the control byte for a write command (R/W = 0). If the device is still busy with the write cycle, no ACK will be returned. If the cycle is complete, the device will return the ACK and the host can then proceed with the next read or write operation. See Figure 7-1 for a flow diagram of this operation. FIGURE 7-1: ACKNOWLEDGE POLLING FLOW Send Write Command Send Stop Condition to Initiate Write Cycle Send Start Send Control Byte with R/W = 0 Did Device Acknowledge (ACK = 0)? No Yes Next Operation DS20002084C-page 10  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH 8.0 READ OPERATION 8.3 Sequential Read Read operations are initiated in the same way as write operations, with the exception that the R/W bit of the client address is set to ‘1’. There are three basic types of read operations: current address read, random read and sequential read. Sequential reads are initiated in the same way as a random read, except that once the 24XX08H transmits the first data byte, the host issues an Acknowledge as opposed to a Stop condition in a random read. This directs the 24XX08H to transmit the next sequentially-addressed 8-bit word (Figure 8-3). 8.1 To provide sequential reads, the 24XX08H contains an internal Address Pointer that is incremented by one upon completion of each operation. This Address Pointer allows the entire memory contents to be serially read during one operation. Current Address Read The 24XX08H contains an Address Pointer that maintains the address of the last word accessed, internally incremented by one. Therefore, if the previous access (either a read or write operation) was to address n, the next current address read operation would access data from address n + 1. Upon receipt of the client address with R/W bit set to ‘1’, the 24XX08H issues an Acknowledge and transmits the 8-bit data word. The host will not acknowledge the transfer, but does generate a Stop condition and the 24XX08H discontinues transmission (Figure 8-1). 8.2 8.4 Noise Protection The SCL and SDA inputs have Schmitt Trigger and filter circuits which suppress noise spikes to assure proper device operation, even on a noisy bus. Random Read Random read operations allow the host to access any memory location in a random manner. To perform this type of read operation, the word address must first be set. This is accomplished by sending the word address to the 24XX08H as part of a write operation. Once the word address is sent, the host generates a Start condition following the Acknowledge. This terminates the write operation, but not before the internal Address Pointer is set. The host then issues the control byte again, but with the R/W bit set to a ‘1’. The 24XX08H will then issue an Acknowledge and transmit the 8-bit data word. The host will not acknowledge the transfer, but does generate a Stop condition and the 24XX08H will discontinue transmission (Figure 8-2). FIGURE 8-1: CURRENT ADDRESS READ Bus Activity Host S T A R T SDA Line S 1 0 1 0 x B1 B0 1 Bus Activity x = “don’t care”  2008-2021 Microchip Technology Inc. Control Byte Block Select Bits S T O P Data (n) P A C K N o A C K DS20002084C-page 11 24AA08H/24LC08BH FIGURE 8-2: RANDOM READ Bus Activity Host SDA Line S T Control A Byte R T S 1 0 1 0 X B1B00 Control Byte A Block C Select K Bits A C K x = “don’t care” FIGURE 8-3: Bus Activity Host SDA Line Bus Activity DS20002084C-page 12 S T O P P Data (n) S 1 0 1 0 X B1B0 1 A Block C Select K Bits Bus Activity S T A R T Word Address (n) N o A C K SEQUENTIAL READ Control Byte Data (n) Data (n + 1) Data (n + 2) S T O P Data (n + X) P 1 A C K A C K A C K A C K N o A C K  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH 9.0 PACKAGING INFORMATION 9.1 Package Marking Information 8-Lead MSOP Example XXXXXX YWWNNN 4L8BHI 13213F 8-Lead PDIP (300 mil) Example XXXXXXXX XXXXXNNN YYWW 24LC08BH I/P e3 13F 2132 8-Lead SOIC (3.90 mm) Example XXXXXXXX XXXXYYWW 24LC08BHI SN e3 2132 NNN 13F 5-Lead SOT-23 Example XXNN 4QNN 8-Lead 2x3 TDFN Example XXX YWW NN AS5 132 13 8-Lead TSSOP Example XXXX 4L8H TYWW I132 NNN 13F  2008-2021 Microchip Technology Inc. DS20002084C-page 13 24AA08H/24LC08BH Part Number 1st Line Marking Codes SOT-23 MSOP PDIP SOIC TSSOP 24AA08H 4A8HT(1) 24AA08H 24AA08HT(1) 4A8H 24LC08BH 4L8BHT(1) 24L08BH 24LC08BHT(1) 4L8H Note 1: 2: I-Temp. TDFN E-Temp. I-Temp. E-Temp. 4MNN(2) — AS1 — 4QNN(2) 4RNN(2) AS4 AS5 T = Temperature grade (I, E) NN = Alphanumeric traceability code Legend: XX...X T Y YY WW NNN e3 Part number or part number code Temperature (I, E) Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code (2 characters for small packages) JEDEC® designator for Matte Tin (Sn) * Standard OTP marking consists of Microchip part number, year code, week code and traceability code. Note: For very small packages with no room for the JEDEC® designator e3 , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. DS20002084C-page 14  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2008-2021 Microchip Technology Inc. DS20002084C-page 15 24AA08H/24LC08BH Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20002084C-page 16  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2008-2021 Microchip Technology Inc. DS20002084C-page 17 24AA08H/24LC08BH 8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A N B E1 NOTE 1 1 2 TOP VIEW E C A2 A PLANE L c A1 e eB 8X b1 8X b .010 C SIDE VIEW END VIEW Microchip Technology Drawing No. C04-018-P Rev E Sheet 1 of 2 DS20002084C-page 18  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH 8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging ALTERNATE LEAD DESIGN (NOTE 5) DATUM A DATUM A b b e 2 e 2 e e Units Dimension Limits Number of Pins N e Pitch Top to Seating Plane A Molded Package Thickness A2 Base to Seating Plane A1 Shoulder to Shoulder Width E Molded Package Width E1 Overall Length D Tip to Seating Plane L c Lead Thickness b1 Upper Lead Width b Lower Lead Width eB Overall Row Spacing § MIN .115 .015 .290 .240 .348 .115 .008 .040 .014 - INCHES NOM 8 .100 BSC .130 .310 .250 .365 .130 .010 .060 .018 - MAX .210 .195 .325 .280 .400 .150 .015 .070 .022 .430 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. § Significant Characteristic 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side. 4. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. 5. Lead design above seating plane may vary, based on assembly vendor. Microchip Technology Drawing No. C04-018-P Rev E Sheet 2 of 2  2008-2021 Microchip Technology Inc. DS20002084C-page 19 24AA08H/24LC08BH 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2X 0.10 C A–B D A D NOTE 5 N E 2 E1 2 E1 E 2X 0.10 C A–B 2X 0.10 C A–B NOTE 1 2 1 e B NX b 0.25 C A–B D NOTE 5 TOP VIEW 0.10 C C A A2 SEATING PLANE 8X A1 SIDE VIEW 0.10 C h R0.13 h R0.13 H SEE VIEW C VIEW A–A 0.23 L (L1) VIEW C Microchip Technology Drawing No. C04-057-SN Rev F Sheet 1 of 2 DS20002084C-page 20  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Pins N e Pitch Overall Height A Molded Package Thickness A2 § Standoff A1 Overall Width E Molded Package Width E1 Overall Length D Chamfer (Optional) h Foot Length L Footprint L1 Foot Angle c Lead Thickness b Lead Width Mold Draft Angle Top Mold Draft Angle Bottom MIN 1.25 0.10 0.25 0.40 0° 0.17 0.31 5° 5° MILLIMETERS NOM 8 1.27 BSC 6.00 BSC 3.90 BSC 4.90 BSC 1.04 REF - MAX 1.75 0.25 0.50 1.27 8° 0.25 0.51 15° 15° Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. § Significant Characteristic 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. 5. Datums A & B to be determined at Datum H. Microchip Technology Drawing No. C04-057-SN Rev F Sheet 2 of 2  2008-2021 Microchip Technology Inc. DS20002084C-page 21 24AA08H/24LC08BH 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging SILK SCREEN C Y1 X1 E RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Contact Pad Spacing C Contact Pad Width (X8) X1 Contact Pad Length (X8) Y1 MIN MILLIMETERS NOM 1.27 BSC 5.40 MAX 0.60 1.55 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-2057-SN Rev F DS20002084C-page 22  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH 5-Lead Plastic Small Outline Transistor (OT) [SOT23] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 0.20 C 2X D e1 A D N E/2 E1/2 E1 E (DATUM D) (DATUM A-B) 0.15 C D 2X NOTE 1 1 2 e B NX b 0.20 C A-B D TOP VIEW A A A2 0.20 C SEATING PLANE A SEE SHEET 2 A1 C SIDE VIEW Microchip Technology Drawing C04-091-OT Rev F Sheet 1 of 2  2008-2021 Microchip Technology Inc. DS20002084C-page 23 24AA08H/24LC08BH 5-Lead Plastic Small Outline Transistor (OT) [SOT23] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging c T L L1 VIEW A-A SHEET 1 Units Dimension Limits N Number of Pins e Pitch e1 Outside lead pitch A Overall Height A2 Molded Package Thickness Standoff A1 Overall Width E Molded Package Width E1 Overall Length D Foot Length L Footprint L1 I Foot Angle c Lead Thickness b Lead Width MIN 0.90 0.89 - 0.30 0° 0.08 0.20 MILLIMETERS NOM 5 0.95 BSC 1.90 BSC 2.80 BSC 1.60 BSC 2.90 BSC 0.60 REF - MAX 1.45 1.30 0.15 0.60 10° 0.26 0.51 Notes: 1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.25mm per side. 2. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-091-OT Rev F Sheet 2 of 2 DS20002084C-page 24  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH 5-Lead Plastic Small Outline Transistor (OT) [SOT23] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging X SILK SCREEN 5 Y Z C G 1 2 E GX RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch C Contact Pad Spacing X Contact Pad Width (X5) Y Contact Pad Length (X5) Distance Between Pads G Distance Between Pads GX Z Overall Width MIN MILLIMETERS NOM 0.95 BSC 2.80 MAX 0.60 1.10 1.70 0.35 3.90 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing No. C04-2091-OT Rev F  2008-2021 Microchip Technology Inc. DS20002084C-page 25 24AA08H/24LC08BH 8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.8 mm Body [TDFN] With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) (DATUM B) E NOTE 1 2X 0.15 C 1 2 2X 0.15 C TOP VIEW 0.10 C C (A3) A SEATING PLANE 8X 0.08 C A1 SIDE VIEW 0.10 C A B D2 L 1 2 0.10 C A B NOTE 1 E2 K N 8X b e 0.10 0.05 C A B C BOTTOM VIEW Microchip Technology Drawing No. C04-129-MN Rev E Sheet 1 of 2 DS20002084C-page 26  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH 8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.8 mm Body [TDFN] With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits N Number of Pins e Pitch A Overall Height Standoff A1 Contact Thickness A3 D Overall Length Overall Width E Exposed Pad Length D2 Exposed Pad Width E2 b Contact Width Contact Length L Contact-to-Exposed Pad K MIN 0.70 0.00 1.35 1.25 0.20 0.25 0.20 MILLIMETERS NOM 8 0.50 BSC 0.75 0.02 0.20 REF 2.00 BSC 3.00 BSC 1.40 1.30 0.25 0.30 - MAX 0.80 0.05 1.45 1.35 0.30 0.45 - Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package may have one or more exposed tie bars at ends. 3. Package is saw singulated 4. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing No. C04-129-MN Rev E Sheet 2 of 2  2008-2021 Microchip Technology Inc. DS20002084C-page 27 24AA08H/24LC08BH 8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.8 mm Body [TDFN] With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging X2 EV 8 ØV C Y2 EV Y1 1 2 SILK SCREEN X1 E RECOMMENDED LAND PATTERN Units Dimension Limits Contact Pitch E Optional Center Pad Width X2 Optional Center Pad Length Y2 Contact Pad Spacing C Contact Pad Width (X8) X1 Contact Pad Length (X8) Y1 Thermal Via Diameter V Thermal Via Pitch EV MIN MILLIMETERS NOM 0.50 BSC MAX 1.60 1.50 2.90 0.25 0.85 0.30 1.00 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. 2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process Microchip Technology Drawing No. C04-129-MN Rev. B DS20002084C-page 28  2008-2021 Microchip Technology Inc. 24AA08H/24LC08BH /HDG3ODVWLF7KLQ6KULQN6PDOO2XWOLQH67±PP%RG\>76623@ 1RWH )RUWKHPRVWFXUUHQWSDFNDJHGUDZLQJVSOHDVHVHHWKH0LFURFKLS3DFNDJLQJ6SHFLILFDWLRQORFDWHGDW KWWSZZZPLFURFKLSFRPSDFNDJLQJ D N E E1 NOTE 1 1 2 b e c A φ A2 A1 L L1 8QLWV 'LPHQVLRQ/LPLWV 1XPEHURI3LQV 0,//,0(7(56 0,1 1 120 0$;  3LWFK H 2YHUDOO+HLJKW $ ± %6& ± 0ROGHG3DFNDJH7KLFNQHVV $    6WDQGRII $  ±   2YHUDOO:LGWK ( 0ROGHG3DFNDJH:LGWK (  %6&   0ROGHG3DFNDJH/HQJWK '    )RRW/HQJWK /    )RRWSULQW / 5() )RRW$QJOH  ƒ ± ƒ /HDG7KLFNQHVV F  ±  /HDG:LGWK E  ±  1RWHV  3LQYLVXDOLQGH[IHDWXUHPD\YDU\EXWPXVWEHORFDWHGZLWKLQWKHKDWFKHGDUHD  'LPHQVLRQV'DQG(GRQRWLQFOXGHPROGIODVKRUSURWUXVLRQV0ROGIODVKRUSURWUXVLRQVVKDOOQRWH[FHHGPPSHUVLGH  'LPHQVLRQLQJDQGWROHUDQFLQJSHU$60(