AAP149BS-M6B-G-LF-TR

AAP149B Microphone Pre-Amplifer with Digital Output Description Features The AAP149B is a chip-scale device with digital output developed specifically for integrating in small form factor two terminal electret condenser microphones. The AAP149B provides PDM bit stream output and can run with a clock frequency of 1MHz to 3MHz and th it has incorporated of 4 order Sigma-Delta ADC. The ADC has a 20kHz signal bandwidth. The single bit modulator features an inherently linear output, as well as enabling noise shaping and shifting of quantization noise. The AAP149B provides ultra-low input capacitance and noise performance, 5µVrms typical with shorted input to ground, and it also provides excellent RFI and EMI immunity. The AAP149B has 20dB gain and low quiescent current in sleep mode. Sleep mode is automatically detected by the clock frequency falling below 100kHz. Additionally, the AAP149B is configured to be compatible with stereo audio applications, with provision of a Left and Right channel select.         th Integrated 4 Order Sigma-Delta ADC, with 20kHz signal BW, PDM output and clock Frequency of 1MHz to 3MHz 20dB Gain Sleep Mode with low Quiescent Current < 40µA Low Input Capacitance 0.2pF typical Low Noise 5µV RMS typical Input Noise (Aweighted, input shorted) Stereo-Audio Compatible with L/R Channel Select RoHS Compliant & Halogen Free Applications  Small Diameter Electret Microphones with digital output The AAP149B is provided in a chip scale 6pin SMD package. The package size is 810µm x 1200µm; with an overall height of 350µm including solder bumps. This extremely small package size and aspect ratio is optimum for use in small diameter microphones. Available in tape & reel package. Functional Block Diagram VDD LDO ECM IN Amp SELECT CLK GND DATA L/R Figure 1 · Functional Block Diagram May 2015 Rev. 1.0 www.microsemi.com © 2015 Microsemi Corporation- Analog Mixed Signal 1 AAP149B Electret condenser Microphone Pre- Amplifer with Digital Output Pin Configuration DATA CLK GND XY VDD IN L/R Figure 2 · Pinout (Top View)  Top mark XY and pin 1 indicator (Laser mark) XY= Unique lot code assigned for each assembly order Ordering Information Ambient Temperature Type Package Part Number Packaging Type Packing Qty CSP AAP149BS-M6B-G-LF-TR Tape and Reel 3500 RoHS2 compliant, -40°C to 85°C Pb-free Halogen Free Pin Description Pin Designator 2 Description CLK ADC Clock input of 1MHz to 3MHz GND Ground DATA Data Output pin, selectable by L/R VDD Power input, 1.6V to 3.6V IN Analog signal input for Electret Condenser Microphone L/R Left or Right Channel Select. L/R sets low for Left channel, VDD for Right channel May 2015 Rev. 1.0 Absolute Maximum Ratings Absolute Maximum Ratings Parameter Min Max Units Power Supply (VDD) -0.5 5 V Analog Input (IN) -0.5 0.5 V Voltage on CLK ( without loading clock) 5 V Voltage on L/R 5 V Maximum Operating Ambient Temperature -40 85 °C Maximum storage temperature -65 100 °C 260 °C Peak package solder reflow temperature (40 seconds maximum exposure) Note: Exceeding any Absolute Maximum ratings could cause damage to the device. All voltages are with respect to GND. Currents are positive into, negative out of specified terminal. These are stress ratings only and functional operation of the device at these, or any other conditions beyond those indicated under “Recommended Operating Conditions” are not implied. Exposure to “Absolute Maximum Ratings” for extended periods may affect device reliability. Typical Operating Conditions Parameter Supply Voltage Range Operating Temperature Range Clock Rise and Fall Time May 2015 Rev. 1.0 Symbol Min. Typ. Max. Unit VDD 1.6 3.3 3.6 V TA -4 45 °C 10 ns 3 AAP149B Electret condenser Microphone Pre- Amplifer with Digital Output Electrical Characteristics Note: Unless otherwise specified, all limits are guaranteed for TA = 25°C, VDD= 3.3V, VIN = -44dBVRMS, fCLK=2.4MHz, 50% duty, CMIC =5pF Parameter Test Conditions Min Typ Max Units 1.6 3.3 3.6 V POWER SUPPLY Supply Voltage (VDD) Supply Current IN=GND, CLK=2.4MHz, No Load Normal Mode (IDD) VDD=1.8V 510 µA VDD=3.3V 600 µA VDD=1.8V, fCLK=GND 8.2 40 µA VDD=3.3V, fCLK=GND 15.5 40 µA 20 dBV/dBFS Nominal Sensitivity IN=1kHz, -44dBV -24 dBFS Signal-to-Noise Ratio (SNR) IN=1kHz, -44dBV, A-weighted 60 dB(A) Input Referred Noise (EIN) 20Hz to 20kHz, A-weighted, Derived from EIN and max acoustic input 5 µVRMS 90 dB Sleep Mode ( ISB) PERFORMANCE Transfer Function (TF) Dynamic Range Band Width 25 Frequency Response Low Frequency -3dB point High Frequency -3dB point 33 kHz 0.21 % @1% THD+N 81 mVpk @5% THD+N 91 mVpk 0.2 pF Input Capacitance ( CIN) Input Resistance ( RIN) GΩ >20 Maximum Acoustic Input Power Supply Rejection Ratio (PSRR) Hz Hz 20 THD & Noise ( THD+N) Overload Margin 20000 IN=GND, 217Hz, 100mVpp square wave superimposed on VDD=1.8V 120 dBSPL -70 dBFS DIGITAL INPUT/OUTPUT CHARACTERISTICS Input Voltage High (VIH) IOUT=1.8mA 0.65*VDD VDD+0.3 V Input Voltage Low (VIL) IOUT=1.8mA -0.3 0.35*VDD V Output Voltage High (VOH) IOUT=1.8mA 0.65*VDD VDD+0.3 V Output Voltage Low (VOL) IOUT=1.8mA -0.3 0.35*VDD V Noise Floor 20Hz to 20kHz, A-weighted -83 dBFS TIMING CHARACTERISTICS Start-Up Period (Note1) Sleep time (tSL) (Note 3) Wake-Up time(tWU) 4 (Note 2) Time from CLK Falling < 100kHz Time from CLK Rising > 100kHz, Power On 5 ms 10 ms 10 ms Clock Frequency ( fCLK) 1 2.4 3 MHz Clock Duty Ratio 40 50 60 % May 2015 Rev. 1.0 Electrical Characteristics Parameter Clock Rise/Fall time (tCF, tCR) Time from CLK transition to data becoming valid (TDV) Time from CLK transition to data becoming Hi-Z (TDH) Time from CLK transition to data becoming valid (TDV) Time from CLK transition to data becoming Hi-Z (TDH) Load capacitance on Data (CL) Test Conditions Min RL=1MΩ & CL=15pF On falling edge of CLK, L/R=GND, CL=15pF On Rising edge of CLK, L/R=GND, CL=15pF On Rising edge of CLK, L/R=VDD, CL=15pF On falling edge of CLK, L/R=VDD, CL=15pF Typ Max Units 10 ns 20 ns 15 ns 26 ns 14 ns 100 pF Notes: (1) Start-up period is measured when VDD becomes 3.3V to the time when transfer function settles within 1dB of its final value. After start-up period, the device can handle equivalent of 1Pa with THD