APT14M120B

APT14M120B APT14M120S 1200V, 14A, 1.20Ω Max N-Channel MOSFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. TO -2 47 D3PAK APT14M120B APT14M120S Single die MOSFET D G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI/RFI • PFC and other boost converter • Low RDS(on) • Buck converter • Ultra low Crss for improved noise immunity • Two switch forward (asymmetrical bridge) • Low gate charge • Single switch forward • Avalanche energy rated • Flyback • RoHS compliant • Inverters Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 14 Continuous Drain Current @ TC = 100°C 9 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 1070 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 7 A 1 51 Thermal and Mechanical Characteristics Max Unit W PD Total Power Dissipation @ TC = 25°C 625 RθJC Junction to Case Thermal Resistance 0.20 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface TJ,TSTG Operating and Storage Junction Temperature Range TL Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw Microsemi Website - http://www.microsemi.com Downloaded from Elcodis.com electronic components distributor 0.11 -55 150 300 °C/W °C 0.22 oz 6.2 g 10 in·lbf 1.1 N·m 10-2006 Typ Rev A Min Characteristic 050-8094 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter Test Conditions Min VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA 1200 ∆VBR(DSS)/∆TJ Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ VGS = 10V, ID = 7A 3 Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics VDS = 1200V VGS = 0V Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance 1.20 5 100 500 ±100 TJ = 125°C Min VGS = 0V, VDS = 25V f = 1MHz Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Typ 15 4765 55 350 Max Unit V V/°C Ω V mV/°C µA nA Unit S pF 135 VGS = 0V, VDS = 0V to 800V 70 Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time Resistive Switching Current Rise Time VDD = 800V, ID = 7A tf 1.41 0.97 4 -10 TJ = 25°C Test Conditions VDS = 50V, ID = 7A 4 td(off) Max TJ = 25°C unless otherwise specified Co(cr) tr Typ VGS = ±30V Parameter gfs 3 VGS = VDS, ID = 1mA Threshold Voltage Temperature Coefficient IDSS Symbol Reference to 25°C, ID = 250µA Breakdown Voltage Temperature Coefficient RDS(on) APT14M120B_S Turn-Off Delay Time 145 24 70 26 15 85 24 VGS = 0 to 10V, ID = 7A, VDS = 600V RG = 4.7Ω 6 , VGG = 15V Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Diode Forward Voltage ISD = 7A, TJ = 25°C, VGS = 0V trr Reverse Recovery Time ISD = 7A 3 Qrr Reverse Recovery Charge Peak Recovery dv/dt Typ Max Unit 14 A G VSD dv/dt Min D 51 S diSD/dt = 100A/µs, TJ = 25°C ISD ≤ 7A, di/dt ≤1000A/µs, VDD = 800V, TJ = 125°C 1.0 1205 23 V ns µC 10 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 43.59mH, RG = 4.7Ω, IAS = 7A. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -2.17E-8/VDS^2 + 2.63E-9/VDS + 3.74E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. 050-8094 Rev A 10-2006 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. Downloaded from Elcodis.com electronic components distributor 40 V GS = 10V 12 TJ = -55°C 30 ID, DRIAN CURRENT (A) 25 20 TJ = 25°C 15 10 TJ = 150°C 8 5V 6 4 0 30 25 20 15 10 5 0 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 4.5V 0 250µSEC. PULSE TEST @ ID(ON) x RDS(ON) MAX. VGS = 10V @ 7A ID, DRAIN CURRENT (A) RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE 50 NORMALIZED TO 2.5 30 25 20 15 10 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics Figure 1, Output Characteristics 3.0 = 6, 7, 8 & 9V GS 2 TJ = 125°C 5 V 10 050-8094 ID, DRAIN CURRENT (A) T = 125°C J 35 0 APT14M120B_S 14 DM 10 13µs 100µs 1ms Rds(on) Rds(on) 13µs 100µs 1ms DC line 0.1 10 100 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area 10ms 100ms TJ = 150°C TC = 25°C 1 DC line Scaling for Different Case & Junction Temperatures: ID = ID(T = 25 C)*(TJ - TC)/125 100ms TJ = 125°C TC = 75°C 1 10ms 10 C ° 1 10 100 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area TJ (°C) TC (°C) 0.0166 0.0688 0.114 Dissipated Power (Watts) 0.00467 0.0176 ZEXT 1 IDM ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) I 0.1 APT14M120B_S 100 100 0.270 ZEXT are the external thermal impedances: Case to sink, sink to ambient, etc. Set to zero when modeling only the case to junction. Figure 11, Transient Thermal Impedance Model 0.20 D = 0.9 0.15 0.7 Note: 0.5 0.10 PDM Z JC, THERMAL IMPEDANCE (°C/W) θ 0.25 t2 0.3 t1 = Pulse Duration 0.05 0 t Duty Factor D = 1/t2 Peak TJ = PDM x ZθJC + TC SINGLE PULSE 0.1 0.05 10-5 t1 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 12. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration 1.0 D3PAK Package Outline TO-247 (B) Package Outline 15.49 (.610) 16.26 (.640) 6.15 (.242) BSC 5.38 (.212) 6.20 (.244) Drain (Heat Sink) e3 100% Sn Plated 4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 4.98 (.196) 5.08 (.200) 1.47 (.058) 1.57 (.062) 15.95 (.628) 16.05(.632) Drain 13.79 (.543) 13.99(.551) Revised 4/18/95 20.80 (.819) 21.46 (.845) 1.04 (.041) 1.15(.045) 10-2006 Rev A Revised 8/29/97 11.51 (.453) 11.61 (.457) 3.50 (.138) 3.81 (.150) 0.46 (.018) 0.56 (.022) {3 Plcs} 050-8094 13.41 (.528) 13.51(.532) 4.50 (.177) Max. 0.40 (.016) 0.79 (.031) 19.81 (.780) 20.32 (.800) 2.87 (.113) 3.12 (.123) 1.65 (.065) 2.13 (.084) 1.01 (.040) 1.40 (.055) Gate Drain 0.020 (.001) 0.178 (.007) 2.67 (.105) 2.84 (.112) 1.27 (.050) 1.40 (.055) 1.22 (.048) 1.32 (.052) 1.98 (.078) 2.08 (.082) 5.45 (.215) BSC {2 Plcs.} Source 2.21 (.087) 2.59 (.102) 5.45 (.215) BSC 2-Plcs. Dimensions in Millimeters and (Inches) Source Drain Gate Dimensions in Millimeters (Inches) Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved. Downloaded from Elcodis.com electronic components distributor 3.81 (.150) 4.06 (.160) (Base of Lead) Heat Sink (Drain) and Leads are Plated