APT37F50B
APT37F50S
500V, 37A, 0.15Ω Max, trr, ≤250ns
N-Channel FREDFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET.
This 'FREDFET' version has a drain-source (body) diode that has been optimized for
high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft
recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly
reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The
intrinsic gate resistance and capacitance of the poly-silicon gate structure help control
di/dt during switching, resulting in low EMI and reliable paralleling, even when switching
at very high frequency.
TO
-24
7
D 3 PAK
APT37F50B
APT37F50S
D
Single die FREDFET
G
S
TYPICAL APPLICATIONS
FEATURES
• Fast switching with low EMI
• ZVS phase shifted and other full bridge
• Low trr for high reliability
• Half bridge
• Ultra low Crss for improved noise immunity
• PFC and other boost converter
• Low gate charge
• Buck converter
• Avalanche energy rated
• Single and two switch forward
• RoHS compliant
• Flyback
Absolute Maximum Ratings
Symbol
ID
Parameter
Unit
Ratings
Continuous Drain Current @ TC = 25°C
37
Continuous Drain Current @ TC = 100°C
24
A
IDM
Pulsed Drain Current
VGS
Gate-Source Voltage
±30
V
EAS
Single Pulse Avalanche Energy 2
780
mJ
IAR
Avalanche Current, Repetitive or Non-Repetitive
18
A
1
115
Thermal and Mechanical Characteristics
Typ
Max
Unit
W
PD
Total Power Dissipation @ TC = 25°C
520
RθJC
Junction to Case Thermal Resistance
0.24
RθCS
Case to Sink Thermal Resistance, Flat, Greased Surface
TJ,TSTG
Operating and Storage Junction Temperature Range
TL
Soldering Temperature for 10 Seconds (1.6mm from case)
WT
Package Weight
Torque
Mounting Torque ( TO-247 Package), 6-32 or M3 screw
Microsemi Website - http://www.microsemi.com
0.11
-55
150
300
°C/W
°C
0.22
oz
6.2
g
10
in·lbf
1.1
N·m
Rev D 8-2011
Min
Characteristic
050-8125
Symbol
Static Characteristics
TJ = 25°C unless otherwise specified
Symbol
Parameter
Test Conditions
Min
VBR(DSS)
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250μA
500
∆VBR(DSS)/∆TJ
Drain-Source On Resistance
VGS(th)
Gate-Source Threshold Voltage
∆VGS(th)/∆TJ
VGS = 10V, ID = 18A
3
Zero Gate Voltage Drain Current
IGSS
Gate-Source Leakage Current
Dynamic Characteristics
Forward Transconductance
Ciss
Input Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
VDS = 600V
TJ = 25°C
VGS = 0V
TJ = 125°C
Typ
Max
0.60
0.13
4
-10
0.15
5
250
1000
±100
VGS = ±30V
Unit
V
V/°C
Ω
V
mV/°C
μA
nA
TJ = 25°C unless otherwise specified
Parameter
gfs
2.5
VGS = VDS, ID = 1mA
Threshold Voltage Temperature Coefficient
IDSS
Symbol
Reference to 25°C, ID = 250μA
Breakdown Voltage Temperature Coefficient
RDS(on)
APT37F50B_S
Min
Test Conditions
VDS = 50V, ID = 18A
4
Effective Output Capacitance, Charge Related
Co(er)
5
Effective Output Capacitance, Energy Related
Max
27
5710
75
615
VGS = 0V, VDS = 25V
f = 1MHz
Co(cr)
Typ
Unit
S
pF
355
VGS = 0V, VDS = 0V to 333V
180
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
td(on)
Turn-On Delay Time
Resistive Switching
Current Rise Time
VDD = 333V, ID = 18A
tr
td(off)
tf
Turn-Off Delay Time
145
32
65
25
29
65
21
VGS = 0 to 10V, ID = 18A,
VDS = 250V
RG = 4.7Ω 6 , VGG = 15V
Current Fall Time
nC
ns
Source-Drain Diode Characteristics
Symbol
IS
ISM
VSD
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 1
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
Irrm
Reverse Recovery Current
dv/dt
Peak Recovery dv/dt
Test Conditions
Min
Typ
D
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
Max
37
A
G
115
S
ISD = 18A, TJ = 25°C, VGS = 0V
1.0
250
450
TJ = 25°C
TJ = 125°C
ISD = 18A 3
TJ = 25°C
diSD/dt = 100A/μs
TJ = 125°C
VDD = 100V
TJ = 25°C
Unit
TJ = 125°C
ISD ≤ 18A, di/dt ≤1000A/μs, VDD = 333V,
TJ = 125°C
0.88
2.18
8.4
11.8
V
ns
μC
A
20
V/ns
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
2 Starting at TJ = 25°C, L = 4.81mH, RG = 25Ω, IAS = 18A.
050-8125
Rev D 8-2011
3 Pulse test: Pulse Width < 380μs, duty cycle < 2%.
4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = -1.33E-7/VDS^2 + 3.06E-8/VDS + 8.83E-11.
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
APT37F50B_S
140
V
GS
70
= 10V
T = 125°C
J
TJ = -55°C
120
= 7 &,10V
V
GS
60
ID, DRIAN CURRENT (A)
ID, DRAIN CURRENT (A)
6.5V
100
80
TJ = 25°C
60
40
TJ = 150°C
20
0
50
40
6V
30
5.5V
20
5V
10
TJ = 125°C
0
0
5
10
15
20
25
VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V)
0
Figure 2, Output Characteristics
120
NORMALIZED TO
VGS = 10V @ 18A
VDS> ID(ON) x RDS(ON) MAX.
250μSEC. PULSE TEST
@
