APT37M100B2

APT37M100B2 APT37M100L 1000V, 37A, 0.33Ω Max N-Channel MOSFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. T-Ma x TM TO-264 APT37M100B2 APT37M100L D Single die MOSFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI/RFI • PFC and other boost converter • Low RDS(on) • Buck converter • Ultra low Crss for improved noise immunity • Two switch forward (asymmetrical bridge) • Low gate charge • Single switch forward • Avalanche energy rated • Flyback • RoHS compliant • Inverters Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 37 Continuous Drain Current @ TC = 100°C 23 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 2165 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 18 A 1 140 Thermal and Mechanical Characteristics Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 1135 RθJC Junction to Case Thermal Resistance 0.11 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface TJ,TSTG Operating and Storage Junction Temperature Range TL Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight Torque Mounting Torque ( TO-264 Package), 4-40 or M3 screw Microsemi Website - http://www.microsemi.com 0.11 -55 150 300 °C/W °C 0.22 oz 6.2 g 10 in·lbf 1.1 N·m Rev C 7-2011 Min Characteristic 050-8099 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter VBR(DSS) Drain-Source Breakdown Voltage ∆VBR(DSS)/∆TJ Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ IGSS Gate-Source Leakage Current Dynamic Characteristics VDS = 1000V VGS = 0V Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance Typ Max 1.15 0.29 4 -10 0.33 5 TJ = 25°C 100 500 ±100 TJ = 125°C VGS = ±30V Unit V V/°C Ω V mV/°C μA nA TJ = 25°C unless otherwise specified Parameter gfs 3 VGS = VDS, ID = 2.5mA Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Symbol VGS = 10V, ID = 18A 3 IDSS Min 1000 Reference to 25°C, ID = 250μA Breakdown Voltage Temperature Coefficient RDS(on) Test Conditions VGS = 0V, ID = 250μA APT37M100B2_L Min Test Conditions VDS = 50V, ID = 18A 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Max 39 9835 130 825 VGS = 0V, VDS = 25V f = 1MHz Co(cr) Typ Unit S pF 335 VGS = 0V, VDS = 0V to 667V Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time tr td(off) tf 170 305 55 145 44 40 150 38 VGS = 0 to 10V, ID = 18A, VDS = 500V Resistive Switching VDD = 667V, ID = 18A Current Rise Time RG = 2.2Ω 6 , VGG = 15V Turn-Off Delay Time Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Diode Forward Voltage ISD = 18A, TJ = 25°C, VGS = 0V trr Reverse Recovery Time ISD = 18A 3 Qrr Reverse Recovery Charge Peak Recovery dv/dt Typ Max Unit 37 A G VSD dv/dt Min D 140 S diSD/dt = 100A/μs, TJ = 25°C ISD ≤ 18A, di/dt ≤1000A/μs, VDD = 100V, TJ = 125°C 1 1165 33 V ns μC 10 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 13.36mH, RG = 2.2Ω, IAS = 18A. 3 Pulse test: Pulse Width < 380μs, duty cycle < 2%. 050-8099 Rev C 7-2011 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -2.85E-7/VDS^2 + 5.04E-8/VDS + 9.75E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT37M100B2_L 120 V GS 40 = 10V T = 125°C J 35 V TJ = -55°C 80 60 TJ = 25°C 40 20 TJ = 125°C 30 25 20 5V 15 10 5 TJ = 150°C 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 4.5V 0 Figure 2, Output Characteristics 140 NORMALIZED TO VGS = 10V @ 18A 2.5 VDS> ID(ON) x RDS(ON) MAX. 250μSEC. PULSE TEST @