APT84F50L

APT84F50B2 APT84F50L 500V, 84A, 0.065Ω Max, trr ≤320ns N-Channel FREDFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. T-Ma x TM TO-264 APT84F50B2 APT84F50L D Single die FREDFET G S FEATURES TYPICAL APPLICATIONS • Fast switching with low EMI • ZVS phase shifted and other full bridge • Low trr for high reliability • Half bridge • Ultra low Crss for improved noise immunity • PFC and other boost converter • Low gate charge • Buck converter • Avalanche energy rated • Single and two switch forward • RoHS compliant • Flyback Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 84 Continuous Drain Current @ TC = 100°C 53 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 1845 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 42 A 1 270 Thermal and Mechanical Characteristics Max Unit W PD Total Power Dissipation @ TC = 25°C 1135 RθJC Junction to Case Thermal Resistance 0.11 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface TJ,TSTG Operating and Storage Junction Temperature Range TL Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight Torque Mounting Torque ( TO-264 Package), 4-40 or M3 screw Microsemi Website - http://www.microsemi.com 0.11 -55 150 300 °C/W °C 0.22 oz 6.2 g 10 in·lbf 1.1 N·m 9-2011 Typ Rev C Min Characteristic 050-8176 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter Test Conditions Min VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250μA 500 ∆VBR(DSS)/∆TJ Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ VGS = 10V, ID = 42A 3 Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance VDS = 500V TJ = 25°C VGS = 0V TJ = 125°C Typ Max 0.60 0.055 4 -10 0.065 5 250 1000 ±100 VGS = ±30V Unit V V/°C Ω V mV/°C μA nA TJ = 25°C unless otherwise specified Parameter gfs 2.5 VGS = VDS, ID = 2.5mA Threshold Voltage Temperature Coefficient IDSS Symbol Reference to 25°C, ID = 250μA Breakdown Voltage Temperature Coefficient RDS(on) APT84F50B2_L Min Test Conditions VDS = 50V, ID = 42A 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Max 65 13500 185 1455 VGS = 0V, VDS = 25V f = 1MHz Co(cr) Typ Unit S pF 845 VGS = 0V, VDS = 0V to 333V 425 Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time Resistive Switching Current Rise Time VDD = 333V, ID = 42A tr td(off) tf Turn-Off Delay Time 340 75 155 60 70 155 50 VGS = 0 to 10V, ID = 42A, VDS = 250V RG = 2.2Ω 6 , VGG = 15V Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge Irrm Reverse Recovery Current dv/dt Peak Recovery dv/dt Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Min Typ D A 270 S ISD = 42A, TJ = 25°C, VGS = 0V TJ = 25°C TJ = 125°C TJ = 25°C diSD/dt = 100A/μs TJ = 125°C VDD = 100V TJ = 25°C Unit 84 G ISD = 42A 3 Max TJ = 125°C ISD ≤ 42A, di/dt ≤1000A/μs, VDD = 333V, TJ = 125°C 282 499 1.67 4.36 12 17.8 1.0 320 600 V ns μC A 20 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 2.08mH, RG = 25Ω, IAS = 42A. 050-8176 Rev C 9-2011 3 Pulse test: Pulse Width < 380μs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -3.14E-7/VDS^2 + 7.31E-8/VDS + 2.09E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT84F50B2_L 350 V GS 160 = 10V T = 125°C TJ = -55°C ID, DRIAN CURRENT (A) 250 200 TJ = 25°C 150 100 TJ = 150°C 50 120 6V 100 80 60 40 5V 20 TJ = 125°C 0 0 5 10 15 20 25 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 4.5V 0 Figure 1, Output Characteristics 2.5 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics 280 NORMALIZED TO VGS = 10V @ 42A VDS> ID(ON) x RDS(ON) MAX. 250μSEC. PULSE TEST @