Features
• Fast Read Access Time - 55 ns
• Low Power CMOS Operation
•
•
•
•
•
•
•
•
– 100 µA Maximum Standby
– 40 mA Maximum Active at 5 MHz
JEDEC Standard Packages
– 40-Lead 600 mil PDIP
– 44-Lead PLCC
– 40-Lead VSOP (10 mm x 14 mm)
Direct Upgrade from 512K-bit, 1M-bit, and 2M-bit
(AT27C516, AT27C1024, and AT27C2048) EPROMs
5V ± 10% Power Supply
High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Rapid™ Programming Algorithm - 50 µs/word (typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
4-Megabit
(256K x 16)
OTP EPROM
AT27C4096
Description
The AT27C4096 is a low-power, high-performance 4,194,304-bit one-time programmable read only memory (OTP EPROM) organized 256K by 16 bits. It requires a single 5V power supply in normal read mode operation. Any word can be accessed in
(continued)
Pin Configurations
O0 - O15
Outputs
CE
Chip Enable
OE
Output Enable
NC
No Connect
Note:
Both GND pins must be connected.
O13
O14
O15
CE
VPP
NC
VCC
A17
A16
A15
A14
Addresses
O12
O11
O10
O9
O8
GND
NC
O7
O6
O5
O4
6
5
4
3
2
1
44
43
42
41
40
A0 - A17
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
18
19
20
21
22
23
24
25
26
27
28
Function
A13
A12
A11
A10
A9
GND
NC
A8
A7
A6
A5
O3
O2
O1
O0
OE
NC
A0
A1
A2
A3
A4
Pin Name
PLCC Top View
PDIP Top View
VPP
CE
O15
O14
O13
O12
O11
O10
O9
O8
GND
O7
O6
O5
O4
O3
O2
O1
O0
OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VSOP Top View
Type 1
VCC
A17
A16
A15
A14
A13
A12
A11
A10
A9
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0
A9
A10
A11
A12
A13
A14
A15
A16
A17
VCC
VPP
CE
O15
O14
O13
O12
O11
O10
O9
O8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0
OE
O0
O1
O2
O3
O4
O5
O6
O7
GND
Rev. 0311F–10/98
1
less than 55 ns, eliminating the need for speed-reducing
WAIT states. The by-16 organization makes this part ideal
for high-performance 16- and 32-bit microprocessor systems.
In read mode, the AT27C4096 typically consumes 15 mA.
Standby mode supply current is typically less than 10 µA.
The AT27C4 096 is av ai lab le in ind us try s tand ar d
JEDEC-approved one-time programmable (OTP) plastic
PDIP, PLCC, and VSOP packages. The device features
two-line control (CE, OE) to eliminate bus contention in
high-speed systems.
With high density 256K word storage capability, the
AT27C4096 allows firmware to be stored reliably and to be
accessed by the system without the delays of mass storage
media.
Atmel’s AT27C4096 has additional features that ensure
high quality and efficient production use. The Rapid™ Programming Algorithm reduces the time required to program
the part and guarantees reliable programming. Programming time is typically only 50 µs/word. The Integrated Product Identification Code electronically identifies the device
Block Diagram
2
AT27C4096
and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1 µF high frequency,
low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected
between the V CC and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
be utilized, again connected between the VCC and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
AT27C4096
Absolute Maximum Ratings*
*NOTICE:
Temperature Under Bias ................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V(1)
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V(1)
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V(1)
Note:
1.
Maximum voltage is -0.6V dc which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
VCC + 0.75V dc which may overshoot to +7.0V for pulses of less than 20 ns.
Operating Modes
Mode/Pin
CE
OE
Ai
VPP
(1)
Outputs
Read
VIL
VIL
Ai
Output Disable
X
VIH
X
X
High Z
VIH
X
X
X(5)
High Z
VIL
VIH
Ai
VPP
DIN
PGM Verify
VIH
VIL
Ai
VPP
DOUT
PGM Inhibit
VIH
VIH
X
VPP
High Z
Product Identification(4)
VIL
VIL
A9 = VH(3)
A0 = VIH or VIL
A1 - A17 = VIL
VCC
Identification Code
Standby
Rapid Program
Notes:
(2)
X
DOUT
1. X can be VIL or VIH.
2. Refer to the Programming characteristics.
3. VH = 12.0 ± 0.5V.
4. Two identifier words may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH, and A0, which is toggled
low (VIL) to select the Manufacturer’s Identification word and high (VIH) to select the Device Code word.
5. Standby VCC current (ISB) is specified with VPP = VCC. VCC > VPP will cause a slight increase in ISB.
3
DC and AC Operating Conditions for Read Operation
AT27C4096
Operating
Temperature (Case)
-55
-70
-90
-12
-15
Com.
0°C - 70°C
0°C - 70°C
0°C - 70°C
0°C - 70°C
0°C - 70°C
Ind.
-40°C - 85°C
-40°C - 85°C
-40°C - 85°C
-40°C - 85°C
-40°C - 85°C
5V ± 10%
5V ± 10%
5V ± 10%
5V ± 10%
5V ± 10%
VCC Power Supply
DC and Operating Characteristics for Read Operation
Symbol
Parameter
Condition
ILI
Input Load Current
ILO
IPP1(2)
ISB
Max
Units
VIN = 0V to VCC
±1
µA
Output Leakage Current
VOUT = 0V to VCC
±5
µA
VPP(1) Read/Standby Current
VPP = VCC
10
µA
ISB1 (CMOS)
CE = VCC ± 0.3V
100
µA
ISB2 (TTL)
CE = 2.0 to VCC + 0.5V
1
mA
f = 5 MHz, IOUT = 0 mA, CE = VIL
40
mA
VCC
(1)
Standby Current
Min
ICC
VCC Active Current
VIL
Input Low Voltage
-0.6
0.8
V
VIH
Input High Voltage
2.0
VCC + 0.5
V
VOL
Output Low Voltage
IOL = 2.1 mA
0.4
V
Output High Voltage
IOH = -400 µA
VOH
Notes:
2.4
V
1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP.
2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP.
AC Characteristics for Read Operation
AT27C4096
-55
Condition
tACC(3)
Address to Output
Delay
CE = OE
= VIL
55
70
90
tCE(2)
CE to Output Delay
OE = VIL
55
70
OE to Output Delay
CE = VIL
20
20
tDF(4)(5)
OE or CE High to Output Float,
whichever occurred first
tOH(4)
Output Hold from Address, CE or OE,
whichever occurred first
Note:
4
Min
7
2, 3, 4, 5. See the AC Waveforms for Read Operation diagram.
AT27C4096
7
Max
Min
-12
Parameter
tOE
Max
-90
Symbol
(2)(3)
Min
-70
Max
Units
120
150
ns
90
120
150
ns
30
35
40
50
ns
20
20
30
35
ns
0
Max
Min
-15
0
Max
Min
0
ns
AT27C4096
AC Waveforms for Read Operation(1)
Notes:
1.
Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2.
OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3.
OE may be delayed up to tACC - tOE after the address is valid without impact on tACC.
4.
This parameter is only sampled and is not 100% tested.
5.
Output float is defined as the point when data is no longer driven.
Input Test Waveforms and
Measurement Levels
Output Test Load
1.3V
For -55 devices only:
(1N914)
OUTPUT
PIN
3.3K
CL
tR, tF < 5 ns (10% to 90%)
Note:
CL = 100 pF including jig capacitance, except for the -45
and -55 devices, where CL = 30 pF.
For -70, -90, -12 and -15 devices:
tR, tF < 20 ns (10% to 90%)
Pin Capacitance
f = 1 MHz, T = 25°C(1)
Symbol
Typ
Max
Units
Conditions
CIN
4
10
pF
VIN = 0V
COUT
8
12
pF
VOUT = 0V
Note:
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
5
Programming Waveforms(1)
Notes:
1.
The Input Timing Reference is 0.8V for VIL and 2.0V for VIH.
2.
tOE and tDFP are characteristics of the device but must be accommodated by the programmer.
3.
When programming the AT27C4096, a 0.1 µF capacitor is required across VPP and ground to suppress spurious voltage
transients.
DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Limits
Symbol
Parameter
Test Conditions
ILI
Input Load Current
VIN = VIL, VIH
VIL
Input Low Level
VIH
Input High Level
VOL
Output Low Voltage
IOL = 2.1 mA
VOH
Output High Voltage
IOH = -400 µA
ICC2
VCC Supply Current
(Program and Verify)
IPP2
VPP Supply Current
VID
A9 Product Identification Voltage
6
AT27C4096
Min
Max
Units
±10
µA
-0.6
0.8
V
2.0
VCC + 0.7
V
0.4
V
2.4
CE = VIL
11.5
V
50
mA
30
mA
12.5
V
AT27C4096
AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Limits
(1)
Symbol
Parameter
Test Conditions
tAS
Address Setup Time
tOES
OE Setup Time
tDS
Data Setup Time
tAH
Address Hold Time
tDH
Data Hold Time
Input Rise and Fall Times :
(10% to 90%) 20 ns
Input Pulse Levels:
tDFP
OE High to Output Float Delay(2)
tVPS
VPP Setup Time
tVCS
VCC Setup Time
0.45V to 2.4V
(3)
CE Program Pulse Width
tOE
Data Valid from OE
tPRT
VPP Pulse Rise Time During
Programming
Max
µs
2
µs
2
µs
0
µs
2
µs
130
ns
2
µs
2
µs
47.5
Output Timing Reference Level:
0.8V to 2.0V
Units
2
0
Input Timing Reference Level:
0.8V to 2.0V
tPW
Notes:
Min
52.5
µs
150
ns
50
ns
1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.
2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven
—see timing diagram.
3. Program Pulse width tolerance is 50 µsec ± 5%.
Atmel’s 27C4096 Intergrated Product Identification Code
Pins
Codes
A0
O15-O8
O7
O6
O5
O4
O3
O2
O1
O0
Hex Data
Manufacturer
0
0
0
0
0
1
1
1
1
0
001E
Device Type
1
0
1
1
1
1
0
1
0
0
00F4
7
Rapid Programming Algorithm
A 50 µs CE pulse width is used to program. The address is
set to the first location. V CC is raised to 6.5V and V PP is
raised to 13.0V. Each address is first programmed with one
50 µs CE pulse without verification. Then a verification/reprogramming loop is executed for each address. In
the event a word fails to pass verification, up to 10 successive 50 µs pulses are applied with a verification after each
8
AT27C4096
pulse. If the word fails to verify after 10 pulses have been
applied, the part is considered failed. After the word verifies
properly, the next address is selected until all have been
checked. VPP is then lowered to 5.0V and VCC to 5.0V. All
words are read again and compared with the original data
to determine if the device passes or fails.
AT27C4096
Ordering Information
ICC (mA)
tACC (ns)
Active
Standby
Ordering Code
Package
55
40
0.1
AT27C4096-55JC
AT27C4096-55PC
AT27C4096-55VC
44J
40P6
40V
Commercial
(0°C to 70°C)
40
0.1
AT27C4096-55JI
AT27C4096-55PI
AT27C4096-55VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
40
0.1
AT27C4096-70JC
AT27C4096-70PC
AT27C4096-70VC
44J
40P6
40V
Commercial
(0°C to 70°C)
40
0.1
AT27C4096-70JI
AT27C4096-70PI
AT27C4096-70VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
40
0.1
AT27C4096-90JC
AT27C4096-90PC
AT27C4096-90VC
44J
40P6
40V
Commercial
(0°C to 70°C)
40
0.1
AT27C4096-90JI
AT27C4096-90PI
AT27C4096-90VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
40
0.1
AT27C4096-12JC
AT27C4096-12PC
AT27C4096-12VC
44J
40P6
40V
Commercial
(0°C to 70°C)
40
0.1
AT27C4096-12JI
AT27C4096-12PI
AT27C4096-12VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
40
0.1
AT27C4096-15JC
AT27C4096-15PC
AT27C4096-15VC
44J
40P6
40V
Commercial
(0°C to 70°C)
40
0.1
AT27C4096-15JI
AT27C4096-15PI
AT27C4096-15VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
70
90
120
150
Operation Range
Package Type
44J
44-Lead, Plastic J-Leaded Chip Carrier (PLCC)
40P6
40-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
40V
40-Lead, Plastic Thin Small Outline Package (VSOP) 10 x 14 mm
9
Packaging Information
44J, 44-Lead, Plastic J-Leaded Chip Carrier (PLCC)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-018 AC
40P6, 40-Lead, 0.600" Wide, Plastic Dual Inline
Package (PDIP)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-011 AC
.045(1.14) X 45°
PIN NO. 1
IDENTIFY
.045(1.14) X 30° - 45°
.695(17.7)
SQ
.685(17.4)
.050(1.27) TYP
.500(12.7) REF SQ
PIN
1
.630(16.0)
.590(15.0)
.656(16.7)
SQ
.650(16.5)
.032(.813)
.026(.660)
2.07(52.6)
2.04(51.8)
.012(.305)
.008(.203)
.566(14.4)
.530(13.5)
.021(.533)
.013(.330)
.043(1.09)
.020(.508)
.120(3.05)
.090(2.29)
.180(4.57)
.165(4.19)
.090(2.29)
MAX
1.900(48.26) REF
.220(5.59)
MAX
.005(.127)
MIN
SEATING
PLANE
.065(1.65)
.015(.381)
.022(.559)
.014(.356)
.161(4.09)
.125(3.18)
.022(.559) X 45° MAX (3X)
.110(2.79)
.090(2.29)
.012(.305)
.008(.203)
40V, 40-Lead, Plastic Thin Small Outline Package
(TSOP)
Dimensions in Millimeters and (Inches)
JEDEC OUTLINE MO-142 CA
10
AT27C4096
.065(1.65)
.041(1.04)
.630(16.0)
.590(15.0)
0 REF
15
.690(17.5)
.610(15.5)
AT27C4096
11
Atmel Headquarters
Atmel Operations
Corporate Headquarters
Atmel Colorado Springs
2325 Orchard Parkway
San Jose, CA 95131
TEL (408) 441-0311
FAX (408) 487-2600
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TEL (719) 576-3300
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FAX (33) 4 42 53 60 01
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Japan
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FAX (81) 3-3523-7581
Fax-on-Demand
North America:
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International:
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e-mail
literature@atmel.com
Web Site
http://www.atmel.com
BBS
1-(408) 436-4309
© Atmel Corporation 1998.
Atmel Cor poration makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s website. The Company assumes no responsibility for
any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without
notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual proper ty of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are
not authorized for use as critical components in life suppor t devices or systems.
Marks bearing
®
and/or
™
are registered trademarks and trademarks of Atmel Corporation.
Terms and product names in this document may be trademarks of others.
Printed on recycled paper.
0311F–10/98/xM
