AT27C520-90SC

Features • 8-Bit Multiplexed Addresses/Outputs • Fast Read Access Time - 70 ns • Low Power CMOS Operation • • • • • • • • – 20 mA max. Active at 5 MHz 20-Lead TSSOP Package 20-Lead SOIC Package 5V ± 10% Supply High Reliability CMOS Technology – 2,000V ESD Protection – 200 mA Latchup Immunity Rapid™ Programming Algorithm - 50 µs/byte (typical) CMOS and TTL Compatible Inputs and Outputs Integrated Product Identification Code Commercial and Industrial Temperature Range Description The AT27C520 is a low-power, high performance 524,288 bit one-time programmable read only memory (OTP EPROM) organized 64K by 8 bits. It incorporates latches for the 8 lower order address bits to multiplex with the 8 data bits. This minimizes system chip count, reduces cost, and simplifies the design of multiplexed bus systems. It requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 70 ns, eliminating the need for speed reducing WAIT states on high performance microprocessor systems. Atmel’s scaled CMOS technology provides high speed, lower active power consumption, and significantly faster programming. Power consumption is typically only 8 mA in Active Mode. (continued) 512K (64K x 8) Multiplexed Addresses/ Outputs OTP EPROM AT27C520 Pin Configurations Pin Name Function A8 - A15 Addresses AD0 - AD7 Addresses/Outputs OE /VPP Output Enable/Program Supply ALE Address Latch Enable SOIC Top View OE/VPP A15 A13 A11 A9 AD0 AD2 AD4 AD6 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC ALE A14 A12 A10 A8 AD1 AD3 AD5 AD7 TSSOP Top View A10 A12 A14 ALE VCC OE/VPP A15 A13 A11 A9 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 A8 AD1 AD3 AD5 AD7 GND AD6 AD4 AD2 AD0 Rev. 0752D–10/98 1 The AT27C520 is available in 173 mil, 20-pin TSSOP; 300 mil and, 20-pin SOIC; one-time programmable (OTP) plastic packages. With 64K byte storage capability, the AT27C520 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. Atmel's 27C520 has additional features to ensure high quality and efficient production use. The Rapid™ Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 50 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. System Considerations Switching under active conditions may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the V CC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. Block Diagram VCC GND AD7 - AD0 A15 - A8 OE, ALE, AND PROGRAM LOGIC LATCHES OE/VPP ALE 8 8 OUTPUT BUFFERS Y DECODER Y-GATING X DECODER CELL MATRIX IDENTIFICATION 2 AT27C520 AT27C520 Absolute Maximum Ratings* Temperature Under Bias ................................ -55°C to +125°C *NOTICE: Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .........................................-2.0V to +7.0V(1) Voltage on A9 with Respect to Ground ......................................-2.0V to +14.0V(1) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. VPP Supply Voltage with Respect to Ground .......................................-2.0V to +14.0V(1) Note: 1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns. Operating Modes Mode/Pin Read Output Disable Address Latch Enable Rapid Program (2) ALE OE/VPP A8 - A15 AD0 - AD7 VIL VIL Ai DOUT VIL/VIH VIH X(1) High Z/A0 - A7 VIH VIH X A0 - A7 VIH VPP Ai DIN (4) (3) Product Identification Notes: VIL VIL A9 = VH A8 = VIH or VIL A10 - A15 = VIL Identification Code 1. X can be VIL or VIH. 2. Refer to Programming Characteristics. 3. VH = 12.0 ± 0.5V. 4. Two identifier bytes may be selected. All A8 - A15 inputs are held low (VIL), except A9 which is set to VH and A8 which is toggled low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte. 3 DC and AC Operating Conditions for Read Operation AT27C520-70 AT27C520-90 0°C - 70°C 0°C - 70°C -40°C - 85°C -40°C - 85°C 5V ± 10% 5V ± 10% Com. Operating Temperature (Case) Ind. VCC Supply DC and Operating Characteristics for Read Operation Symbol Parameter Condition ILI Max Units Input Load Current VIN = 0V to VCC ±1 µA Input Load Current A13 VIN = 0V to VCC ±100 µA ILO Output Leakage Current VOUT = 0V to VCC ±5 µA ICC VCC Active Current f = 5 MHz, IOUT = 0 mA 20 mA VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 VCC + 0.5 V VOL Output Low Voltage IOL = 2.1 mA 0.4 V Output High Voltage IOH = -400 µA ILI2 (1) VOH Note: 4 1. For address input A13 only. AT27C520 Min 2.4 V AT27C520 AC Characteristics for Read Operation AT27C520-70 AT27C520-90 Min Min Symbol Parameter Condition tACC(2) Address to Output Delay ALE = OE/VPP = VIL tAS Address Setup Time OE/VPP = VIH 12 15 ns tAH Address Hold Time OE/VPP = VIH 12 15 ns tALE 40 45 ns 70 Max Units 90 ns Address Latch Enable Width OE/VPP = VIH (2) OE/VPP to Output Delay ALE = VIL 30 35 ns (3)(4) OE/VPP High to Output Float ALE = VIL 25 25 ns Output Hold from Address or OE/VPP , whichever occurred first ALE = VIL tOE tDF Max tOH Note: 7 0 ns 2, 3, 4 — see AC Waveforms for Read Operation AC Waveforms for Read Operation(1) tALE ALE OE/VPP tDF tAS AD7 - AD0 tAH tOH tOE ADDRESS IN DATA OUT tACC A15 - A8 Notes: 1. Timing measurement reference levels for all speed grades are VOL = 0.8V and VOH = 2.0V. Input AC drive levels are VIL = 0.45V and VIH = 2.4V. 2. OE/VPP may be delayed up to tACC - tOE after the address is valid without impact on tACC. 3. This parameter is only sampled and is not 100% tested. 4. Output float is defined as the point when data is no longer driven. Input Test Waveforms and Measurement Levels Output Test Load For -70 and -90 devices: Note: tR, tF < 20 ns (10% to 90%) CL = 100 pF including jig capacitance. Pin Capacitance f = 1 MHz, T = 25°C(1) Symbol CIN COUT Note: Typ Max Units Conditions 4 6 pF VIN = 0V 8 12 pF VOUT = 0V 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. 5 Programming Waveforms PROGRAM VCC READ (VERIFY) 6.5V 5.0V tVCS 13V OE/VPP VIH VIL tOES tOEH tPRT ALE tVR tLP VIH VIL tALE tALE tPW tOE AD7 - AD0 VIH VIL A15 - A8 VIH VIL tLAS tLAH ADDR tDS DATA IN tDH tLAS tDFP tLAH ADDR DATA OUT tAS Notes: tAH ADDRESS STABLE 1. The Input Timing Reference is 0.8V for V IL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. DC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V Limits Symbol Parameter Test Conditions ILI Input Load Current Input Load Current A13 ILI2 (1) Min Max Units VIN = VIL, VIH ±10 µA VIN = VIL, VIH ±100 µA VIL Input Low Level -0.6 0.8 V VIH Input High Level 2.0 VCC + 1.0 V VOL Output Low Voltage IOL = 2.1 mA 0.4 V VOH Output High Voltage IOH = -400 µA ICC2 VCC Supply Current (Program and Verify) IPP2 Note: 6 OE/VPP Current 1. For address input A13 only. AT27C520 ALE = VIH 2.4 V 25 mA 25 mA AT27C520 AC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V Limits (1) Symbol Parameter Test Conditions Min tALE Address Latch Enable Width 500 ns tLAS Latched Address Setup Time 100 ns tLAH Latched Address Hold Time 100 ns tLP ALE Low to OE/VPP High Voltage Delay 2 µs tOES OE/VPP Setup Time 2 µs tOEH OE/VPP Hold Time 2 µs tDS Data Setup Time 2 µs tDH Data Hold Time 2 µs Input Rise and Fall Times (10% to 90%) 20 ns Input Pulse Levels 0.45V to 2.4V tPW ALE Program Pulse Width tVR OE/VPP Recovery Time tVCS VCC Setup Time tOE Data Valid from OE/VPP (2) Input Timing Reference Level 0.8V to 2.0V Max 47.5 52.5 µs 2 µs 2 µs Output Timing Reference Level 0.8V to 2.0V (3) Units 150 ns 130 ns tDFP OE/VPP High to Output Float Delay 0 tAS Address Setup Time 2 µs tAH Address Hold Time 0 µs tPRT OE/VPP Pulse Rise Time During Programming 50 ns Notes: 1. VCC must be applied simultaneously or before OE/VPP and removed simultaneously or after OE/VPP. 2. Program Pulse width tolerance is 50 µsec ± 5%. 3. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven — see timing diagram. Atmel’s 27C520 Integrated Product Identification Code Pins A8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 Hex Data Manufacturer 0 0 0 0 1 1 1 1 0 1E Device Type 1 1 0 0 1 1 1 0 1 9D Codes 7 Rapid™ Programming Algorithm A 50 µs ALE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and OE/VPP is raised to 13.0V. Each address is first programmed with one 50 µs ALE pulse without verification. Then a verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 50 µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. OE/VPP is then lowered to VIH and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails. START ADDR = FIRST LOCATION VCC = 6.5V VPP = 13.0V PROGRAM ONE 50 µS PULSE INCREMENT ADDRESS NO LAST ADDR.? YES ADDR = FIRST LOCATION INCREMENT ADDRESS X=0 NO LAST ADDR.? PASS VERIFY BYTE FAIL INCREMENT X YES PROGRAM ONE 50 µS PULSE PASS DEVICE PASSED 8 AT27C520 X = 10? YES VCC = 5.0V VPP = 5.0V COMPARE ALL BYTES TO ORIGINAL DATA NO FAIL DEVICE FAILED AT27C520 Ordering Information tACC (ns) ICC (mA) Active 70 20 90 20 Ordering Code Package AT27C520-70SC AT27C520-70XC 20S 20X Operation Range Commercial (0°C to 70°C) AT27C520-70SI AT27C520-70XI 20S 20X Industrial (-40°C to 85°C) AT27C520-90SC AT27C520-90XC 20S 20X Commercial (0°C to 70°C) AT27C520-90SI AT27C520-90XI 20S 20X Industrial (-40°C to 85°C) Package Type 20S 20-Lead, 0.300" Wide, Plastic Gull-Wing Small Outline (SOIC) 20X 20-Lead, 0.173" Wide, Thin Shrink Small Outline (TSSOP) 9 Packaging Information 20S, 20-Lead, 0.300" Wide, Plastic Gull Wing Small Outline Dimensions in Inches and (Millimeters) 20X, 20-Lead, 0.173" Wide, Thin Super Small Outline Package (TSSOP) Dimensions in (Millimeters) and Inches 0.30(0.012) 0.18(0.007) 0.020 (0.508) 0.013 (0.330) 0.299 (7.60) 0.420 (10.7) 0.291 (7.39) 0.393 (9.98) PIN 1 4.48(.176) 6.50(.256) 4.30(.169) 6.25(.246) PIN 1 ID .050 (1.27) BSC 0.65(.0256) BSC 0.513 (13.0) 0.497 (12.6) 0.105 (2.67) 0.092 (2.34) 6.60(.260) 6.40(.252) 0.15(.006) 0.05(.002) 0.012 (0.305) 0.003 (0.076) 0 REF 8 0.18(.007) 0.09(.003) 0.013 (0.330) 0.009 (0.229) 0 REF 8 0.035 (0.889) 0.015 (0.381) 10 1.10(0.043) MAX AT27C520 0.70(.028) 0.50(.020) AT27C520 11 Atmel Headquarters Atmel Operations Corporate Headquarters Atmel Colorado Springs 2325 Orchard Parkway San Jose, CA 95131 TEL (408) 441-0311 FAX (408) 487-2600 Europe 1150 E. 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