AT29C1024-70TC

Features • Fast Read Access Time - 70 ns • 5-Volt Only Reprogramming • Sector Program Operation • • • • • • • • • – Single Cycle Reprogram (Erase and Program) – 512 Sectors (128 words/sector) – Internal Address and Data Latches for 128 Words Internal Program Control and Timer Hardware and Software Data Protection Fast Sector Program Cycle Time - 10 ms DATA Polling for End of Program Detection Low Power Dissipation – 60 mA Active Current – 200 µA CMOS Standby Current Typical Endurance > 10,000 Cycles Single 5V ± 10% Supply CMOS and TTL Compatible Inputs and Outputs Commercial and Industrial Temperature Ranges 1-Megabit (64K x 16) 5-volt Only Flash Memory Description The AT29C1024 is a 5-volt-only in-system Flash programmable and erasable read only memory (PEROM). Its 1 megabit of memory is organized as 65,536 words by 16 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers access times to 70 ns with power dissipation of just 330 mW. When the device is deselected, the CMOS standby current is less than 200 µA. The device endurance is such that any sector can typically be written to in excess of 10,000 times. (continued) AT29C1024 Pin Configurations Pin Name Function A0 - A15 Addresses CE Chip Enable OE Output Enable WE Write Enable I/O0 - I/O15 Data Inputs/Outputs NC No Connect DC Don’t Connect TSOP Top View Type 1 39 38 37 36 35 34 33 32 31 30 29 18 19 20 21 22 23 24 25 26 27 28 7 8 9 10 11 12 13 14 15 16 17 I/O3 I/O2 I/O1 I/O0 OE DC A0 A1 A2 A3 A4 I/O12 I/O11 I/O10 I/O9 I/O8 GND NC I/O7 I/O6 I/O5 I/O4 6 5 4 3 2 1 44 43 42 41 40 I/O13 I/O14 I/O15 CE NC NC VCC WE NC A15 A14 PLCC Top View A13 A12 A11 A10 A9 GND NC A8 A7 A6 A5 NC A0 A1 A2 A3 A4 A5 NC A6 A7 A8 VSS A9 A10 A11 NC A12 A13 A14 A15 NC WE VCC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC OE O0 O1 O2 O3 O4 NC O5 O6 O7 VSS O8 O9 O10 NC O11 O12 O13 O14 O15 CE NC NC Rev. 0571A–10/98 1 To allow for simple in-system reprogrammability, the AT29C1024 does not require high input voltages for programming. Five-volt-only commands determine the operation of the device. Reading data out of the device is similar to reading from an EPROM. Reprogramming the AT29C1024 is performed on a sector basis; 128 words of data are loaded into the device and then simultaneously programmed. During a reprogram cycle, the address locations and 128 words of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a program cycle, the device will automatically erase the sector and then program the latched data using an internal control timer. The end of a program cycle can be detected by DATA polling of I/O7 or I/O15. Once the end of a program cycle has been detected, a new access for a read or program can begin. Block Diagram Device Operation READ: The AT29C1024 is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever CE or OE is high. This dual-line control gives designers flexibility in preventing bus contention. DATA LOAD: Data loads are used to enter the 128 words of a sector to be programmed or the software codes for data protection. A data load is performed by applying a low pulse on the WE or CE input with CE or WE low (respectively) and OE high. The address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE. PROGRAM: The device is reprogrammed on a sector basis. If a word of data within a sector is to be changed, data for the entire sector must be loaded into the device. Any word that is not loaded during the programming of its sector will be erased to read FFH. Once the words of a sector are loaded into the device, they are simultaneously programmed during the internal programming period. After the first data word has been loaded into the device, successive words are entered in the same manner. Each new word to be programmed must have its high to low transition on WE (or CE) within 150 µs of the low to high transition of WE (or CE) of the preceding word. If a high to low transition is not detected within 150 µs of the last low to high transition, the 2 AT29C1024 load period will end and the internal programming period will start. A7 to A15 specify the sector address. The sector address must be valid during each high to low transition of WE (or CE). A0 to A6 specify the word address within the sector. The words may be loaded in any order; sequential loading is not required. Once a programming operation has been initiated, and for the duration of tWC, a read operation will effectively be a polling operation. SOFTWARE DATA PROTECTION: A software controll ed data pr otec tion feature is av ailable on the AT29C1024. Once the software protection is enabled a software algorithm must be issued to the device before a program may be performed. The software protection feature may be enabled or disabled by the user; when shipped from Atmel, the software data protection feature is disabled. To enable the software data protection, a series of three program commands to specific addresses with specific data must be performed. After the software data protection is enabled the same three program commands must begin each program cycle in order for the programs to occur. All software program commands must obey the sector program timing specifications. Once set, software data protection will remain active unless the disable command sequence is issued. Power transitions will not reset the software data protection feature, however the software feature will guard against inadvertent program cycles during power transitions. AT29C1024 After setting SDP, any attempt to write to the device without the 3-word command sequence will start the internal write timers. No data will be written to the device; however, for the duration of t WC, a read operation will effectively be a polling operation. After the software data protection’s 3-word command code is given, a sector of data is loaded into the device using the sector programming timing specifications. HARDWARE DATA PROTECTION: Hardware features protect against inadvertent programs to the AT29C1024 in the following ways: (a) V CC sense—if V CC is below 3.8V (typical), the program function is inhibited; (b) VCC power on delay—once V CC has reached the V CC sense level, the device will automatically time out 5 ms (typical) before programming; (c) Program inhibit—holding any one of OE low, CE high or WE high inhibits program cycles; and (d) Noise filter—pulses of less than 15 ns (typical) on the WE or CE inputs will not initiate a program cycle. PRODUCT IDENTIFICATION: The product identification mode identifies the device and manufacturer as Atmel. It may be accessed by hardware or software operation. The hardware operation mode can be used by an external programmer to identify the correct programming algorithm for the Atmel product. In addition, users may wish to use the software product identification mode to identify the part (i.e. using the device code), and have the system software use the appropriate sector size for program operations. In this manner, the user can have a common board design for various Flash densities and, with each density’s sector size in a memory map, have the system software apply the appropriate sector size. For details, see Operating Modes (for hardware operation) or Software Product Identification. The manufacturer and device code is the same for both modes. DATA POLLING: The AT29C1024 features DATA polling to indicate the end of a program cycle. During a program cycle an attempted read of the last word loaded will result in the complement of the loaded data on I/O7 and I/O15. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin. DATA polling may begin at any time during the program cycle. TOGGLE BIT: In addition to DATA polling the AT29C1024 provides another method for determining the end of a program or erase cycle. During a program or erase operation, successive attempts to read data from the device will result in I/O6 and I/O14 toggling between one and zero. Once the program cycle has completed, I/O6 and I/O14 will stop toggling and valid data will be read. Examining the toggle bit may begin at any time during a program cycle. OPTIONAL CHIP ERASE MODE: The entire device can be erased by using a 6-byte software code. Please see Software Chip Erase application note for details. Absolute Maximum Ratings* Temperature Under Bias ................................ -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C All Input Voltages (including NC Pins) with Respect to Ground ...................................-0.6V to +6.25V All Output Voltages with Respect to Ground .............................-0.6V to VCC + 0.6V *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Voltage on OE with Respect to Ground ...................................-0.6V to +13.5V 3 DC and AC Operating Range AT29C1024-70 AT29C1024-90 AT29C1024-12 AT29C1024-15 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C 5 V ± 5% 5 V ± 10% 5 V ± 10% 5 V ± 10% Com. Operating Temperature (Case) Ind. VCC Power Supply Operating Modes Mode CE OE WE Ai I/O VIL VIL VIH Ai DOUT Program VIL VIH VIL Ai DIN 5V Chip Erase VIL VIH VIL Ai Standby/Write Inhibit VIH X(1) X X Program Inhibit X X VIH Program Inhibit X VIL X Output Disable X VIH X VIL VIL VIH Read (2) High Z High Z Product Identification Hardware A1 - A15 = VIL, A9 = VH,(3) A0 = VIL Manufacturer Code(4) A1 - A15 = VIL, A9 = VH,(3) A0 = VIH Device Code(4) Software(5) Notes: A0 = VIL Manufacturer Code(4) A0 = VIH Device Code(4) 1. X can be VIL or VIH. 2. Refer to AC Programming Waveforms. 3. VH = 12.0V ± 0.5V. 4. Manufacturer Code: 1F, Device Code: 25. 5. See details under Software Product Identification Entry/Exit. DC Characteristics Symbol Parameter Condition ILI Input Load Current ILO Max Units VIN = 0V to VCC 10 µA Output Leakage Current VI/O = 0V to VCC 10 µA Com. 200 ISB1 VCC Standby Current CMOS CE = VCC - 0.3V to VCC µA Ind. 200 µA ISB2 VCC Standby Current TTL CE = 2.0V to VCC 3 mA ICC VCC Active Current f = 5 MHz; IOUT = 0 mA 60 mA VIL Input Low Voltage 0.8 V VIH Input High Voltage VOL Output Low Voltage IOL = 2.1 mA VOH1 Output High Voltage IOH = -400 µA 2.4 V VOH2 Output High Voltage CMOS IOH = -100 µA; VCC = 4.5V 4.2 V 4 Min 2.0 AT29C1024 V 0.45 V AT29C1024 AC Read Characteristics AT29C1024-70 Parameter tACC Address to Output Delay 70 90 tCE(1) CE to Output Delay 70 90 (2) OE to Output Delay 0 35 0 45 0 60 (3)(4) CE or OE to Output Float 0 25 0 25 0 30 Output Hold from OE, CE or Address, whichever occurred first 0 tDF tOH Max Min AT29C1024-12 Symbol tOE Min AT29C1024-90 Max Min 0 0 Max AT29C1024-15 Min Max Units 120 150 ns 120 150 ns 0 70 ns 0 40 ns 0 ns AC Read Waveforms(1)(2)(3)(4) ADDRESS ADDRESS VALID CE tCE tOE OE tDF tOH tACC OUTPUT Notes: HIGH Z OUTPUT VALID 1. CE may be delayed up to tACC - tCE after the address transition without impact on tACC. 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an address change without impact on tACC. 3. tDF is specified from OE or CE whichever occurs first (CL = 5 pF). 4. This parameter is characterized and is not 100% tested. Input Test Waveforms and Measurement Level Output Test Load 70 ns 5.0V 90/120/150 ns 5.0V 1.8K 1.8K OUTPUT PIN 1.3K tR, tF < 5 ns 30pF OUTPUT PIN 1.3K 100pF Pin Capacitance f = 1 MHz, T = 25°C(1) Symbol Typ Max Units Conditions CIN 4 6 pF VIN = 0 V COUT 8 12 pF VOUT = 0 V Note: 1. This parameter is characterized and is not 100% tested. 5 AC Word Load Characteristics Symbol Parameter Min tAS, tOES Address, OE Set-up Time 0 ns tAH Address Hold Time 50 ns tCS Chip Select Set-up Time 0 ns tCH Chip Select Hold Time 0 ns tWP Write Pulse Width (WE or CE) 70 ns tDS Data Set-up Time 50 ns tDH,tOEH Data, OE Hold Time 0 ns tWPH Write Pulse Width High 100 ns AC Word Load Waveforms WE Controlled OE tOES tOEH ADDRESS CE WE tAS tAH tCH tCS tWPH tWP tDS DATA IN CE Controlled 6 AT29C1024 tDH Max Units AT29C1024 Program Cycle Characteristics Symbol Parameter Min Max Units tWC Write Cycle Time 10 ms tAS Address Set-up Time 0 ns tAH Address Hold Time 50 ns tDS Data Set-up Time 50 ns tDH Data Hold Time 0 ns tWP Write Pulse Width 70 ns tWLC Word Load Cycle Time tWPH Write Pulse Width High 150 100 µs ns Program Cycle Waveforms(1)(2)(3) Notes: 1. A7 through A15 must specify the sector address during each high to low transition of WE (or CE). 2. OE must be high when WE and CE are both low. 3. All words that are not loaded within the sector being programmed will be indeterminate. 7 Software Data Protection Enable Algorithm(1) Software Data Protection Disable Algorithm(1) LOAD DATA AAAA TO ADDRESS 5555 LOAD DATA AAAA TO ADDRESS 5555 LOAD DATA 5555 TO ADDRESS 2AAA LOAD DATA 5555 TO ADDRESS 2AAA LOAD DATA A0A0 TO ADDRESS 5555 WRITES ENABLED LOAD DATA 8080 TO ADDRESS 5555 LOAD DATA ENTER DATA TO SECTOR (128 WORDS)(4) PROTECT STATE(2) LOAD DATA AAAA TO ADDRESS 5555 Notes for software program code: 1. Data Format: I/O15 - I/O0 (Hex); Address Format: A14 - A0 (Hex). 2. Write Protect state will be activated at end of write period even if no other data is loaded. 3. Write Protect state will be deactivated at end of write period even if no other data is loaded. 4. 128 words of data MUST BE loaded. LOAD DATA 5555 TO ADDRESS 2AAA LOAD DATA 2020 TO ADDRESS 5555 EXIT DATA PROTECT STATE(3) LOAD DATA XXXX TO SECTOR (128 WORDS)(4) Software Protected Program Cycle Waveform(1)(2)(3) Note: 8 1. A7 through A16 must specify the same page address during each high to low transition of WE (or CE) after the software code has been entered. 2. OE must be high when WE and CE are both low. 3. All bytes that are not loaded within the sector being programmed will be indeterminate. AT29C1024 AT29C1024 Data Polling Characteristics(1) Symbol Parameter tDH Data Hold Time tOEH OE Hold Time Min Max OE to Output Delay tWR Write Recovery Time Units 0 ns 0 ns (2) tOE Notes: Typ ns 0 ns 1. These parameters are characterized and not 100% tested. 2. See tOE spec in AC Read Characteristics. Data Polling Waveforms Toggle Bit Characteristics(1) Symbol Parameter tDH Data Hold Time 10 ns tOEH OE Hold Time 10 ns tOE OE to Output Delay(2) tOEHP OE High Pulse tWR Write Recovery Time Notes: Min Typ Max Units ns 150 ns 0 ns 1. These parameters are characterized and not 100% tested. 2. See tOE spec in AC Read Characteristics. Toggle Bit Waveforms(1)(2)(3) Notes: 1. Toggling either OE or CE or both OE and CE will operate toggle bit. 2. Beginning and ending state of I/O6 and I/O14 may vary. 3. Any address location may be used but the address should not vary. 9 Software Product Identification Entry(1) LOAD DATA AAAA TO ADDRESS 5555 LOAD DATA AAAA TO ADDRESS 5555 LOAD DATA 5555 TO ADDRESS 2AAA LOAD DATA 5555 TO ADDRESS 2AAA LOAD DATA 9090 TO ADDRESS 5555 LOAD DATA F0F0 TO ADDRESS 5555 PAUSE 10 mS ENTER PRODUCT IDENTIFICATION MODE(2)(3)(5) Notes for software product identification: 1. Data Format: I/O15 - I/O0 (Hex); Address Format: A14 - A0 (Hex). 2. A1 - A15 = VIL. Manufacturer Code is read for A0 = VIL; Device Code is read for A0 = VIH. 3. The device does not remain in identification mode if powered down. 4. The device returns to standard operation mode. 5. Manufacturer Code is 1F. The Device Code is 25. 10 Software Product Identification Exit(1) AT29C1024 PAUSE 10 mS EXIT PRODUCT IDENTIFICATION MODE(4) AT29C1024 NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE NORMALIZED SUPPLY CURRENT vs. TEMPERATURE 1.4 N O R M 1.2 A L I 1.0 Z E D 1.4 N O R M A L I Z E D 1.3 1.2 1.1 1.0 I 0.9 C C 0.8 -55 I C C -25 5 35 65 95 125 0.8 0.6 4.50 4.75 5.00 5.25 5.50 SUPPLY VOLTAGE (V) TEMPERATURE (C) NORMALIZED SUPPLY CURRENT vs. ADDRESS FREQUENCY 1.1 N O R M 1.0 A L I 0.9 Z E D I C C VCC = 5V T = 25C 0.8 0.7 0 1 2 3 4 5 6 7 FREQUENCY (MHz) 11 Ordering Information ICC (mA) tACC (ns) Active Standby 70 60 90 120 150 Ordering Code Package 0.1 AT29C1024-70JC AT29C1024-70TC 44J 48T Commercial (0° to 70°C) 60 0.3 AT29C1024-70JI AT29C1024-70TI 44J 48T Industrial (-40° to 85°C) 60 0.1 AT29C1024-90JC AT29C1024-90TC 44J 48T Commercial (0° to 70°C) 60 0.3 AT29C1024-90JI AT29C1024-90TI 44J 48T Industrial (-40° to 85°C) 60 0.1 AT29C1024-12JC AT29C1024-12TC 44J 48T Commercial (0° to 70°C) 60 0.3 AT29C1024-12JI AT29C1024-12TI 44J 48T Industrial (-40° to 85°C) 60 0.1 AT29C1024-15JC AT29C1024-15TC 44J 48T Commercial (0° to 70°C) 60 0.3 AT29C1024-15JI AT29C1024-15TI 44J 48T Industrial (-40° to 85°C) Package Type 44J 44-Lead, Plastic J-Leaded Chip Carrier (PLCC) 48T 48-Lead, Thin Small Outline Package (TSOP) 12 AT29C1024 Operation Range AT29C1024 Packaging Information 44J, 44-Lead, Plastic J-Leaded Chip Carrier (PLCC) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-018 AA 48T, 48-Lead, Plastic Thin Small Outline Package (TSOP) Dimensions in Millimeters and (Inches)* JEDEC OUTLINE MO-142 DD .045(1.14) X 45° PIN NO. 1 IDENTIFY .045(1.14) X 30° - 45° .012(.305) .008(.203) .630(16.0) .590(15.0) .656(16.7) SQ .650(16.5) .032(.813) .026(.660) .695(17.7) SQ .685(17.4) .050(1.27) TYP .500(12.7) REF SQ .021(.533) .013(.330) .043(1.09) .020(.508) .120(3.05) .090(2.29) .180(4.57) .165(4.19) .022(.559) X 45° MAX (3X) *Controlling dimension: millimeters 13 14 AT29C1024 AT29C1024 15 Atmel Headquarters Atmel Operations Corporate Headquarters Atmel Colorado Springs 2325 Orchard Parkway San Jose, CA 95131 TEL (408) 441-0311 FAX (408) 487-2600 Europe 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL (719) 576-3300 FAX (719) 540-1759 Atmel Rousset Atmel U.K., Ltd. Coliseum Business Centre Riverside Way Camberley, Surrey GU15 3YL England TEL (44) 1276-686677 FAX (44) 1276-686697 Zone Industrielle 13106 Rousset Cedex, France TEL (33) 4 42 53 60 00 FAX (33) 4 42 53 60 01 Asia Atmel Asia, Ltd. Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon, Hong Kong TEL (852) 27219778 FAX (852) 27221369 Japan Atmel Japan K.K. Tonetsu Shinkawa Bldg., 9F 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL (81) 3-3523-3551 FAX (81) 3-3523-7581 Fax-on-Demand North America: 1-(800) 292-8635 International: 1-(408) 441-0732 e-mail literature@atmel.com Web Site http://www.atmel.com BBS 1-(408) 436-4309 © Atmel Corporation 1998. Atmel Cor poration makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s website. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual proper ty of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life suppor t devices or systems. Marks bearing ® and/or ™ are registered trademarks and trademarks of Atmel Corporation. Terms and product names in this document may be trademarks of others. Printed on recycled paper. 0571A–10/98/xM