AT42QT1040-MMHR

Atmel AT42QT1040 Four-key QTouch® Touch Sensor IC DATASHEET Features  Number of QTouch® Keys:  Up to four  Discrete Outputs:  Four discrete outputs indicating individual key touch  Technology:  Patented spread-spectrum charge-transfer (direct mode)  Electrode Design:  Simple self-capacitance style (refer to the Touch Sensors Design Guide)  Electrode Materials:  Etched copper, silver, carbon, Indium Tin Oxide (ITO)  Electrode Substrates:  PCB, FPCB, plastic films, glass  Panel Materials:  Plastic, glass, composites, painted surfaces (low particle density metallic paints possible)  Panel Thickness:  Up to 10 mm glass, 5 mm plastic (electrode size dependent)  Key Sensitivity:  Fixed key threshold, sensitivity adjusted via sample capacitor value  Adjacent Key Suppression  Patented Adjacent Key Suppression® (AKS®) technology to enable accurate key detection  Interface:  Pin-per-key outputs, plus debug mode to observe sensor signals  Moisture Tolerance:  Increased moisture tolerance based on hardware design and firmware tuning  Signal Processing:  Self-calibration, auto drift compensation, noise filtering  Applications:  Mobile, consumer, white goods, toys, kiosks, POS, and so on  Power:  1.8 V – 5.5 V  Package:  20-pin 3 x 3 mm VQFN RoHS compliant 9524D–AT42–05/2013 NC SNS3 Pinout Configuration NC 1.1 NC Pinout and Schematic SNSK2 1. 20 19 18 17 16 1 15 SNSK3 SNSK1 2 14 OUT2 SNS1 3 13 OUT3 SNSK0 4 12 OUT1 SNS0 5 11 10 OUT0 6 7 8 9 NC NC VSS VDD QT1040 NC SNS2 AT42QT1040 [DATASHEET] 9524D–AT42–05/2013 2 1.2 Pin Descriptions Table 1-1. Pin Listing Pin Name Type Function Notes If Unused... 1 SNS2 I/O Sense pin To Cs2 Leave open 2 SNSK1 I/O Sense pin and option detect To Cs1 and option resistor + key Connect to option resistor* 3 SNS1 I/O Sense pin To Cs1 Leave open 4 SNSK0 I/O Sense pin and option detect To Cs0 and option resistor + key Connect to option resistor* 5 SNS0 I/O Sense pin To Cs0 Leave open 6 N/C – – – 7 N/C – – – 8 Vss P Supply ground – 9 Vdd P Power – 10 N/C – – – 11 OUT0 OD Out 0 Alternative function: Debug CLK Leave open 12 OUT1 OD Out 1 Alternative function: Debug DATA Leave open 13 OUT3 OD Out 3 Leave open 14 OUT2 OD Out 2 Leave open 15 SNSK3 I/O Sense pin To Cs3 + key Leave open 16 SNS3 I/O Sense pin To Cs3 Leave open 17 N/C – – – 18 N/C – – – 19 N/C – – – 20 SNSK2 I/O Sense pin To Cs2 + key Leave open * Option resistor should always be fitted even if channel is unused and Cs capacitor is not fixed. I/O CMOS input and output OD CMOS open drain output P Ground or power AT42QT1040 [DATASHEET] 9524D–AT42–05/2013 3 1.3 Schematic Figure 1-1. Typical Circuit NOTES: VUNREG 1) The central pad on the underside of the VQFN chip is a Vss pin and should be connected to ground. Do not put any other tracks underneath the body of the chip. VREG 2) It is important to place all Cs and Rs components physically near to the chip. Creg Creg J1 VDD 1 Follow regulator manufacturer's recommended values for input and output bypass capacitors (Creg). GND Add a 100 nF capacitor close to pin 9. RAKS ON 2 VDD OFF 3 LED0 LED1 LED2 LED3 AKS SELECT J2 VDD 1 RFS FAST 2 9 SLOW RL0 11 RL1 12 RL2 14 RL3 13 Example use of output pins OUT0 VDD 3 SPEED SELECT OUT1 OUT2 SNSK0 OUT3 SNS0 SNSK1 J3 4 3 2 1 SNS1 4 QT1040 3 2 1 SNSK2 6 7 10 17 18 SNS2 Rs1 2 3 Key1 Cs1 Rs2 20 1 Key0 Cs0 Key2 Cs2 N/C N/C SNSK3 N/C SNS3 Rs3 15 16 Key3 Cs3 N/C N/C 8 19 N/C 5 VSS 5 5 Rs0 4 Suggested regulator manufacturers:  Torex (XC6215 series)  Seiko (S817 series)  BCDSemi (AP2121 series) For component values in Figure 1-1 check the following sections:  Section 3.1 on page 7: Cs capacitors (Cs0 – Cs3)  Section 3.5 on page 7: Voltage levels  Section 3.3 on page 7: LED traces AT42QT1040 [DATASHEET] 9524D–AT42–05/2013 4 2. Overview of the AT42QT1040 2.1 Introduction The AT42QT1040 (QT1040) is a digital burst mode charge-transfer (QT™) capacitive sensor driver designed for touch-key applications. The device can sense from one to four keys; one to three keys can be disabled by not installing their respective sense capacitors. Any of the four channels can be disabled in this way. The device includes all signal processing functions necessary to provide stable sensing under a wide variety of changing conditions, and the outputs are fully de-bounced. Only a few external parts are required for operation. The QT1040 modulates its bursts in a spread-spectrum fashion in order to heavily suppress the effects of external noise, and to suppress RF emissions. 2.2 Signal Processing 2.2.1 Detect Threshold The internal signal threshold level is fixed at 10 counts of change with respect to the internal reference level. This in turn adjusts itself slowly in accordance with the drift compensation mechanism. See Section 3.1 on page 7 for details on how to adjust the sensitivity of each key. When going out of detect there is a hysteresis element to the detection. The signal threshold must drop below 8 counts of change with respect to the internal reference level to register as un-touched. 2.2.2 Detection Integrator The device features a detection integration mechanism, which acts to confirm a detection in a robust fashion. A perkey counter is incremented each time the key has exceeded its threshold, and a key is only finally declared to be touched when this counter reaches a fixed limit of 5. In other words, the device has to exceed its threshold, and stay there for 5 acquisitions in succession without going below the threshold level, before the key is declared to be touched. 2.2.3 Burst Length Limitations Burst length is the number of times the charge transfer process is performed on a given channel; that is, the number of pulses it takes to measure the key capacitance. The maximum burst length is 2048 pulses. The recommended design is to use a capacitor that gives a signal of