Atmel AT88SA100S
Atmel CryptoAuthentication Battery Authentication Chip
DATASHEET
Not Recommended for New Designs
Replaced by ATSHA204
Features
•
•
•
•
•
•
•
•
Secure battery authentication
Superior SHA-256 hash algorithm
Best in class 256-bit key length
Guaranteed unique 48-bit serial number
High speed single wire interface
Supply voltage: 2.7V – 5.25 V
=3.7 V; must be 0xFFFF otherwise.
Data
–
0
Table 6-8.
Name
Success
Output Parameters
Size
1
Notes
Upon successful completion, a value of 0 will be returned by the Atmel AT88SA100S.
Atmel AT88SA100S [DATASHEET]
8558G−CRYPTO−9/2012
15
6.4
GenPersonalizationKey
This command generates a decryption digest that will be used by the subsequent command (LoadSram) to decrypt the key
value that is to be written into the SRAM. This command must be run immediately prior to LoadSram within the same
watchdog cycle.
This command loads a transport key from an internal secure storage location and then uses that key along with an input seed
to generate a decryption digest using SHA-256. Neither the transport key nor the decryption digest can be read from the chip.
Upon completion, an internal bit is set indicating that the decryption digest has been generated and is ready to use by
LoadSram. This bit is cleared (and the digest lost) when the watchdog timer expires, the chip goes to sleep or the power is
cycled.
Table 6-9.
Input Parameters
Name
Size
Notes
Opcode
GenPers
1
0x20
Param1
Zero
1
Must be 0x00
Param2
KeyID
2
Identification number of the personalization key to be loaded
Data
Seed
16
Seed for digest generation. The least significant bit of the last byte is ignored
Table 6-10. Output Parameter
Name
Size
Success
1
Notes
Upon successful execution, a value of 0 will be returned by the AT88SA100S chip
The SHA-256 message body used to create the decryption digest which is internally stored in the chip consists of the following
512-bits:
256-bits
64-bits
127-bits
1-bit
64-bits
Stored Key[KeyID]
All ones
Input seed
‘1’ pad
length of message in bits, fixed at 447
Atmel AT88SA100S [DATASHEET]
8558G−CRYPTO−9/2012
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6.5
LoadSram
Writes 256-bits into the battery backed SRAM and locks this memory against further modification. The value in the battery
backed SRAM cannot be read, it must be verified via the MAC command. If the secret value in the SRAM is already valid then
this command will fail with an error response. The only way to unlock the SRAM is to remove power from the AT88SA100S.
The input data (secret key) is always decrypted using the decryption digest previously generated by GenPersonalizationKey
prior to being written into the battery backed SRAM.
Note:
Both the GenPersonalizationKey and LoadSram commands must be run consecutively within a single Wake
cycle prior to the expiration of the watchdog timer. If any command is inserted between these two operations
then LoadSram will fail.
Table 6-11. Input Parameters
Name
Size
Notes
Opcode
LOADSRAM
1
0x10
Param1
Zero1
1
Must be 0x00
Param2
Zero2
2
Must be 0x0000
Data
Key
32
Encrypted value to be written into the SRAM
Table 6-12. Output Parameter
Name
Success
Size
1
Notes
Upon successful execution, a value of 0 will be returned by the AT88SA100S chip
The AT88SA100S chip executes the following sequence on receipt of this command.
1.
2.
3.
4.
If the internal flag (indicating that a personalization key has been loaded) is not set, then return error. If the
MemValid flag is set, return error
Successively XOR each byte in the data (secret key) parameter with the corresponding byte from the personalization
key generated by GenPersonalizationKey
Transfer the resulting bytes to the battery backed SRAM
Set MemValid (internal flag) to one
Atmel AT88SA100S [DATASHEET]
8558G−CRYPTO−9/2012
17
6.6
PauseLong
Forces the chip into the pause state until the watchdog timer expires, after which it will automatically enter into the sleep state.
During execution of this command the chip will ignore all activity on the IO signal. This command is used to prevent bus
conflicts in a system that also includes the CryptoAuthentication host chip sharing the same signal wire.
Table 6-13. Input Parameters
Name
Size
Notes
Opode
PAUSELONG
1
0x01
Param1
Selector
1
Which chip to put into the pause state, 0x00 for all chips
Param2
Zero
2
Must be 0x0000
Data
Ignored
0
Table 6-14. Output Parameter
Name
Success
Size
1
Notes
If the command indicates that some other chip should go into the pause state, a value of zero will be
returned by this AT88SA100S chip. If this chip goes into the pause state no value will be returned.
The selector parameter provides a mechanism to select which AT88SA100S will pause if there are multiple devices on the
bus:
•
•
If the selector parameter is 0x00, then every chip receiving this command will go into the pause state and no chip will
return a success code.
If any of the bits of the selector parameter are set, then the chip will read the values of Fuse[84-87] and go to sleep
only if those fuse values match the least significant four bits of the selector parameter. If the chip does not go into
the pause state, it returns an error code of 0x0F. Otherwise, it goes into the pause state and never returns any code.
Atmel AT88SA100S [DATASHEET]
8558G−CRYPTO−9/2012
18
7.
Pinout
Table 7-1.
Pin Definitions
SOIC
SOT-23
Name
Description
5
1
Signal
IO channel to the system, open drain output. It is expected that an external pull-up
resistor will be provided to pull this signal up to VCC for proper communications.
When the chip is not in use this pin can be pulled to either VCC or GND.
8
2
VCC
Power supply, 2.7 – 5.25 V. This pin should be bypassed with a high quality 0.1µF
capacitor close to this pin with a short trace to GND
Additional applications information at www.atmel.com
4
3
GND
Connect to system ground
1,2,3,6,7
--
NC
Not connected
Atmel AT88SA100S [DATASHEET]
8558G−CRYPTO−9/2012
19
Package Drawings
3TS1 – 3-lead Shrink SOT
3
GND
E1
CL
E
Signal
SDA
VCC
1
L1
8.
2
e1
End View
Top View
b
A2
SEATING
PLANE
e
A
A1
D
Side View
Notes:
1. Dimension D does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.25mm per
end. Dimension E1 does not include interlead flash or protrusion.
Interlead flash or protrusion shall not exceed 0.25mm per side.
2. The package top may be smaller than the package bottom.
Dimensions D and E1 are determined at the outermost extremes of
the plastic body exclusive of mold flash, tie bar burrs, gate burrs and
interlead flash, but including any mismatch between the top and
bottom of the plastic body.
3. These dimensions apply to the flat section of the lead between 0.08
mm and 0.15mm from the lead tip.
This drawing is for general information only. Refer to JEDEC Drawing
TO-236, Variation AB for additional information.
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
A
A1
A2
D
E
E1
L1
e1
b
0.89
0.01
0.88
2.80
2.10
1.20
MAX
NOM
2.90
1.30
0.54 REF
1.90 BSC
0.30
-
1.12
0.10
1.02
3.04
2.64
1.40
0.50
NOTE
1,2
1,2
3
12/11/09
Package Drawing Contact:
packagedrawings@atmel.com
TITLE
GPC
DRAWING NO.
REV.
3TS1, 3-lead, 1.30mm Body, Plastic Thin
Shrink Small Outline Package (Shrink SOT)
TBG
3TS1
B
Atmel AT88SA100S [DATASHEET]
8558G−CRYPTO−9/2012
20
8S1 – 8-lead JEDEC SOIC
C
1
E
E1
L
N
Ø
TOP VIEW
END VIEW
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
A
A1
D
SIDE VIEW
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA
for proper dimensions, tolerances, datums, etc.
SYMBOL MIN
A
1.35
MAX
NOM
–
1.75
A1
0.10
–
0.25
b
0.31
–
0.51
C
0.17
–
0.25
D
4.80
–
5.05
E1
3.81
–
3.99
E
5.79
–
6.20
e
L
NOTE
1.27 BSC
0.40
–
1.27
0°
–
8°
6/22/11
Package Drawing Contact:
packagedrawings@atmel.com
TITLE
8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing
Small Outline (JEDEC SOIC)
GPC
SWB
DRAWING NO.
REV.
8S1
G
Atmel AT88SA100S [DATASHEET]
8558G−CRYPTO−9/2012
21
9.
Ordering Information
Atmel AT88SA100S Ordering Information
10.
Atmel Ordering Code
Package Type
Temperature Range
AT88SA100S-SH-CZ-T
SOIC, Tape and Reel
-40 °C to 85 °C
AT88SA100S-TSU-T
3LD SOT23, Tape and Reel
-40 °C to 85 °C
Revision History
Doc. Rev.
Date
Comments
8558G
08/2012
Remove TSSOP package option.
Update Atmel logo and disclaimer page.
8558F
05/2012
Not recommended for new designs; Replaced by ATSHA204
8558F
09/2011
Correct references and sections numbers
Section 5.1.3, Sleep Flag, change “ within 0.5V of VCC” to “within 0.3V of VCC”
8558E
08/2010
Update IO timeout description
8558D
06/2010
Update to Table 3: AC Parameters
8558C
05/2010
Expansion of IO Timeout specification
8558B
04/2010
Add TSSOP and SOIC packages
8558A
03/2009
Initial document release
Atmel AT88SA100S [DATASHEET]
8558G−CRYPTO−9/2012
22
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© 2012 Atmel Corporation. All rights reserved. / Rev.: 8558G−CRYPTO−9/2012
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