Atmel AT88SA102S
Atmel CryptoAuthentication Product Authentication Chip
DATASHEET
Not Recommended for New Designs
Replaced by ATSHA204
Features
•
•
•
•
•
•
•
•
•
•
•
Secure authentication and key exchange
Superior SHA-256 hash algorithm
Best in class 256-bit key length
Guaranteed unique 48-bit serial number
High speed single wire interface
Supply voltage: 2.7V – 5.25V
1.8V – 5.25V communications
=3.7 V; must be 0xFFFF otherwise
Data
Map
11
Which fuses to burn, may be encrypted
Table 6-12. Output Parameters
Name
Size
Notes
Success
1
Upon successful execution, a value of zero will be returned by AT88SA102S.
Atmel AT88SA102S [DATASHEET]
8584H−CRYPTO−9/2012
19
6.6
PauseLong
Forces the chip into the pause state until the watchdog timer expires, after which it will automatically enter into the sleep state.
During execution of this command and while in the pause state the chip will ignore all activity on the IO signal. This command
is used to prevent bus conflicts in a system that also includes other AT88SA102S chips or a CryptoAuthentication host chip
sharing the same signal wire.
Table 6-13. Input Parameters
Name
Size
Notes
Opcode
PAUSELONG
1
0x01
Param1
Selector
1
Which chip to put into the pause state, 0x00 for all AT88SA102S chips
Param2
Zero
2
Must be 0x0000
Data
Ignored
0
The Selector parameter provides a mechanism to select which device will pause if there are multiple devices on the bus:
•
•
If the selector parameter is 0x00, then every AT88SA102S chip receiving this command will go into the pause state
and no chip will return a success code.
If any of the bits of the selector parameter are set, then the chip will read the values of Fuse[84-87] and go into the
pause state only if those fuse values match the least significant 4-bits of the selector parameter. If the chip does not
go into the pause state, it returns an error code of 0x0F. Otherwise it goes into the pause state and never returns
any code.
Atmel AT88SA102S [DATASHEET]
8584H−CRYPTO−9/2012
20
7.
Pinout
Table 7-1.
Pin Definitions
SOIC
SOT-23
Name
Description
5
1
Signal
IO channel to the system, open drain output. It is expected that an external pullup resistor will be provided to pull this signal up to VCC for proper
communications. When the chip is not in use this pin can be pulled to either VCC
or GND.
8
2
VCC
Power supply, 2.7 – 5.25 V. This pin should be bypassed with a high quality
0.1µF capacitor close to this pin with a short trace to GND
Additional applications information at www.atmel.com
4
3
GND
Connect to system ground
1,2,3,6,7
--
NC
Not connected
Atmel AT88SA102S [DATASHEET]
8584H−CRYPTO−9/2012
21
Packaging Information
3TS1 – 3-lead Shrink SOT
3
GND
E1
CL
E
Signal
SDA
VCC
1
L1
8.
2
e1
End View
Top View
b
A2
SEATING
PLANE
e
A
A1
D
Side View
Notes:
1. Dimension D does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.25mm per
end. Dimension E1 does not include interlead flash or protrusion.
Interlead flash or protrusion shall not exceed 0.25mm per side.
2. The package top may be smaller than the package bottom.
Dimensions D and E1 are determined at the outermost extremes of
the plastic body exclusive of mold flash, tie bar burrs, gate burrs and
interlead flash, but including any mismatch between the top and
bottom of the plastic body.
3. These dimensions apply to the flat section of the lead between 0.08
mm and 0.15mm from the lead tip.
This drawing is for general information only. Refer to JEDEC Drawing
TO-236, Variation AB for additional information.
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
A
A1
A2
D
E
E1
L1
e1
b
0.89
0.01
0.88
2.80
2.10
1.20
MAX
NOM
2.90
1.30
0.54 REF
1.90 BSC
0.30
-
1.12
0.10
1.02
3.04
2.64
1.40
0.50
NOTE
1,2
1,2
3
12/11/09
Package Drawing Contact:
packagedrawings@atmel.com
TITLE
GPC
DRAWING NO.
REV.
3TS1, 3-lead, 1.30mm Body, Plastic Thin
Shrink Small Outline Package (Shrink SOT)
TBG
3TS1
B
Atmel AT88SA102S [DATASHEET]
8584H−CRYPTO−9/2012
22
8S1 – 8-lead JEDEC SOIC
C
1
E
E1
L
N
Ø
TOP VIEW
END VIEW
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
A
A1
D
SIDE VIEW
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA
for proper dimensions, tolerances, datums, etc.
SYMBOL MIN
A
1.35
NOM
MAX
–
1.75
A1
0.10
–
0.25
b
0.31
–
0.51
C
0.17
–
0.25
D
4.80
–
5.05
E1
3.81
–
3.99
E
5.79
–
6.20
e
L
NOTE
1.27 BSC
0.40
–
1.27
0°
–
8°
6/22/11
Package Drawing Contact:
packagedrawings@atmel.com
TITLE
8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing
Small Outline (JEDEC SOIC)
GPC
SWB
DRAWING NO.
REV.
8S1
G
Atmel AT88SA102S [DATASHEET]
8584H−CRYPTO−9/2012
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9.
Ordering Codes
Atmel AT88SA102S Ordering Information
10.
Atmel Ordering Code
Package Type
Voltage Range
Operating Range
AT88SA102S-TSU-T
SOT, Tape and Reel
2.7 V–5.25 V
Green compliant (exceeds RoHS)/Industrial
(−40°C to 85° C)
AT88SA102S-SH-T
SOIC, Tape and Reel
2.7 V–5.25 V
Green compliant (exceeds RoHS)/Industrial
(−40°C to 85° C)
Revision History
Doc. Rev.
Date
Comments
8584H
09/2012
Remove TSSOP package option.
Update Atmel logo and disclaimer page.
8584G
05/2012
Not recommended for new designs; Replaced by ATSH204.
8584G
09/2011
Correct references and sections numbers.
Section 5.1.3, Sleep Flag, change “ within 0.5V of VCC” to “within 0.3V of VCC”.
BurnFuse – correct Fuse[87] to Fuse[86] and remove 24 from 24-status.
BurnSecure – change “can either be burned during the last repetition of BurnSecure or
it can be individual…” to “must be burned during the last repetition of BurnSecure as
it cannot be individual…”
8584F
08/2010
Update IO Timeout description.
8584E
06/2010
Update to Table 3: AC Parameters.
8584D
05/2010
Expansion of IO Timeout specification.
8584C
04/2010
Added 8ld TSSOP.
8584B
02/2010
Updated parameter tables and added 8ld SOIC.
8584A
03/2009
Initial document release.
Atmel AT88SA102S [DATASHEET]
8584H−CRYPTO−9/2012
24
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© 2012 Atmel Corporation. All rights reserved. / Rev.: 8584H−CRYPTO−9/2012
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