AT91SAM7A3-EK Evaluation Board
..............................................................................................
User Guide
Table of Contents
Section 1
Overview............................................................................................... 1-1
1.1
1.2
1.3
Scope........................................................................................................1-1
Deliverables ..............................................................................................1-1
The AT91SAM7A3-EK Evaluation Board..................................................1-1
Section 2
Setting Up the AT91SAM7A3-EK Evaluation Board............................. 2-1
2.1
2.2
2.3
2.4
2.5
2.6
2.7
Electrostatic Warning ................................................................................2-1
Requirements............................................................................................2-1
Layout .......................................................................................................2-2
Powering Up the Board .............................................................................2-3
Backup Power Supply ...............................................................................2-3
Getting Started..........................................................................................2-3
AT91SAM7A3-EK Block Diagram .............................................................2-4
Section 3
Board Description ................................................................................. 3-1
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
AT91SAM7A3 Microcontroller...................................................................3-1
AT91SAM7A3 Block Diagram ...................................................................3-4
Memory .....................................................................................................3-5
Clock Circuitry ...........................................................................................3-5
Reset Circuitry ..........................................................................................3-5
Shutdown Controller .................................................................................3-5
Power Supply Circuitry..............................................................................3-5
Remote Communication ...........................................................................3-5
Analog Interface ........................................................................................3-5
User Interface ...........................................................................................3-5
Debug Interface ........................................................................................3-6
Expansion Slot ..........................................................................................3-6
Section 4
Configuration Straps ............................................................................. 4-1
4.1
Configuration Straps .................................................................................4-1
Section 5
Schematics ........................................................................................... 5-1
5.1
Schematics ...............................................................................................5-1
Section 6
Revision History.................................................................................... 6-1
6.1
AT91SAM7A3-EK Evaluation Board User Guide
Revision History ........................................................................................6-1
i
6165C–ATARM–26-Jun-06
Section 1
Overview
1.1
Scope
The AT91SAM7A3-EK evaluation kit enables evaluation capabilities and code development of applications running on an AT91SAM7A3.
This guide focuses on the AT91SAM7A3-EK board as an evaluation platform.
1.2
Deliverables
The AT91SAM7A3-EK package contains the following items:
! an AT91SAM7A3-EK board
! one A/B-type USB cable
! one serial RS232 cable
! one DVD-ROM containing summary and full datasheets, datasheets with electrical
and mechanical characteristics, application notes and getting started documents for
all development boards and AT91 microcontrollers. An AT91 software package with C
and assembly listings is also provided. This allows the user to begin evaluating the
AT91 ARM® Thumb® 32-bit microcontroller quickly.
1.3
The
The board is equipped with an AT91SAM7A3 (100-pin LQFP Green package) together
AT91SAM7A3-EK with the following:
Evaluation Board ! USB device port interface
! one DBGU serial communication port
! JTAG/ICE debug interface connector
! two serial CAN communication ports
! one serial LIN communication port
! one buffered analog input and PWM output
! one Power LED and four general-purpose LEDs
! one SD/MMC/DataFlash® card slot
! expansion connector
! one Atmel® serial DataFlash
! one footprint for 3.6V lithium thionyl-chloride backup battery
AT91SAM7A3-EK Evaluation Board User Guide
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6165C–ATARM–26-Jun-06
Overview
1-2
6165C–ATARM–26-Jun-06
AT91SAM7A3-EK Evaluation Board User Guide
Section 2
Setting Up the AT91SAM7A3-EK
Evaluation Board
2.1
Electrostatic
Warning
The AT91SAM7A3-EK evaluation board is shipped in a protective anti-static package.
The board must not be subjected to high electrostatic potentials. A grounding strap or
similar protective device should be worn when handling the board. Avoid touching the
component pins or any other metallic element.
2.2
Requirements
In order to set up the AT91SAM7A3-EK evaluation board, the following items are
required:
! the AT91SAM7A3-EK evaluation board itself
! an A/B-type USB cable
or
! a DC USB power adapter (5V at 0.5 A) with USB A/B cable
Note:
The AT91SAM7A3-EK is not delivered with a JTAG/ICE interface which is
required to start evaluating the device.
AT91SAM7A3-EK Evaluation Board User Guide
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6165C–ATARM–26-Jun-06
Setting Up the AT91SAM7A3-EK Evaluation Board
2.3
Layout
Figure 2-1. Top Level Layout
2-2
6165C–ATARM–26-Jun-06
AT91SAM7A3-EK Evaluation Board User Guide
Setting Up the AT91SAM7A3-EK Evaluation Board
2.4
Powering Up the
Board
AT91SAM7A3 is self-powered by the USB port or by a USB power adapter.
2.5
Backup Power
Supply
The user may add a battery (SAFT LS14250 3.6V or equivalent) in order to permanently
power the backup part of the device. In this case, the configuration of J16, S6 and S7
must be changed.
Refer to Table 4-1.
2.6
Getting Started
The AT91SAM7A3-EK evaluation board is delivered with a DVD-ROM containing all
necessary information and step-by-step procedures for working with the most common
development tool chains. Please refer to this DVD-ROM, or to the Atmel web site,
http://www.atmel.com/products/AT91/, for the most up-to-date information on getting
started with the AT91SAM7A3-EK.
Note that the AT91SAM7A3 microcontroller fitted on the evaluation board has been programmed with the SAM Boot Assistant (SAM-BA ™ ) which provides an easy way to
program the embedded Flash memory through the USB or DBGU communication
channel.
Programming through DBGU requires that the evaluation kit is powered using a Power
Supply USB Adapter
Note: The SAM-BA Boot Assistant resides in the embedded Flash memory and will be
deleted when programming the Flash. A JTAG/ICE interface is required to recover
SAM-BA Boot Assistant.
AT91SAM7A3-EK Evaluation Board User Guide
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6165C–ATARM–26-Jun-06
Setting Up the AT91SAM7A3-EK Evaluation Board
2.7
AT91SAM7A3-EK
Block Diagram
Figure 2-2. Block Diagram
VBUS
CANL
J3
CANH
J4
CANH
CANL
J5
1
LIN
1
DBGU
RS232
SD/MMC
DATAFLASH (NPCS03)
CARD READER
USB DEVICE
1
J7
TXD
RXD
J1
ATA6661
MN18
5V
3.3V
3V3
OUT
5V
3V3
IN
J9
VBUS
J2
ADM3202A
3V3
8 7 6 5 4 3 2 1 9
S6
TJA1050
RS
TJA1050
RS
NRST
ATMEL
SERIAL
DATAFLASH
CAN1
USB
DBGU
VDDPLL
J14
SYSTEM CONTROLLER
VDD BACKUP SELECT
J16
R20
3.6V
470R
1
PIO B
PWM7
PWM6
PWM0
3
2
1
PWM3
ADC0_AD2
0 TO VREF
PWM VOLTAGE GEN.
GNDANA
R18 470R
2
PWM0..PWM7
PWM2
ADC0_AD3
3.3VANA
ADC
0 TO VREF
EXTERNAL INPUT
JTAG/ICE
3
3V3
VDDANA
ADVREFP
GNDANA
VDDBU
SHDN
WAKE-UP1
XIN
J26
EXT CLK INPUT
PIO A PIO B
AT91SAM7A3-LQFP100
FORCE WAKE-UP
18.432 MHz
XOUT
PIO A - PIO B EXPANSION CONNECTOR
DDM
DDP
PIO
CAN0
USART0
VDD3V3
VDD1V8
MANUAL RESET
NRST
J13
DRXD - DTXD
LIGHTED WHEN POWER ON
PIO
S7
CS
BP2
MCI
POWER LED
PIO
SPI0
YELLOW
1K5
nSHUTDOWN
J17
3V6
3.00V +- 0.2%
EXTERNAL REF
BP3
BP4
NOT POPULATED
1
2
3
4
5
6
BP1
DS1
DS2
DS3
DS4
USER'S GREEN LED
USER'S TACT SWITCH
J8
JTAG/ICE CONNECTOR
1
J6
ANALOG INPUT
2-4
6165C–ATARM–26-Jun-06
AT91SAM7A3-EK Evaluation Board User Guide
Section 3
Board Description
3.1
AT91SAM7A3
Microcontroller
! Incorporates the ARM7TDMI ® ARM® Thumb® Processor
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
! Embedded ICE In-circuit Emulation, Debug Communication Channel Support
! 256 Kbytes of Internal High-speed Flash, Organized in 1024 Pages of 256 Bytes
– Single Cycle Access at Up to 30 MHz in Worst Case Conditions
– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
– Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time:
15 ms
– 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock
Capabilities
! 32K Bytes of Internal High-speed SRAM, Single-cycle Access at Maximum Speed
! Memory Controller (MC)
– Embedded Flash Controller, Abort Status and Misalignment Detection
– Memory Protection Unit
! Reset Controller (RSTC)
– Based on Three Power-on Reset Cells
– Provides External Reset Signal Shaping and Reset Sources Status
! Clock Generator (CKGR)
– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL
! Power Management Controller (PMC)
– Power Optimization Capabilities, including Slow Clock Mode (Down to 500
Hz), Idle Mode, Standby Mode and Backup Mode
– Four Programmable External Clock Signals
! Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
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6165C–ATARM–26-Jun-06
Board Description
– Four External Interrupt Sources and One Fast Interrupt Source, Spurious
Interrupt Protected
! Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel interrupt
! Periodic Interval Timer (PIT)
– 20-bit Programmable Counter plus 12-bit Interval Counter
! Windowed Watchdog (WDT)
– 12-bit key-protected Programmable Counter
– Provides Reset or Interrupt Signal to the System
– Counter May Be Stopped While the Processor is in Debug Mode or in Idle
State
! Real-time Timer (RTT)
– 32-bit Free-running Counter with Alarm
– Runs Off the Internal RC Oscillator
! Two Parallel Input/Output Controllers (PIO)
– Sixty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up resistor and Synchronous
Output
! Shutdown Controller (SHDWC)
– Programmable Shutdown Pin and Wake-up Circuitry
! Two 32-bit Battery Backup Registers for a Total of 8 Bytes
! One 8-channel 20-bit PWM Controller (PMWC)
! One USB 2.0 Full Speed (12 Mbits per Second) Device Port
– On-chip Transceiver, 2-Kbyte Configurable Integrated FIFOs
! Nineteen Peripheral Data Controller (PDC) Channels
! Two CAN 2.0B Active Controllers, Supporting 11-bit Standard and 29-bit Extended
Identifiers
– 16 Fully Programmable Message Object Mailboxes, 16-bit Time Stamp
Counter
! Two 8-channel 10-bit Analog-to-Digital Converter
! Three Universal Synchronous/Asynchronous Receiver Transmitters (USART)
– Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485
Support
! Two Master/Slave Serial Peripheral Interfaces (SPI)
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
! Three 3-channel 16-bit Timer/Counters (TC)
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
3-2
6165C–ATARM–26-Jun-06
AT91SAM7A3-EK Evaluation Board User Guide
Board Description
! Two Synchronous Serial Controllers (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and
Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
! One Two-wire Interface (TWI)
– Master Mode Support Only, All Two-wire Atmel EEPROMs Supported
! Multimedia Card Interface (MCI)
– Compliant with Multimedia Cards and SD Cards
– Automatic Protocol Control and Fast Automatic Data Transfers with PDC,
MMC and SDCard Compliant
! IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins
! Required Power Supplies
– Embedded 1.8V Regulator, Drawing up to 130 mA for the Core and the
External Components, Enables 3.3V Single Supply Mode
– 3.3V VDD3V3 Regulator, I/O Lines and Flash Power Supply
– 1.8V VDD1V8 Output of the Voltage Regulator and Core Power Supply
– 3V to 3.6V VDDANA ADC Power Supply
– 3V to 3.6V VDDBU Backup Power Supply
! 5V-tolerant I/Os
! Fully Static Operation: 0 Hz to 60 MHz at 1.65V and 85°C Worst Case Conditions
! Available in a 100-lead LQFP Green Package
AT91SAM7A3-EK Evaluation Board User Guide
3-3
6165C–ATARM–26-Jun-06
Board Description
3.2
AT91SAM7A3
Block Diagram
Figure 3-1. Block Diagram
TDI
TDO
TMS
TCK
JTAG
SCAN
ARM7TDMI
Processor
ICE
1.8 V
Voltage
Regulator
JTAGSEL
TST
FIQ
System Controller
VDD3V3
GND
VDD1V8
AIC
IRQ0-IRQ3
PDC
PIO
Embedded
Flash
Controller
FLASH
256K Bytes
DBGU
PDC
Memory
Protection
Unit
PCK0-PCK3
PLLRC
PLL
XIN
XOUT
OSC
GND
VDDBU
Memory
Controller
PMC
SRAM
32K Bytes
Address
Decoder
Peripheral Bridge
Abort
Status
GPBR
RCOSC
FWKUP
WKUP0
WKUP1
SHDW
RTT
Shutdown
Controller
Peripheral Data
Controller
Misalignment
Detection
19 channels
VDDBU
VDD3V3
POR
POR
Reset
Controller
APB
FIFO
USB Device
VDD1V8 POR
NRST
Transceiver
DRXD
DTXD
PIT
TWI
WDT
PIOA
3-4
6165C–ATARM–26-Jun-06
CAN1
PDC
PWMC
USART0
PDC
PDC
USART1
SSC0
PDC
PDC
PDC
USART2
PDC
PDC
SPI0
SSC1
PDC
Timer Counter
PDC
PDC
SPI1
TC0
TC1
PDC
PDC
MCI
PDC
TC2
Timer Counter
TC3
TC4
ADC0
TC5
PDC
Timer Counter
TC6
ADC1
TC7
TC8
PIO
PDC
PDC
PIO
RXD0
TXD0
SCK0
RTS0
CTS0
RXD1
TXD1
SCK1
RTS1
CTS1
RXD2
TXD2
SCK2
RTS2
CTS2
SPI0_NPCS0
SPI0_NPCS1
SPI0_NPCS2
SPI0_NPCS3
SPI0_MISO
SPI0_MOSI
SPI0_SPCK
SPI1_NPCS0
SPI1_NPCS1
SPI1_NPCS2
SPI1_NPCS3
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
MCCK
MCCDA
MCDA0-MCDA3
ADC0_AD0
ADC0_AD1
ADC0_AD2
ADC0_AD3
ADC0_AD4
ADC0_AD5
ADC0_AD6
ADC0_AD7
ADC0_ADTRG
ADVREFP
VDDANA
GND
ADC1_AD0
ADC1_AD1
ADC1_AD2
ADC1_AD3
ADC1_AD4
ADC1_AD5
ADC1_AD6
ADC1_AD7
ADC1_ADTRG
CAN0
PIOB
DDM
DDP
TWD
TWCK
CANRX0
CANTX0
CANRX1
CANTX1
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
TF0
TK0
TD0
RD0
RK0
RF0
TF1
TK1
TD1
RD1
RK1
RF1
TCLK0
TCLK1
TCLK2
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
TCLK3
TCLK4
TCLK5
TIOA3
TIOB3
TIOA4
TIOB4
TIOA5
TIOB5
TCLK6
TCLK7
TCLK8
TIOA6
TIOB6
TIOA7
TIOB7
TIOA8
TIOB8
AT91SAM7A3-EK Evaluation Board User Guide
Board Description
3.3
Memory
! 256 Kbytes of Internal High-speed Flash
! 32 Kbytes of Internal High-speed SRAM
! Atmel serial DataFlash
3.4
Clock Circuitry
! 18.432 MHz standard crystal for the embedded oscillator
! 32 KHz internal RC oscillator
3.5
Reset Circuitry
! Internal reset controller with a bi-directional reset pin
! External reset pushbutton
3.6
3.7
Shutdown
Controller
! Programmable shutdown and Wake-Up
Power Supply
Circuitry
! USB powered, the dynamic power consumption on VDD1V8 is less than 50 mA at full
speed when running out of the Flash. The total current at power-up is less than 100
mA.
! Force Wake-Up and Wake-up pushbutton
! External power can be applied via USB Power adapter 5V 0.5A with USB A/B cable
! On-chip embedded VDDCORE 1.8V regulator
! On-board 3.3V linear regulator with shutdown control
3.8
Remote
Communication
! One Serial interface (DBGU COM Port) via RS-232 DB9 male socket
! USB V2.0 Full-speed compliant, 12 Mbits per second (UDP)
! Two CAN 2.0B communication ports via the 3-position printed circuit terminal block
! One LIN communication port via the 3-position printed circuit terminal block
3.9
Analog Interface
! One selectable 0.2% 3.00V Vref or 3.3V ANA
! One 3-position printed circuit terminal block
! Two analog up to Vref inputs. One external user input and one back-looped with
buffered PWM0 output.
! One buffered PWM0 analog output (up to Vref)
3.10
User Interface
! One 5-way joystick (4 directions and push for confirmation)
! Four general-purpose buffered green LEDs (PWM controlled)
AT91SAM7A3-EK Evaluation Board User Guide
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6165C–ATARM–26-Jun-06
Board Description
! One yellow power LED (can also be software controlled)
3.11
Debug Interface
! 20-pin JTAG/ICE interface connector
! DBGU serial RS232 COM Port
3.12
Expansion Slot
! One SD/MMC/DataFlash card slot
! All I/Os of the AT91SAM7A3 are routed to peripheral extension connectors (J9). This
allows the developer to check the integrity of the components and to extend the
features of the board by adding external hardware components or boards.
3-6
6165C–ATARM–26-Jun-06
AT91SAM7A3-EK Evaluation Board User Guide
Section 4
Configuration Straps
4.1
Configuration
Straps
Table 4-1. Configuration Jumpers and Straps
Designation
Default
Setting
Feature
(1)
J13
Closed
VDD3V3 Jumper
J14
Closed
VDDPLL Jumper (1)
J15
Closed
VDDANA Jumper (1)
J16
2-3
VDDBU Jumper select (1)
1-2 : Optional Lithium Thionyl Chloride 3.6V Backup
Battery
2-3 : 3.3V power
J17
1-2
ADVREFP Jumper select(1)
1-2 : 3.00V Voltage reference
2-3 : VDDANA
J18
Closed
Enables 120 ohms CAN bus resistance termination
(CAN0)
J19
Closed
Enables 5V power supply for TJA1050 Transceiver. It is
closed by wire on solder side. J19 and J20 should not be
closed at the same time.
J20
Open
Disables 3.3V power supply for TJA1050 Transceiver. J20
and J19 should not be closed at the same time.
J21
Closed
Enables 120 ohms CAN bus resistance termination
(CAN1)
J22
Closed
Enables 5V power supply for TJA1050 Transceiver. It is
closed by wire on solder side. J22 and J23 should not be
closed at the same time.
J23
Opened
Disables 3.3V power supply for TJA1050 Transceiver. J23
and J22 should not be closed at the same time.
J24
Opened
Do not use: Factory test mode
J25
Opened
Select ICE mode or JTAG mode (Closed)
J26
Opened
External XIN clock input. S8 and S9 must be open.
AT91SAM7A3-EK Evaluation Board User Guide
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6165C–ATARM–26-Jun-06
Configuration Straps
Table 4-1. Configuration Jumpers and Straps (Continued)
Designation
Default
Setting
S1
Opened
Solder it, enables permanent pull up on USB DP. S3 must
be open.
S2
Closed
The System Reset signal (NRST) is connected to the
ICE/JTAG socket (J8, pin 15).
S3
Closed
Enables the use of the USB DP PUP (PB1)
S4
Closed
Enables the use of the USB CNX detection (PB0)
S5
Closed
Digital Analog GND planes separation. Do not cut it
Closed
Disables shutdown control and forces Power on.
Do not close at same time as S7.
Opened
Enables shutdown control
S6
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6165C–ATARM–26-Jun-06
Feature
Opened
Disables shut down control
S7
Closed
Enables shutdown control
Do not close at same time as S6.
S8 - S9
Closed
Enables the use of 18.432 MHz crystal. Must be open if
external clock used.
S10
Closed
Enables the Power LED control
S11
Closed
Enables the use of the NPCS13
S12
Opened
Disable Serial DataFlash write protect
S13
Closed
Enables the use of the TXD CAN0 transceiver (PA27)
S14
Closed
Enables the use of the RXD CAN0 transceiver (PA26)
S15
Closed
Enables control of the Standby/Normal mode for CAN0
and CAN1 transceivers (PA23)
S16
Closed
Enables the use of the TXD CAN1 transceiver (PA29)
S17
Closed
Enables the use of the RXD CAN1 transceiver (PA28)
S18
Opened
Enables control of the Standby/Normal mode for CAN0
and CAN1 transceivers (PA23).
If S18 is closed, S15 must be open.
S19
Closed
Enables the use of PWM0 Analog Output (PA18)
S20
Closed
Enables the use of AD02 Analog Input (PB16)
S21
Closed
Enables the use of AD03 Analog Input (PB17)
S22
Closed
Enables the use of the TXD LIN transceiver (PA3)
S23
Closed
Enables the use of the RXD LIN transceiver (PA2)
S24
Closed
Enables the control of the EN LIN transceiver (PA5)
S25
Closed
Enables the control of the INH LIN transceiver (PA6)
S26
Opened
Do not use
S27
Closed
Enables the use of the User LED DS4 (PA25)
S28
Closed
Enables the use of the User LED DS3 (PA24)
S29
Closed
Enables the use of the User LED DS2 (PA21)
S30
Closed
Enables the use of the User LED DS1 (PA20)
AT91SAM7A3-EK Evaluation Board User Guide
Configuration Straps
Table 4-1. Configuration Jumpers and Straps (Continued)
Designation
Default
Setting
S31
Closed
Enables the use of the DBGU TXD signal (PA31)
S32
Closed
Enables the use of the DBGU RXD signal (PA30)
S33
Opened
Disable VUSB power supply on J9 extension connector.
TP1
N.A
GND Test point
TP2
N.A
GND Test point
TP3
N.A
GND_ADC Test point
Note:
Feature
1. These jumpers are provided for measuring power consumption. By default, they are
closed. To use this feature, the user has to open the strap and insert an anmeter.
AT91SAM7A3-EK Evaluation Board User Guide
4-3
6165C–ATARM–26-Jun-06
Configuration Straps
4-4
6165C–ATARM–26-Jun-06
AT91SAM7A3-EK Evaluation Board User Guide
Section 5
Schematics
5.1
Schematics
This section contains the following schematics:
! Processor
! I/O
AT91SAM7A3-EK Evaluation Board User Guide
5-1
6165C–ATARM–26-Jun-06
8
7
6
5
4
3
2
1
3V3
JTAG INTERFACE
3V3
8
7
6
5
MN2
USBUF02W6
S1
USB DEVICE INTERFACE
MANUAL RESET
3V3
J1
BP2
6
RR1
100K
1
J8
1
2
3
4
USB B
1
2
4
3
5
D
6
2
3V3
4
5
3V3
3V3
J24
J25
1
3
5
7
9
11
13
15
17
19
3
DNP
3V3
3
2
DNP
R1
10K
3V3
S2
2
4
6
8
10
12
14
16
18
20
D
NRST
R2
100K
1
Q5
Si2301BDS
J15
S3
USB_DP_PUP
S6
3V3 CURRENT
MEASURE
5
4
EN
NR
GND
3
1
C
2
IN
OUT
3
Q2
Si2302BDS
1
3V3
2
10 uF
100NF
100NF
100NF
100NF
S7
C15 C16
1µF 1µF
C17
10NF
TP1
S8
C19 10pF
Y1
18.432MHz
C20 10pF
ADHESIVE FEET
Z8
Z9
11.1
11.1
Z10
11.1
Z11
S9
1
16
25
31
39
60
71
75
79
GND
GND
GND
GND
GND
GND
GND
GND
GND
73
XOUT
74
J26
11.1
VDD1V8
72
J14
R5 470R
C22
1NF
J16
C23
10NF
3V3
R6
B
3
2
1
+
-
DNP
Z18
3.6V Primary
lithium-thionyl
chloride
RR2
100K
5
6
7
8
4
3
2
1
C5
100NF
76
VDDBU
26
AT91SAM7A3
VDDPLL
PLLRC
VDDBU
FORCEWUP
WUP0
WUP1
SHDN
27
28
29
30
FWKUP
WKUP0
WKUP1
SHDN
78
C6
22NF
ADC1_AD7/SCK2/TIOB8/PB29
ADC1_AD6/CTS2/TIOA8/PB28
ADC1_AD5/RTS2/TIOB7/PB27
ADC1_AD4/SCK1/TIOA7/PB26
ADC1_AD3/CTS1/TIOB6/PB25
ADC1_AD2/RTS1/TIOA6/PB24
ADC1_AD1/TIOB5/PB23
ADC1_AD0/TIOA5/PB22
ADC0_AD7/NPCS13/TIOB4/PB21
ADC0_AD6/NPCS12/TIOA4/PB20
ADC0_AD5/NPCS11/TIOB3/PB19
ADC0_AD4/PWM4/TIOA3/PB18
ADC0_AD3/PWM3/TIOB2/PB17
ADC0_AD2/PWM2/TIOA2/PB16
ADC0_AD1/PWM1/TIOB1/PB15
ADC0_AD0/PWM0/TIOA1/PB14
RD1/TIOB0/PB13
TD1/TIOA0/PB12
RF1/TCLK2/PB11
RK1/TCLK1/PB10
TK1/TCLK0/PB9
TF1/FIQ/PB8
CANTX1/RF0/PB7
PCK3/RK0/PB6
PCK2/RD0/PB5
PCK1/TD0/PB4
PCK0/TK0/PB3
PWM7/TF0/PB2
PWM6/IRQ3/PB1
PWM5/IRQ2/PB0
96
95
94
93
92
91
90
89
87
86
85
84
83
82
81
80
4
5
6
7
8
9
10
11
12
13
14
18
19
20
MN4
5
PB29
PB28
PB27
PB26
PB25
PB24
PB23
PB22
PB21
PB20
PB19
PB18
PB17
PB16
PB15
PB14
PB13
PB12
PB11
PB10
PB9
PB8
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
VOUT REF
1
GND
2
EN
3
3V3_ADC
4
C11
22NF
C9
GND_ADC 10 uF
10V
GND_ADC
C21
100NF
1.5K
3.00V +- 0.2%
77
VIN
GND_ADC
LM4120AIM5-3.0
C
VREF
S33
VUSB
TWD
TWCK
RXD0
TXD0
SCK0
RTS0
CTS0
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
SPI0_NPCS0 PA11
SPI0_NPCS1 PA12
PA13
PA14
SPI0_MISO PA15
SPI0_MOSI PA16
SPI0_SPCK PA17
PA18
PCK1
PA19
PA20
PA21
IRQ0
PA22
PA23
PA24
PWM7
PA25
PA26
PA27
PA28
PA29
PA30
PA31
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PWM4
PB18
PB19
TIOA4
PB20
TIOB4
PB21
PB22
PB23
PB24
PB25
PB26
PB27
ADC1_AD6 PB28
ADC1_AD7 PB29
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
TF0
TK0
TD0
RD0
RK0
RF0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
J9A
C1
C2
RXD0
C3
TXD0
C4
SCK0
C5
RTS0
C6
CTS0
C7
SPI0_MISO C8
SPI0_MOSI C9
SPI0_SPCK C10
SPI0_NPCS0C11
SPI0_NPCS1C12
TWD
C13
TWCK C14
TF0
C15
TK0
C16
TD0
C17
RD0
C18
RK0
C19
RF0
C20
TIOA4 C21
TIOB4 C22
PCK1 C23
IRQ0 C24
PWM4 C25
PWM7 C26
C27
GND_ADC
C28
ADC1_AD6 C29
ADC1_AD7 C30
C31
3V3
C32
J9B
TP2
21
22
23
24
32
33
34
35
36
37
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
62
63
64
65
R8 3.3M
ADVREFP
XIN
C24
100NF
R7 470R
VDDANA
ANALOG GND
GND_ADC
3
2
1
VDD3V3
VDD3V3
VDD3V3
VDD3V3
VDD3V3
NRST
TST
100
15
38
61
88
DDP
DDM
VDD1V8
VDD1V8
VDD1V8
VDD1V8
J13
3V3
C2
C12
C13
C14
C18
99
17
40
59
JTAGSEL
TDO
TCK
TMS
TDI
J17
PA0/TWD/ADC0_ADTRG
PA1/TWCK/ADC1_ADTRG
PA2/RXD0
PA3/TXD0
PA4/SCK0/SPI1_NPCS0
PA5/RTS0/SPI1_NPCS1
PA6/CTS0/SPI1_NPCS2
PA7/RXD1/SPI1_NPCS3
PA8/TXD1/SPI1_MISO
PA9/RXD2/SPI1_MOSI
PA10/TXD2/SPI1_SPCK
PA11/SPI0_NPCS0
PA12/SPI0_NPCS1/MCDA1
PA13/SPI0_NPCS2/MCDA2
PA14/SPI0_NPCS3/MCDA3
PA15/SPI0_MISO/MCDA0
PA16/SPI0_MOSI/MCCDA
PA17/SPI0_SPCK/MCCK
PA18/PWM0/PCK0
PA19/PWM1/PCK1
PA20/PWM2/PCK2
PA21/PWM3/PCK3
PA22/PWM4/IRQ0
PA23/PWM5/IRQ1
PA24/PWM6/TCLK4
PA25/PWM7/TCLK5
PA26/CANRX0
PA27/CANTX0
PA28/CANRX1/TCLK3
PA29/CANTX1/TCLK6
PA30/DRXD/TCLK7
PA31/DTXD/TCLK8
G
C3
100NF
10 uF
100NF
100NF
100NF
TP3
S5
66
70
69
68
67
MN1
C4
C7
C8
C10
2
3
98
97
3
1
6
R4
100K
3V3
4.7µH
C1
10 uF 10V
VDD1V8
MN3
TPS73633
L1
PB1
5V
Q1
Si2301BDS
2
VUSB
3V3_ADC
J10
3V3
R9
120R
14
VCC
74ALVC04
GND
MN5G
7
3V3
FORCEWUP
WUP0
WUP1
SHDN
VDDBU
BP3
TWI
SCC
TIMER
PCK
IRQ
PWM
RESERVED
B
ADC
J9C
PB[0..29]
FORCE WAKE-UP
8
7
6
5
4
3
2
1
SPI
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
3V3
C25
100NF
USART
PA[0..31]
WAKE-UP1
BP4
3V3
3V3
MN6
A
R10
100K
POWER LED
DS5
YELLOW
MN5F
12
13
10
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
SPI1_NPCS3
8
1
2
4
SO
SI
SCK
CS
3
RESET
S11
PB15
11
3V3
S10
MN5E
74ALVC04
74ALVC04
PA8
PA9
PA10
PA7
R11
VCC
6
GND
7
WP
5
100K
A
C26
100NF
Friday, June 09, 2006
C
B
A INIT EDIT
S12
REV
WRITE PROTECT
NORMALLY OPEN
NRST
AT91SAM7A3-EK
MODIF.
SCALE
JPG
JPG
JPG
13/09/05
10/03/05
08/12/04
DES.
DATE
1/1
PROCESSOR BOARD
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
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4
3
2
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VER.
DATE
REV.
SHEET
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1
2
8
7
6
5
4
3
RXD
J18
3
6
4
RS
8
VREF
5
VCC
3
GND
2
MN8
J4
7
R16
120
1
2
CANH
RXD
J21
3
6
PA17
SPI0_SPCK MCCK
PA16
PA14
PA13
SPI0_MOSI MCCDA
SPI0_NPCS3 MCDA3
MCDA2
J20 DNP
VREF
5
VCC
3
S16
C31
100NF
PA29
PA28
PA18
J22 DNP 5V
CR1
GF1B
1
S18
2
CR2
GF1B
3
R22
1K
6
LIN
GND_ADC
2
3V3
GND_ADC
S20
C
DO NOT CONNECT
J22 AND J23 AT THE
SAME TIME
5V
C33 100NF
CR3
BAT54
3
GND_ADC
J6
MN9B
8
TLC2272A
3.3K
R20
S21
RXD
1
EN
2
TXD0
RXD0
RTS0
CTS0
INH
8
WAKE
3
C37
47uF
50V
1
2 -
PB16
USART0
+
C30
100NF
10K
J23 DNP
4
TXD
MN9A
3 +
82K
Q4
Si2302BDS
1
PB17
VS
FPS009
10K
R15
100K
MN10
7
100NF
TLC2272A
3V3
C32
10 uF
10V
10K
R19
LIN0
R14
PWM 0
R18
3V3
J3
S19
3 R17
3V3
TJA1050T
C29
D
GND_ADC
Q3
Si2301BDS
1
S17
CANL
2
1µF
C36
VREF
C28
10 uF
10V
DO NOT CONNECT
J19 AND J20 AT THE
SAME TIME
4
8
C
PA23
8
7
6
5
4
3
2
1
9
3V3
1
RS
GND
MCDA1
SPI0_MISO MCDA0
3V3
C27
100NF
TXD
PA12
PA15
5V
J19 DNP
CANL
TJA1050T
CAN1
S15
PA26
2
2
CANH
PA27
3
1
D
7
R13
120
S14
2
J5
1
SD CARD / MMC CARD
DATAFLASH CARD
INTERFACE
J7
R12
10K
1
TXD
CAN0
S13
1
3V3
PA[0..31]
MN7
2
7
R28 1K
S22
S23
S24
S25
PA3
PA2
PA5
PA6
+
5
-
6
2
R21 1K
3
C35
100NF
4
GND_ADC
S26
1
C34 10 uF 10V
GND_ADC
GND_ADC
3V3
C38
220pF
PB[0..29]
C39
100NF
5
GND
MN5A
S27
R23
PA25
ATA6661
1
120R
DS4
GREEN
2
74ALVC04
PB13
PB8
B
MN5B
S28
3V3
MN11
16
C40
100NF
C1+
1
C41
100NF
15
GND
C1C2+
2 V+
C42
100NF
3
4
100K
RR3
C43
100NF
6 V-
C2-
14
T
7
T
PA21
120R
DS3
GREEN
4
BP1
74ALVC04
1
2
3
4
DBGU_TXD
11
S31
1
2
3
PB12
PB14
MN5C
R26
5
120R
DS2
PA31
PB9
74ALVC04
UP
DOWN
LEFT
RIGHT
PUSH
10
R
12
8
R
9
MN5D
S30
PA30
PA20
R27
9
120R
DS1
GREEN
=
=
=
=
=
PB8
PB9
PB12
PB13
PB14
8
10
13
DBGU_RXD
4
5
6
GREEN
6
5
S32
11
8
7
6
5
S29
R25
100K
C44
100NF
3
3V3
3V3
SERIAL DEBUG PORT
1
6
2
7
3
8
4
9
5
VCC
R24
PA24
B
74ALVC04
J2
USER INTERFACE
ADM3202ARN
MALE RIGHT ANGLED
A
A
Friday, June 09, 2006
C
B
A INIT EDIT
REV
AT91SAM7A3-EK
MODIF.
SCALE
JPG
JPG
JPG
13/09/05
10/03/05
08/12/04
DES.
DATE
1/1
I/O
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7
6
5
4
3
2
1
VER.
DATE
REV.
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2
2
Schematics
5-2
6165C–ATARM–26-Jun-06
AT91SAM7A3-EK Evaluation Board User Guide
Section 6
Revision History
6.1
Revision History
Table 6-1.
Change Request
Ref.
Document
Comments
6165A
First issue.
6165B
Added information on SAM-BA in Section 2.6.
05-415
6165C
Removed references to 32 Mbit serial DataFlash (AT45DB321C-CNC) in Section 1.3
and in Section 3.3. Inserted new Figure 2-2 and new schematics in Section 5.
2846
AT91SAM7A3-EK Evaluation Board User Guide
6-1
6165C–ATARM–26-Jun-06
Revision History
6-2
6165C–ATARM–26-Jun-06
AT91SAM7A3-EK Evaluation Board User Guide
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