AT93C46E-TH-T

AT93C46E 3-wire Serial EEPROM 1K (64 x 16) DATASHEET Features  Low-voltage and Standard-voltage Operation ̶ VCC = 1.8V to 5.5V  User-selectable Internal Organization  3-wire Serial Interface 2MHz Clock Rate (5.0V) Self-timed Write Cycle (5ms Max) High Reliability ̶    ̶ 1K: 64 x 16 ̶   Endurance: 1,000,000 Write Cycles Data Retention: 100 Years 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead, and TSSOP Packages Lead-free/Halogen-free Device Description The Atmel® AT93C46E provides 1,024 bits of Serial Electrically-Erasable Programmable Read-Only Memory (EEPROM) organized as 64 words of 16 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT93C46E is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead, and TSSOP packages. The AT93C46E is enabled through the Chip Select pin (CS) and accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the data is clocked out serially on the data output DO pin. The write cycle is completely self-timed, and no separate erase cycle is required before write. The write cycle is only enabled when the part is in the Erase/Write Enable state. When CS is brought high following the initiation of a write cycle, the DO pin outputs the Ready/Busy status of the part. The AT93C46E is available from 1.8V to 5.5V. Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 1. Pin Descriptions and Pinouts Table 1-1. Pin Configurations Pin Function CS Chip Select SK 8-lead PDIP Serial Data Clock DI Serial Data Input DO Serial Data Output GND Ground VCC Power Supply NC No Connect 8-lead SOIC CS 1 8 VCC CS 1 8 VCC SK 2 7 NC SK 2 7 NC DI 3 6 NC DI 3 6 NC DO 4 5 GND DO 4 5 GND Top View Top View 8-lead TSSOP CS SK DI DO 1 2 3 4 8 7 6 5 VCC NC NC GND Top View Note: 2. Absolute Maximum Ratings* Operating Temperature . . . . . . . . . . .-55C to +125C Storage Temperature . . . . . . . . . . . . .-65C to +150C Voltage on Any Pin with Respect to Ground . . . . . . . . . . . . -1.0V to +7.0V Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V DC Output Current . . . . . . . . . . . . . . . . . . . . . . 5.0 mA 2 Drawings are not to scale. AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 *Notice: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 3. Block Diagram Figure 3-1. Block Diagram VCC ORG GND Memory Array 64 x 16 Address Decoder Data Register Output Buffer DI CS SK Mode Decode Logic Clock Generator DO AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 3 4. Electrical Characteristics 4.1 Pin Capacitance Table 4-1. Pin Capacitance(1) Applicable over recommended operating range from TA = 25°C, f = 1.0MHz, VCC = +5.0V (unless otherwise noted). Symbol Test Conditions COUT CIN Note: 4.2 1. Max Units Conditions Output Capacitance (DO) 5 pF VOUT = 0V Input Capacitance (CS, SK, DI) 5 pF VIN = 0V This parameter is characterized and is not 100% tested. DC Characteristics Table 4-2. DC Characteristics Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V, (unless otherwise noted). Symbol Parameter VCC1 Supply Voltage VCC2 Max Units 1.8 5.5 V Supply Voltage 2.7 5.5 V VCC3 Supply Voltage 4.5 5.5 V ICC Supply Current VCC = 5.0V Min Typ ISB1 Standby Current ISB2 Read at 1.0MHz 0.5 2.0 mA Write at 1.0MHz 0.5 2.0 mA VCC = 1.8V CS = 0V 0.4 1.0 μA Standby Current VCC = 2.7V CS = 0V 6.0 10.0 μA ISB3 Standby Current VCC = 5.0V CS = 0V 10.0 15.0 μA IIL Input Leakage VIN = 0V to VCC 0.1 1.0 μA IOL Output Leakage VIN = 0V to VCC 0.1 1.0 μA VIL1(1) Input Low Voltage VIH1(1) Input High Voltage VIL2(1) Input Low Voltage VIH2(1) Input High Voltage VOL1 Output Low Voltage VOH1 Output High Voltage VOL2 Output Low Voltage VOH2 Output High Voltage Note: 4 Test Condition 1. 2.7V  VCC  5.5V 1.8V  VCC  2.7V 2.7V  VCC  5.5V 1.8V  VCC  2.7V Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 0.8 2.0 VCC + 1 -0.6 VCC x 0.3 VCC x 0.7 VCC + 1 IOL = 2.1mA IOH = -0.4mA 0.4 2.4 IOL = 0.15mA IOH = -100μA VIL min and VIH max are reference only and are not tested. AT93C46E [DATASHEET] -0.6 V V V 0.2 VCC  0.2 V V V 4.3 AC Characteristics Table 4-3. AC Characteristics Applicable over recommended operating range from TA = -40°C to + 85°C, VCC = +2.7V to + 5.5V, CL = 1 TTL Gate and 100pF (unless otherwise noted). Symbol Parameter fSK SK Clock Frequency tSKH SK High Time tSKL SK Low Time Minimum CS Low Time tCS tCSS CS Setup Time tDIS DI Setup Time tCSH CS Hold Time tDIH DI Hold Time tPD1 Output Delay to “1” tPD0 Output Delay to “0” tSV CS to Status Valid CS to DO in High Impedance tDF tWP (1) Endurance Note: Test Condition 1. Relative to SK Relative to SK Min AC Test AC Test AC Test AC Test CS = VIL Max 4.5V  VCC  5.5V 0 2 2.7V  VCC  5.5V 0 1 1.8V  VCC  5.5V 0 0.25 4.5V  VCC  5.5V 250 2.7V  VCC  5.5V 250 1.8V  VCC  5.5V 1,000 4.5V  VCC  5.5V 250 2.7V  VCC  5.5V 250 1.8V  VCC  5.5V 1,000 4.5V  VCC  5.5V 250 2.7V  VCC  5.5V 250 1.8V  VCC  5.5V 1,000 4.5V  VCC  5.5V 50 2.7V  VCC  5.5V 50 1.8V  VCC  5.5V 200 4.5V  VCC  5.5V 100 2.7V  VCC  5.5V 100 1.8V  VCC  5.5V 400 Relative to SK Relative to SK Typ Units MHz ns ns ns ns ns 0 4.5V  VCC  5.5V 100 2.7V  VCC  5.5V 100 1.8V  VCC  5.5V 400 ns ns 4.5V  VCC  5.5V 250 2.7V  VCC  5.5V 250 1.8V  VCC  5.5V 1,000 4.5V  VCC  5.5V 250 2.7V  VCC  5.5V 250 1.8V  VCC  5.5V 1,000 4.5V  VCC  5.5V 250 2.7V  VCC  5.5V 250 1.8V  VCC  5.5V 1,000 4.5V  VCC  5.5V 100 2.7V  VCC  5.5V 150 1.8V  VCC  5.5V 400 Write Cycle Time 0.10 5.0V, 25C 1M 3 ns ns ns ns 5 ms Write Cycle This parameter is ensured by characterization. AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 5 5. Functional Description The AT93C46E is accessed via a simple and versatile three-wire serial communication interface. Device operation is controlled by seven instructions issued by the host processor. A valid instruction starts with a rising edge of CS and consists of a Start condition (Logic 1) followed by the appropriate opcode and the desired memory address location. Table 5-1. Instruction Set Address Instruction SB Opcode x16 Comments READ 1 10 A5  A0 Reads data stored in memory, at specified address. EWEN 1 00 11XXXX Write enable must precede all programming modes. ERASE 1 11 A5  A0 Erase memory location An  A0. WRITE 1 01 A5  A0 Writes memory location An  A0. ERAL 1 00 10XXXX Erases all memory locations. Valid only at VCC = 4.5V to 5.5V. WRAL 1 00 01XXXX Writes all memory locations. Valid only at VCC = 4.5V to 5.5V. EWDS 1 00 00XXXX Disables all programming instructions. READ: The READ instruction contains the address code for the memory location to be read. After the instruction and address are decoded, data from the selected memory location is available at the Serial Output (DO) pin. Output data changes are synchronized with the rising edges of Serial Clock (SK). Note: It should be noted that a dummy bit (Logic 0) precedes the 16-bit data output string. ERASE/WRITE ENABLE (EWEN): To assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable (EWEN) instruction must be executed first before any programming instructions can be carried out. Note: Once in the EWEN state, programming remains enabled until an EWDS instruction is executed or VCC power is removed from the device. ERASE: The ERASE instruction programs all bits in the specified memory location to the Logic 1 state. The self-timed erase cycle starts once the ERASE instruction and address are decoded. The DO pin outputs the Ready/Busy status of the device if CS is brought high after being kept low for a minimum of 250ns (tCS). A Logic 1 at pin DO indicates that the selected memory location has been erased and the part is ready for another instruction. WRITE: The WRITE instruction contains the 16 bits of data to be written into the specified memory location. The self-timed programming cycle, tWP, starts after the last bit of data is received at serial data input pin DI. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a minimum of 250ns (tCS). A Logic 0 at DO indicates that programming is still in progress. A Logic 1 indicates that the memory location at the specified address has been written with the data pattern contained in the instruction and the part is ready for further instructions. A Ready/Busy status cannot be obtained if the CS is brought high after the end of the self-timed programming cycle, tWP. ERASE ALL (ERAL): The Erase All (ERAL) instruction programs every bit in the memory array to the Logic 1 state and is primarily used for testing purposes. The DO pin outputs the ready/busy status of the part if CS is brought high after being kept low for a minimum of 250ns (tCS). The ERAL instruction is valid only at VCC = 5.0V 10%. 6 AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 WRITE ALL (WRAL): The Write All (WRAL) instruction programs all memory locations with the data patterns specified in the instruction. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a minimum of 250ns (tCS). The WRAL instruction is valid only at VCC = 5.0V 10%. Erase/Write Disable (EWDS): To protect against accidental data disturb, the Erase/Write Disable (EWDS) instruction disables all programming modes and should be executed after all programming operations. The operation of the Read instruction is independent of both the EWEN and EWDS instructions and can be executed at any time. AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 7 6. Timing Diagrams Figure 6-1. Synchronous Data Timing CS SK VIH 1µs (1) VIL tSKH tCSS VIL tDIH VIH VIL tPD0 DO (Read) tCSH VIH tDIS DI tSKL tDF tPD1 VOH VOL tDF tSV DO (Program) VOH Status Valid VOL Note: 1. Table 6-1. This is the minimum SK period. Organization Key for Timing Diagrams I/O x16 AN A5 DN D15 Figure 6-2. Read Timing tCS CS SK DI DO 8 1 1 0 AN A0 High-impedance AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 0 DN D0 Figure 6-3. EWEN Timing(1) tCS CS SK 1 DI Note: 1. Figure 6-4. 0 0 1 ... 1 Requires a minimum of nine clock cycles. ERASE Timing tCS CS Standby Check Status SK DI 1 1 1 AN AN-1 AN-2 ... A0 tDF tSV DO High-impedance High-impedance Busy Ready tWP Figure 6-5. Write Timing tCS CS SK DI DO 1 0 1 AN ... A0 DN ... D0 High-impedance Busy Ready tWP AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 9 Figure 6-6. ERAL Timing(1) tCS Standby Check Status CS SK 1 DI 0 0 1 0 tDH tSV High-impedance DO High-impedance Busy Ready tWP Note: 1. Figure 6-7. Valid only at VCC = 4.5V to 5.5V. WRAL Timing(1) (2) tCS CS SK 1 DI 0 0 0 1 ... DN ... D0 High-impedance DO Busy tWP Notes: 1. 2. Figure 6-8. Valid only at VCC = 4.5V to 5.5V. Requires a minimum of nine clock cycles. EWDS Timing(1) tCS CS SK 1 DI Note: 10 1. 0 0 0 0 Requires a minimum of nine clock cycles. AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 ... Ready 7. Ordering Code Detail AT 9 3 C 4 6 E N - S H - B Atmel Designator Shipping Carrier Option B or Blank = Bulk (Tubes) T = Tape and Reel Product Family 93C = Microwire-compatible 3-Wire Serial EEPROM Device Density 46 = 1 kilobit Device Revision Package Device Grade or Wafer/Die Thickness H = Green, NiPdAu Lead Finish Industrial Temperature Range (-40°C to +85°C) U = Green, Matte Sn Lead Finish Industrial Temperature Range (-40°C to +85°C) Package Variation (if applicable) Package Option N = 0.150” Wide JEDEC SOIC S = JEDEC SOIC T = TSSOP P = PDIP AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 11 8. Ordering Information Delivery Information Atmel Ordering Code Lead Finish Package AT93C46EN-SH-B Form Quantity Bulk (Tubes) 100 per Tube Tape and Reel 4,000 per Reel Bulk (Tubes) 100 per Tube Tape and Reel 5,000 per Reel Bulk (Tubes) 50 per Tube Operation Range 8S1 AT93C46EN-SH-T AT93C46E-TH-B NiPdAu (Lead-free/Halogen-free) 8X AT93C46E-TH-T AT93C46E-PU Matte Tin (Lead-free/Halogen-free) 8P3 Package Type 12 8S1 8-lead, 0.150” wide, Plastic Gull Wing, Small Outline (JEDEC SOIC) 8X 8-lead, 0.170” wide, Thin Shrink Small Outline Package (TSSOP) 8P3 8-lead, 0.300” wide body, Plastic Dual In-line Package (PDIP) AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 Industrial Temperature (-40C to 85C) 9. Part Markings AT93C46E: Package Marking Information 8-lead TSSOP 8-lead SOIC ATMLHYWW ### % AAAAAAAA 8-lead PDIP ATMLUYWW ### % AAAAAAAA HYWW ###% Note: Lot Number and location of assembly and on the bottom side of the package. Note 1: designates pin 1 Note 2: Package drawings are not to scale Catalog Number Truncation AT93C46E Truncation Code ###: 46E Date Codes Y = Year 4: 2014 5: 2015 6: 2016 7: 2017 Voltages 8: 2018 9: 2019 0: 2020 1: 2021 M = Month A: January B: February ... L: December WW = Work Week of Assembly 02: Week 2 04: Week 4 ... 52: Week 52 Country of Assembly Lot Number @ = Country of Assembly AAA...A = Atmel Wafer Lot Number Trace Code % = Minimum Voltage 1: 1.8V min Grade/Lead Finish Material U: Industrial/Matte Tin/SnAgCu H: Industrial/NiPdAu Atmel Truncation XX = Trace Code (Atmel Lot Numbers Correspond to Code) Example: AA, AB.... YZ, ZZ AT: Atmel ATM: Atmel ATML: Atmel 3/13/14 TITLE DRAWING NO. REV. 93C46ESM A 93C46ESM, AT93C46E Package Marking Information Package Mark Contact: DL-CSO-Assy_eng@atmel.com AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 13 10. Packaging Information 10.1 8S1 — 8-lead JEDEC SOIC C 1 E E1 L N Ø TOP VIEW END VIEW e b COMMON DIMENSIONS (Unit of Measure = mm) A A1 D SIDE VIEW Notes: This drawing is for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. SYMBOL MIN A 1.35 NOM MAX – 1.75 A1 0.10 – 0.25 b 0.31 – 0.51 C 0.17 – 0.25 D 4.80 – 5.05 E1 3.81 – 3.99 E 5.79 – 6.20 e NOTE 1.27 BSC L 0.40 – 1.27 Ø 0° – 8° 6/22/11 Package Drawing Contact: packagedrawings@atmel.com 14 TITLE 8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 GPC SWB DRAWING NO. REV. 8S1 G 10.2 8X — 8-lead TSSOP C 1 Pin 1 indicator this corner E1 E L1 N L Top View End View A b A1 e D SYMBOL Side View Notes: COMMON DIMENSIONS (Unit of Measure = mm) A2 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15mm (0.006in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25mm (0.010in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm. 5. Dimension D and E1 to be determined at Datum Plane H. MIN NOM MAX A - - 1.20 A1 0.05 - 0.15 A2 0.80 1.00 1.05 D 2.90 3.00 3.10 2, 5 E NOTE 6.40 BSC E1 4.30 4.40 4.50 3, 5 b 0.19 0.25 0.30 4 e L 0.65 BSC 0.45 L1 C 0.60 0.75 1.00 REF 0.09 - 0.20 2/27/14 TITLE Package Drawing Contact: packagedrawings@atmel.com 8X, 8-lead 4.4mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) GPC TNR DRAWING NO. 8X AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 REV. E 15 10.3 8P3 — 8-lead PDIP E 1 E1 .381 Gage Plane N Top View c eA End View COMMON DIMENSIONS (Unit of Measure = mm) D e D1 A2 A A1 b2 b3 b v 4 PLCS Side View L 0.254 m C MIN NOM MAX A - - 5.334 A1 0.381 A2 2.921 3.302 4.953 b 0.356 0.457 0.559 5 b2 1.143 1.524 1.778 6 b3 0.762 0.991 1.143 6 c 0.203 0.254 0.356 D 9.017 9.271 10.160 3 D1 0.127 0.000 0.000 3 E 7.620 7.874 8.255 4 E1 6.096 6.350 7.112 3 3.810 2 SYMBOL - e Notes: 2 - 2.540 BSC eA L NOTE 7.620 BSC 2.921 3.302 4 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. 3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch. 4. E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion. 6. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 07/31/14 Package Drawing Contact: packagedrawings@atmel.com 16 TITLE GPC DRAWING NO. 8P3, 8-lead, 0.300” Wide Body, Plastic Dual In-line Package (PDIP) PTC 8P3 AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 REV. E 11. Revision History Doc. Rev. Date 5207F 01/2015 Comments Updated ordering information section. Added the part markings and ordering code detail. 5207E 10/2014 Updated the package outline drawings and the 8A2 to 8X. Updated the template, Atmel logos, and the disclaimer page. 5207D 01/2008 Removed ‘preliminary’ status 5207C 11/2007 Modified ‘max’ value on AC Characteristics table 5207B 08/2007 Modified Part Marking Scheme Tables 5207A 01/2007 Initial document release AT93C46E [DATASHEET] Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015 17 XXXXXX Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T: (+1)(408) 441.0311 F: (+1)(408) 436.4200 | www.atmel.com © 2015 Atmel Corporation. / Rev.: Atmel-5207F-SEEPROM-AT93C46E-Datasheet_012015. Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, and others are registered trademarks or trademarks of Atmel Corporation in U.S. and other countries. Other terms and product names may be trademarks of others. DISCLAIMER: The information in this document is provided in connection with Atmel products. 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