ATA663211
LIN Transceiver
Features
Description
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The ATA663211 device is a fully integrated LIN
transceiver designed in compliance with the LIN
specification 2.0, 2.1, 2.2, 2.2A and SAEJ2602-2. It
interfaces the LIN protocol handler and the physical
layer. The device is designed to handle the low-speed
data communication in convenience electronics, for
example, in vehicles. Improved slope control at the LIN
bus ensures data communication up to 20 Kbaud.
Sleep mode guarantees minimal current consumption
even in the case of a floating bus line or a short circuit
on the LIN bus to GND.
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ISO 26262 Functional Safety Ready
Supply Voltage up to 40V
Operating Voltage VVS = 5V to 28V
Very Low Supply Current
- Sleep mode: Typically 9 A
- Fail-Safe mode: Typically 80 A
- Normal mode: Typically 250 A
Fully Compatible with 3.3V and 5V Devices
LIN Physical Layer according to LIN 2.0, 2.1, 2.2,
2.2A and SAEJ2602-2
Wake-Up Capability through LIN bus (100 s
Dominant)
External Wake Up through WKin pin (100 s Low
Level)
INH Output to Control an External Voltage
Regulator or to Switch the Commander Pull-Up
Wake-Up Source Recognition
TXD Time-Out Timer
Bus Pin is Overtemperature and Short-Circuit
Protected vs. GND and Battery
Advanced EMC and ESD Performance
Fulfills the OEM “Hardware Requirements for LIN
in Automotive Applications Rev.1.3”
Interference and Damage Protection according to
ISO7637
Qualified according to AEC-Q100 and AEC-Q006
Package: 8-Lead VDFN, 8-Lead SOIC, with
Wettable Flanks (Moisture Sensitivity Level 1)
Note:
The current LIN standards use the
terminology "Master" and "Slave”.
The LIN standard groups have decided
that the terms "Commander" and
"Responder" will be used in future.
Package Types
ATA663211
8-Lead VDFN
RXD 1
EN 2
WKin 3
TXD 4
8 INH
EP
9
7 VS
6 LIN
5 GND
ATA663211
8-Lead SOIC
RXD 1
EN 2
WKin 3
TXD 4
8 INH
7 VS
6 LIN
5 GND
*Includes Exposed Thermal Pad (EP);
see Table 1-4.
2019-2021 Microchip Technology Inc.
DS20006191D-page 1
ATA663211
ATA663211 Block Diagram
7
VS
6
LIN
5
GND
ATA663211
RXD
1
Receiver
+
RF-Filter
Wake-up bus timer
TXD
TXD
Time-out
Timer
4
Short-circuit and
overtemperature
protection
Slew rate control
VS
VS
WKin
3
Wake-up
Timer
Normal/
Control
Fail-safe
Unit
Mode
with
Mode
Selection Sleep
Mode
2
8
EN
DS20006191D-page 2
INH
2019-2021 Microchip Technology Inc.
ATA663211
1.0
FUNCTIONAL DESCRIPTION
1.1
Physical Layer Compatibility
Since the LIN physical layer is independent of higher
LIN layers (for example, LIN protocol layer), all nodes
with a LIN physical layer according to revision 2.x can
be mixed with LIN physical layer nodes based on
earlier versions (for instance, LIN 1.0, LIN 1.1,LIN 1.2,
LIN 1.3) without any restrictions.
1.2
Operating Modes
FIGURE 1-1:
ATA663211 OPERATING MODES
a: VVS > VVS_th_U_F_up (2.4V)
b: VVS < VVS_th_U_)Bdown (1.9V)
c: Bus wake-up event (LIN)
d: e: VVS < VVS_th_N_F_down (3.9V)
f: VVS > VVS_th_F_N_up (4.9V)
g: Local WAKE event (WKin)
Unpowered Mode
All circuitry OFF
a
b
Fail-safe Mode
(c + g) & f
EN = 0
7;'
±
I
Communication: OFF
Wake-up Signaling
Undervoltage Signaling
INH output switched ON
EN = 1
&f
b
e
EN = 1
Sleep Mode
Communication: OFF
INH output switched OFF
Normal Mode
&f
Go to sleep
command EN = 0
Communication: ON
INH output switched ON
Note 1: Condition f is valid for VS ramp up; at VS ramp down condition e is valid instead of f.
TABLE 1-1:
ATA663211 OPERATING MODES
Operating Mode
Transceiver
INH
LIN
Fail-Safe
OFF
ON
Recessive
Signaling fail-safe sources
(see Table 1-2)
Normal
ON
ON
TXD-dependent
Follows data transmission
Sleep/Unpowered
OFF
OFF
Recessive
2019-2021 Microchip Technology Inc.
TXD
Low
RXD
High Ohmic
DS20006191D-page 3
ATA663211
1.2.1
NORMAL MODE
1.2.3
This is the normal transmitting and receiving mode of
the LIN Interface, in accordance with LIN specification
2.x.
1.2.2
SLEEP MODE
A falling edge at EN switches the IC into Sleep mode.
While in Sleep mode, the transmission path is disabled
and the device is in Low-Power mode. Supply current
from VBAT is typically 9 A. In Sleep mode the INH pin
is switched off. The internal termination resistor
between the LIN pin and VS pin is disabled. Only a
weak pull-up current (typical 10 A) between the LIN
pin and VS pin is present. Sleep mode can be activated
independently from the actual level on the LIN or WKin
pin.
If the TXD pin is short-circuited to GND, it is possible to
switch to Sleep mode though EN after t > tdom.
TABLE 1-2:
FAIL-SAFE MODE
The device automatically switches to Fail-Safe mode at
system power-up or after a wake-up event. The INH
output is switched on and the LIN transceiver is
switched off. The IC stays in this mode until EN is
switched to high. The IC then changes to Normal
mode. During Fail-Safe mode the TXD pin is an output,
and, together with the RXD output pin, signals the
fail-safe source.
If the device enters Fail-Safe mode coming from the
Normal mode (EN = 1) due to a VS undervoltage
condition (VVS < VVS_th_N_F_down), it is possible to
switch into Sleep mode by a falling edge at the EN
input. With this feature, the current consumption is
further reduced.
A wake-up event from Sleep mode is signaled to the
microcontroller using the RXD pin and the TXD pin. A
VS undervoltage condition is also signaled at these two
pins. The coding is shown in Table 1-2.
SIGNALING IN FAIL-SAFE MODE
Fail-Safe Sources
TXD
RXD
LIN wake-up (LIN pin)
Low
Low
Local wake-up (WKin pin)
Low
High
VSth (battery) undervoltage
detection VVS < 3.9V
High
Low
Note 1:
1.3
1.3.1
1.3.1.1
Assuming an external pull-up resistor (typical 5 k) has been added on pin TXD to the power supply of the
microcontroller.
Wake-Up Scenarios from Sleep
Mode
REMOTE WAKE UP THROUGH LIN
BUS
Remote Wake-up from Sleep Mode
A voltage lower than the LIN pre-wake detection VLINL
at the LIN pin activates the internal LIN receiver and
starts the wake-up detection timer. A falling edge at the
LIN pin, followed by a dominant bus level maintained
for a certain period of time (>tbus) and following a rising
edge at the LIN pin result in a remote wake-up request
and the device switches to Fail-Safe mode. The INH
pin is activated (switches to VS) and the internal LIN
termination resistor is switched on. The remote
wake-up request is indicated by a low level at pin RXD
and interrupts the microcontroller.
DS20006191D-page 4
1.3.2
LOCAL WAKE UP THROUGH WKIN
PIN
A falling edge at the WKin pin followed by a low level
maintained for a certain period of time (>tWKin) result in
a local wake-up request and the device switches to
Fail-Safe mode. The INH pin is activated (switches to
VS) and the internal LIN termination resistor is
switched on. The local wake-up request is indicated by
a low level at the TXD pin and a high level at the RXD
pin, generating an interrupt for the microcontroller.
Even when the WKin pin is low, it is possible to switch
to Sleep mode via the EN pin. In this case, the wake-up
signal has to be switched to high >10 s before the
negative edge at WKin starts a new local wake-up
request.
2019-2021 Microchip Technology Inc.
ATA663211
FIGURE 1-2:
LIN WAKE-UP FROM SLEEP MODE
Fail-safe Mode
Normal Mode
Bus wake-up filtering time
(tBUS)
LIN bus
High
INH
Low or floating
RXD
Low
TXD
Low (strong pull-down)
External
voltage
regulator
On state
Off state
Regulator wake-up time delay
EN High
EN
Node in sleep state
Microcontroller start-up
delay time
FIGURE 1-3:
LOCAL WAKE-UP FROM WAKE-UP SWITCH
Fail-safe Mode
Normal Mode
State change
WKin
High
INH
Low or floating
High
RXD
TXD
External
voltage
regulator
Low (strong pull-down)
Wake filtering time
WKin
On state
Off state
Regulator wake-up time delay
EN High
EN
Node in sleep state
Microcontroller start-up
delay time
2019-2021 Microchip Technology Inc.
DS20006191D-page 5
ATA663211
1.3.3
WAKE-UP SOURCE RECOGNITION
The device can distinguish between different wake-up
sources. The wake-up source can be read on the TXD
and RXD pin in Fail-Safe mode according to Table 1-3,
if an external pull-up resistor (typically 5 k) has been
TABLE 1-3:
SIGNALING IN FAIL-SAFE MODE
Fail-Safe Sources
TXD
RXD
LIN wake up (LIN pin)
Low
Low
Local wake up (WKin pin)
Low
High
VSth (battery) undervoltage detection (VVS < 3.9V)
High
Low
Note 1:
1.4
added on pin TXD to the power supply of the
microcontroller. These flags are reset immediately if the
microcontroller sets pin EN to high and the IC is in
Normal mode.
Assuming an external pull-up resistor (typical 5 k) has been added on pin TXD to the power supply of the
microcontroller.
Behavior under Low Supply
Voltage Condition
After the battery voltage has been connected to the
application circuit, the voltage at the VS pin increases
according to the block capacitor used in the application
(see Figure “ATA663211 Block Diagram”). If VVS is
higher than the minimum VS operation threshold
VVS_th_U_F_up, the IC mode changes from Unpowered
mode to Fail-Safe mode, the INH output is switched on
and the LIN transceiver can be activated.
If, during Sleep mode, the voltage level of VVS drops
below the under-voltage detection threshold
VVS_th_N_F_down (typically 4.3V), the operation mode is
not changed and no wake up is possible. Only if the
supply voltage on the VS pin drops below the VS
operation threshold VVS_th_U_F_down (typically 2.05V),
does the IC switch to Unpowered mode.
If, during Normal mode, the voltage level on the VS pin
drops below the VS undervoltage detection threshold
VVS_th_N_F_down (typically 4.3V), the IC switches to
Fail-Safe mode. This means that the LIN transceiver is
disabled in order to avoid malfunctions or false bus
messages. If the supply voltage VVS drops further
below the VS operation threshold VVS_th_U_F_down
(typically 2.05V), the IC switches to Unpowered mode
and the INH output switches off.
DS20006191D-page 6
2019-2021 Microchip Technology Inc.
ATA663211
1.5
Pin Descriptions
The descriptions of the pins are listed in Table 1-4.
TABLE 1-4:
PIN FUNCTIONING TABLE
Pin
Symbol
1
RXD
2
EN
3
WKin
High-voltage input for local wake-up request. If not needed, connect directly to VS
4
TXD
Transmit data input
5
GND
6
LIN
LIN bus line input/output
7
VS
Supply voltage
8
INH
Battery-related high-side switch output for controlling an external voltage regulator or to
switch off the LIN Commander pull-up resistor; switched on after a wake-up request
Backside
EP
Heat slug, internally connected to the GND pin (only for the VDFN8 package)
1.5.1
Function
Receive data output
Enables Normal mode if the input is high
Ground, heat slug
OUTING PIN (RXD)
In Normal mode, this pin reports the state of the LIN
bus to the microcontroller. LIN high (Recessive state) is
indicated by a high level at RXD; LIN low (Dominant
state) is indicated by a low level at RXD.
The output is an open drain; it is compatible with a 3.3V
or 5V power supply. The AC characteristics are defined
by an external pull-up resistor of 4.7 k to 5V and a
load capacitor of 20 pF.
In Unpowered mode, RXD is switched off.
1.5.2
ENABLE INPUT PIN (EN)
The enable input pin controls the operating mode of the
device. If EN is high, the circuit is in Normal mode, with
transmission paths from TXD to LIN and from LIN to
RXD both active.
If EN is switched to low while TXD is still high, the
device is forced to Sleep mode. This means that no
data transmission is possible and current consumption
is reduced to IVSsleep typical 9 A.
The EN pin provides a pull-down resistor to force the
transceiver into Recessive mode if EN is disconnected.
1.5.3
WKIN PIN
This pin is a high-voltage input used for waking up the
device from Sleep mode. It is usually connected to an
external switch in the application to generate a local
wake up. A pull-up current source with typically 10 A
is implemented. The voltage threshold for a wake-up
signal is typically 2V below the VVS voltage.
1.5.4
INPUT/OUTPUT (TXD)
In Normal mode, the TXD pin is the microcontroller
interface for controlling the state of the LIN output. TXD
must be pulled to ground in order to drive the LIN bus
low. If TXD is high, the LIN output transistor is turned off
and the bus is in the Recessive state. If the TXD pin
stays at GND level while switching into Normal mode,
it must be pulled to high level longer than 10 s before
the LIN driver can be activated. This feature prevents
the bus line from being accidentally driven to Dominant
state after Normal mode has been activated (also in
case of a short circuit at TXD to GND). During Fail-Safe
mode, this pin is used as output and signals the
fail-safe source.
The TXD pin provides a pull-down resistor in order to
have a defined level if TXD is disconnected.
An internal timer prevents the bus line from being
driven permanently in the Dominant state. If TXD is
forced to low longer than tdom > 20 ms, the LIN bus
driver is switched to the Recessive state. Nevertheless,
when switching to Sleep mode, the actual level at the
TXD pin is relevant.
To reactivate the LIN bus driver, switch TXD to high
(>10 s).
1.5.5
GROUND PIN (GND)
The IC does not affect the LIN bus in the event of GND
disconnection. It is able to handle a ground shift of up
to 11.5% of VVS.
If a local wake up is not needed in the application, the
WKin pin can be connected directly to the VS pin.
2019-2021 Microchip Technology Inc.
DS20006191D-page 7
ATA663211
1.5.6
BUS PIN (LIN)
1.5.7
SUPPLY PIN (VS)
A low-side driver with internal current limitation and
thermal shutdown as well as an internal pull-up resistor
according to LIN specification 2.x is implemented. The
voltage range is from -27V to +40V. This pin exhibits no
reverse current from the LIN bus to VS, even in the
event of a GND shift or VBat disconnection. The LIN
receiver thresholds comply with the LIN protocol
specification.
LIN operating voltage is VS = 5V to 28V. Undervoltage
detection is implemented to disable transmission if VS
falls below typical 4.5V, in order to avoid false bus
messages. After switching on VVS, the IC starts in
Fail-Safe mode and the INH output is switched on.
The fall time (from recessive to dominant) and the rise
time (from dominant to recessive) are slope-controlled.
This pin is used to control an external voltage regulator
or to switch the LIN Commander pull-up resistor
ON/OFF in case the device is used in a Commander
node. The inhibit pin provides an internal switch toward
the VS pin which is protected by temperature monitoring. If the device is in normal or Fail-Safe mode, the
inhibit high-side switch is turned on. When the device is
in Sleep mode, the inhibit switch is turned off, thus disabling the voltage regulator or other connected external
devices.
The supply current in Sleep mode is typically 9 A.
1.5.8
During a short circuit at LIN to VBat, the output limits the
output current to IBUS_LIM. Due to the power
dissipation, the chip temperature exceeds Toff and the
LIN output is switched off. The chip cools down and
after a hysteresis of Thys, switches the output on again.
RXD stays on high because LIN is high.
During a short circuit from LIN to GND, the IC can be
switched into Sleep mode and even in this case the
current consumption is lower than 100 A. If the short
circuit disappears, the IC starts with a remote wake up.
A wake-up event on the LIN bus or at the WKin pin
switches the INH pin to the VS level. After a system
power-up (VVS rises from zero), the INH pin switches to
the VVS level automatically.
The reverse current is VVS – 0.5V
VVS < 14V
IVSsleep_short
20
50
100
A
Sleep mode, VLIN = 0V
bus shorted to GND
VVVS < 14V
Supply Current
in Normal Mode
IVSrec
150
250
320
A
Bus recessive
VVS < 14V
Supply Current
in Normal Mode
IVSdom
200
700
950
A
Bus dominant
(internal LIN pull-up resistor
active)
VVS < 14V
1.6
Supply Current
in Fail-Safe mode
IVSfail
40
80
110
A
Bus recessive
VVS < 14V
VS Undervoltage
Threshold (switching
from Normal to
Fail-Safe mode)
VVS_th_N_F_down
3.9
4.3
4.7
V
Decreasing supply voltage
1.7
VVS_th_F_N_up
4.1
4.6
4.9
V
Increasing supply voltage
1.8
VS Undervoltage
Hysteresis
VVS_hys_F_N
0.1
0.25
0.4
V
VVS_th_U_F_down
1.9
2.05
2.3
V
Switch to Unpowered mode
1.9
VS Operation
Threshold (switching
to Unpowered mode)
VVS_th_U_F_up
2.0
2.25
2.4
V
Switch from Unpowered
to Fail-Safe mode
1.10
VS Undervoltage
Hysteresis
VVS_hys_U
0.1
0.2
0.3
V
1
Parameters
Conditions
VS Pin
1.1
1.3
1.4
1.5
2
RXD Output Pin (Open Drain)
2.1
Low-Level Output Sink
Capability
VRXDL
—
0.2
0.4
V
Normal mode,
VLIN = 0V, IRXD = 2 mA
2.3
High-Level
Leakage Current
IRXDH
-3
—
+3
A
Normal mode
VLIN = VVS, VRXD = 5V
3
TXD Input/Output Pin
3.1
Low-Level Voltage
Input
VTXDL
-0.3
—
+0.8
V
3.2
High-Level Voltage
Input
VTXDH
2
—
5.5
V
Pull-Down Resistor
RTXD
150
200
300
k
VTXD = 5V
Low-level
Leakage Current
ITXD
-3
—
+3
A
VTXD = 0V
3.5
3.6
Note 1:
2:
3:
100% correlation tested.
Characterized on samples.
Design parameter.
DS20006191D-page 10
2019-2021 Microchip Technology Inc.
ATA663211
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Characteristics: Unless otherwise specified all values refer to GND pins, 5V < VVS < 28V, -40°C < TVJ < 150°C.
No.
Parameters
Symbol
Min.
Typ.
Max.
Unit
Low-Level Output Sink
Current at Wake-Up
Request
ITXD
2
2.5
8
mA
3.7
4
Conditions
Fail-Safe mode
VTXD = 0.4V
EN Input Pin
4.1
Low-Level
Voltage Input
VENL
-0.3
—
+0.8
V
4.2
High-Level
Voltage Input
VENH
2
—
5.5
V
4.3
Pull-Down Resistor
REN
50
125
200
k
VEN = 5V
4.4
Low-Level
Input Current
IEN
-3
—
+3
A
VEN = 0V
6
WKin Input Pin
6.1
High-Level Input
Voltage
VWKinH
VVS – 1V
—
VVS + 0.3V
V
6.2
Low-Level Input
Voltage
VWKinL
-1
—
VVS – 3.3V
V
Initializes a wake-up signal
6.3
WKin Pull-Up Current
IWKIN
-30
-10
A
VVS < 28V, VWKin = 0V
6.4
High-Level Leakage
Current
IWKINL
-5
—
+5
A
VVS = 28V, VWKin = 28V
Debounce Time of
Low Pulse for Wake
up via WKin
tWKin
50
100
150
s
6.5
VWKin = 0V
RDSON,INH
—
12
25
Normal or Fail-Safe mode
IINH = -15 mA
ILEAK,INH
-3
—
+3
A
Transceiver in Sleep mode,
VINH = 0V/28V, VVS = 28V
VINH
VVS –
0.375
—
VVS
V
Normal or Fail-Safe mode
IINH = -15 mA
7
INH Output Pin
7.1
7.2
7.3
10
Switch on Resistance
Between VS and INH
Leakage Current
High-Level Voltage
LIN Bus Driver: Bus Load Conditions:
Load 1 (small): 1 nF, 1 k; Load 2 (large): 10 nF, 500; External Pull-up RRXD = 4.7 k ; CRXD = 20 pF,
Load 3 (medium): 6.8 nF, 660 characterized on samples, 12.7 and 12.8 specifies the timing parameters for proper
operation at 20 kb/s and 12.9 and 12.10 at 10.4 kb/s
10.1
Driver Recessive
Output Voltage
VBUSrec
0.9 * VVS
—
VVS
V
Load1/Load2
10.2
Driver Dominant
Voltage
V_LoSUP
—
—
1.2
V
VVS = 7V
Rload = 500
10.3
Driver Dominant
Voltage
V_HISUP
—
—
2
V
VVS = 18V
Rload = 500
10.4
Driver Dominant
Voltage
V_LoSUP_1k
0.6
—
—
V
VVS = 7V
Rload = 1000
10.5
Driver Dominant
Voltage
V_HISUP_1K
0.8
—
—
V
VVS = 18V
Rload = 1000
RLIN
20
30
47
k
10.6
Pull-Up Resistor to VS
Note 1:
2:
3:
The serial diode is mandatory
100% correlation tested.
Characterized on samples.
Design parameter.
2019-2021 Microchip Technology Inc.
DS20006191D-page 11
ATA663211
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Characteristics: Unless otherwise specified all values refer to GND pins, 5V < VVS < 28V, -40°C < TVJ < 150°C.
No.
Parameters
Symbol
Min.
Typ.
Max.
Unit
Conditions
10.7
Voltage Drop at the
Serial Diodes
VSerDiode
0.4
—
1.0
V
10.8
LIN Current Limitation
VBUS = VBAT_MAX
IBUS_LIM
40
120
200
mA
IBUS_PAS_dom
-1
-0.35
—
mA
10.9
Input leakage current
at the receiver
including pull-up
resistor as specified
Input leakage current
driver off
VBUS= 0V
VBAT = 12V
Leakage Current
LIN Recessive
IBUS_PAS_rec
—
10
20
A
Driver off
8V < VBAT< 18V
8V < VBUS < 18V
VBUS ≥ VBAT
IBUS_NO_gnd
-10
+0.5
+10
A
10.11
Leakage current when
control unit is
disconnected from
ground. Loss of local
ground must not affect
communication in the
residual network
GNDDevice = VVS
VBAT= 12V
0V < VBUS< 18V
IBUS_NO_bat
—
0.1
2
A
VBAT disconnected
VSUP_device = GND
0V < VBUS < 18V
10.12
Leakage current at
disconnected battery.
Node has to sustain
the current that can
flow under this
condition. Bus must
remain operational
under this condition.
10.13
Capacitance on LIN
pin to GND
CLIN
—
—
20
pF
(Note 3)
11
LIN Bus Receiver
10.10
In pull-up path with RLIN
ISerDiode = 10 mA (Note 3)
11.1
Center of Receiver
Threshold
VBUS_CNT
0.475 * VVS
0.5 * VS
0.525 * VVS
V
VBUS_CNT =
(Vth_dom + Vth_rec)/2
11.2
Receiver Dominant
State
VBUSdom
-27
—
0.4 * VS
V
VEN = 5V
11.3
Receiver Recessive
State
VBUSrec
0.6 * VVS
—
40
V
VEN = 5V
11.4
Receiver Input
Hysteresis
VBUShys
0.028 * VVS
0.1 * VS
0.175 * VVS
V
Vhys =
Vth_rec - Vth_dom
Pre-Wake Detection
LIN High-Level Input
Voltage
VLINH
VVS – 2V
—
VVS + 0.3V
V
11.5
Pre-Wake Detection
LIN Low-Level Input
Voltage
VLINL
-27
—
VVS – 3.3V
V
11.6
Note 1:
2:
3:
Activates the LIN receiver
100% correlation tested.
Characterized on samples.
Design parameter.
DS20006191D-page 12
2019-2021 Microchip Technology Inc.
ATA663211
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Characteristics: Unless otherwise specified all values refer to GND pins, 5V < VVS < 28V, -40°C < TVJ < 150°C.
No.
12
Parameters
Symbol
Min.
Typ.
Max.
Unit
Conditions
tbus
50
100
150
s
VLIN = 0V
Internal timers
12.1
Dominant time for
wake up via LIN bus
tnorm
5
15
20
s
VEN = 5V
12.2
Time delay for mode
change from Fail-Safe
into Normal mode via
EN pin
tsleep
5
15
20
s
VEN = 0V
12.3
Time delay for mode
change from Normal
mode to Sleep mode
via EN pin
ts_n
—
150
300
s
VEN = 5V
12.4
Time delay for mode
change from Sleep
mode to Normal mode
via EN pin
12.5
TXD dominant
time-out time
tdom
20
40
60
ms
VTXD = 0V
Duty Cycle 1
D1
0.396
—
—
—
THRec(max) = 0.744 x VVS
THDom(max) = 0.581 x VVS
VVS = 7.0V to 18V
tBit = 50 s
D1 = tbus_rec(min)/(2 x tBit)
Duty Cycle 2
D2
—
—
0.581
—
THRec(min) = 0.422 x VVS
THDom(min) = 0.284 x VVS
VVS = 7.6V to 18V
tBit = 50 s
D2 = tbus_rec(max)/(2 x tBit)
Duty Cycle 3
D3
0.417
—
—
—
THRec(max) = 0.778 x VVS
THDom(max) = 0.616 x VVS
VVS = 7.0V to 18V
tBit = 96 µs
D3 = tbus_rec(min)/(2 x tBit)
Duty Cycle 4
D4
—
—
0.590
—
THRec(min) = 0.389 x VVS
THDom(min) = 0.251 x VVS
VVS = 7.6V to 18V
tBit = 96 µs
D4 = tbus_rec(max)/(2 x tBit)
tSLOPE_fall
tSLOPE_rise
3.5
—
22.5
s
VVS = 7.0V to 18V
12.7
12.8
12.9
12.10
12.11
13
Slope time falling and
rising edge at LIN
Receiver electrical AC parameters of the LIN physical layer
LIN receiver, RXD load conditions: CRXD = 20 pF, RRXD = 4.7 k
13.1
Propagation delay of
receiver
trx_pd
—
—
5
s
VVS = 7.0V to 18V
trx_pd = max(trx_pdr, trx_pdf)
Symmetry of receiver
propagation delay
rising edge minus
falling edge
trx_sym
-2
—
+2
s
13.2
VVS = 7.0V to 18V
trx_sym = trx_pdr - trx_pdf
Note 1:
2:
3:
100% correlation tested.
Characterized on samples.
Design parameter.
2019-2021 Microchip Technology Inc.
DS20006191D-page 13
ATA663211
FIGURE 2-1:
DEFINITION OF BUS TIMING CHARACTERISTICS
tBit
tBit
tBit
TXD
(Input to transmitting node)
tBus_dom(max)
tBus_rec(min)
Thresholds of
receiving node1
THRec(max)
VS
(Transceiver supply
of transmitting node)
THDom(max)
LIN Bus Signal
Thresholds of
receiving node2
THRec(min)
THDom(min)
tBus_rec(max)
tBus_dom(min)
RXD
(Output of receiving node1)
trx_pdf(1)
trx_pdr(1)
RXD
(Output of receiving node2)
trx_pdr(2)
trx_pdf(2)
TEMPERATURE SPECIFICATIONS 8-LEAD VDFN
Parameters
Sym.
Min.
Typ.
Max.
Unit
Thermal resistance virtual junction to exposed
thermal pad
RthvJC
—
10
—
K/W
Thermal resistance virtual junction to ambient,
where exposed thermal pad is soldered to the PCB,
according to JEDEC
RthvJA
—
50
—
K/W
Thermal shutdown
Toff
150
165
180
°C
Thermal shutdown hysteresis
Thys
—
10
—
°C
TEMPERATURE SPECIFICATIONS 8-LEAD SOIC
Parameters
Sym.
Min.
Typ.
Max.
Unit
Thermal resistance virtual junction to ambient, with
a heat sink at GND (pin 5) on PCB (fused lead frame
to pin 5)
RthvJA
—
80
—
K/W
Thermal shutdown
Toff
150
165
180
°C
Thermal shutdown hysteresis
Thys
5
10
20
°C
DS20006191D-page 14
2019-2021 Microchip Technology Inc.
ATA663211
3.0
PACKAGING INFORMATION
Package Marking Information
8-Lead VDFN (3x3 mm)
Example ATA663211
XXXXXX
NNN
663211
256
PIN 1
PIN 1
8-Lead SOIC (3.90 mm)
Atmel YWW
XXXXXX
YYWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Example ATA663211
Atmel 841
663211
1841256
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note:
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) symbol may not be to scale.
2019-2021 Microchip Technology Inc.
DS20006191D-page 15
ATA663211
8-Lead Plastic Small Outline (OA) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2X
0.10 C A–B
D
A
D
NOTE 5
N
E
2
E1
2
E1
E
2X
0.10 C A–B
2X
0.10 C A–B
NOTE 1
2
1
e
B
NX b
0.25
C A–B D
NOTE 5
TOP VIEW
0.10 C
C
A A2
SEATING
PLANE
8X
A1
SIDE VIEW
0.10 C
h
R0.13
h
R0.13
H
SEE VIEW C
VIEW A–A
0.23
L
(L1)
VIEW C
Microchip Technology Drawing No. C04-057-OA Rev F Sheet 1 of 2
DS20006191D-page 16
2019-2021 Microchip Technology Inc.
ATA663211
8-Lead Plastic Small Outline (OA) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
Number of Pins
N
e
Pitch
Overall Height
A
Molded Package Thickness
A2
§
Standoff
A1
Overall Width
E
Molded Package Width
E1
Overall Length
D
Chamfer (Optional)
h
Foot Length
L
L1
Footprint
Foot Angle
c
Lead Thickness
b
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
MIN
1.25
0.10
0.25
0.40
0°
0.17
0.31
5°
5°
MILLIMETERS
NOM
8
1.27 BSC
6.00 BSC
3.90 BSC
4.90 BSC
1.04 REF
-
MAX
1.75
0.25
0.50
1.27
8°
0.25
0.51
15°
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.15mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
5. Datums A & B to be determined at Datum H.
Microchip Technology Drawing No. C04-057-OA Rev F Sheet 2 of 2
2019-2021 Microchip Technology Inc.
DS20006191D-page 17
ATA663211
8-Lead Plastic Small Outline (OA) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
SILK SCREEN
C
Y1
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
Contact Pitch
Contact Pad Spacing
C
Contact Pad Width (X8)
X1
Contact Pad Length (X8)
Y1
MIN
MILLIMETERS
NOM
1.27 BSC
5.40
MAX
0.60
1.55
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-2057-OA Rev F
DS20006191D-page 18
2019-2021 Microchip Technology Inc.
ATA663211
8-Lead Very Thin Plastic Dual Flat, No Lead Package (Q8B) - 3x3 mm Body [VDFN]
With 2.40x1.60 mm Exposed Pad and Stepped Wettable Flanks; Atmel Legacy YCL
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
N
(DATUM A)
(DATUM B)
E
NOTE 1
2X
0.10 C
1
2
2X
TOP VIEW
0.10 C
0.10 C
C
A
A1
SEATING
PLANE
8X
0.08 C
SIDE VIEW
(A3)
0.10
C A B
D2
1
A
2
NOTE 1
0.10
A
C A B
E2
K
N
L
8X b
e
BOTTOM VIEW
0.10
0.05
C A B
C
Microchip Technology Drawing C04-21358 Rev C Sheet 1 of 2
2019-2021 Microchip Technology Inc.
DS20006191D-page 19
ATA663211
8-Lead Very Thin Plastic Dual Flat, No Lead Package (Q8B) - 3x3 mm Body [VDFN]
With 2.40x1.60 mm Exposed Pad and Stepped Wettable Flanks; Atmel Legacy YCL
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
A4
PARTIALLY
PLATED
E3
SECTION A–A
Units
Dimension Limits
Number of Terminals
N
e
Pitch
Overall Height
A
Standoff
A1
Terminal Thickness
A3
Overall Length
D
Exposed Pad Length
D2
E
Overall Width
Exposed Pad Width
E2
b
Terminal Width
L
Terminal Length
K
Terminal-to-Exposed-Pad
Wettable Flank Step Cut Depth
A4
E3
Wettable Flank Step Cut Width
MIN
0.80
0.00
2.30
1.50
0.25
0.35
0.20
0.10
-
MILLIMETERS
NOM
MAX
8
0.65 BSC
0.90
1.00
0.035
0.05
0.203 REF
3.00 BSC
2.40
2.50
3.00 BSC
1.60
1.70
0.30
0.35
0.40
0.45
0.19
0.085
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-21358 Rev C Sheet 2 of 2
DS20006191D-page 20
2019-2021 Microchip Technology Inc.
ATA663211
8-Lead Very Thin Plastic Dual Flat, No Lead Package (Q8B) - 3x3 mm Body [VDFN]
With 2.40x1.60 mm Exposed Pad and Stepped Wettable Flanks
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Y2
EV
8
ØV
C X2
EV
CH
G1
Y1
1
2
SILK SCREEN
X1
G2
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
Contact Pitch
E
X2
Optional Center Pad Width
Optional Center Pad Length
Y2
Contact Pad Spacing
C
Contact Pad Width (X8)
X1
Contact Pad Length (X8)
Y1
Contact Pad to Center Pad (X8)
G1
Contact Pad to Contact Pad (X6)
G2
Pin 1 Index Chamfer
CH
Thermal Via Diameter
V
Thermal Via Pitch
EV
MIN
MILLIMETERS
NOM
0.65 BSC
MAX
1.70
2.50
3.00
0.35
0.80
0.20
0.20
0.20
0.33
1.20
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing C04-23358 Rev C
2019-2021 Microchip Technology Inc.
DS20006191D-page 21
ATA663211
NOTES:
DS20006191D-page 22
2019-2021 Microchip Technology Inc.
ATA663211
APPENDIX A:
REVISION HISTORY
Revision D (June 2021)
The following is the list of modifications:
• The current LIN standards use the terminology
"Master" and "Slave”. The LIN standard groups
have decided that the terms "Commander" and
"Responder" will be used in future.
• Updated the VDFN8 package drawing.
• Minor text updates.
Revision C (July 2020)
• Parameter 13.1 in chapter 2.0 “Electrical
Characteristics” updated
• Updated the marking information for the SOIC
package in the “Package Marking Information”
section
Revision B (April 2020)
• “Package Marking Information” updated
• Minor editorial changes
Revision A (April 2019)
• Original release of this document
• Minor text updates
• This document replaces
Atmel – 9359D-AUTO-10/16
2019-2021 Microchip Technology Inc.
DS20006191D-page 23
ATA663211
NOTES:
DS20006191D-page 24
2019-2021 Microchip Technology Inc.
ATA663211
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
–
[X](1)
XX
[X]
Package Tape and Reel Package Directives
Classification
Option
Device:
Examples:
a) ATA663211-GAQW
b) ATA663211-GBQW
ATA663211
Note
Package:
GA
GB
=
=
Tape and Reel
Option:
Q
= 330 mm diameter Tape and Reel(1)
Package Directives W
Classification:
1:
Tape and Reel identifier only appears in the catalog
part number description. This identifier is used for
ordering purposes and is not printed on the device
package. Check with your Microchip Sales Office
for package availability with the Tape and Reel
option.
2:
RoHS compliant; maximum concentration value of
0.09% (900 ppm) for Bromine (Br) and Chlorine
(Cl) and less than 0.15% (1500 ppm) total Bromine
(Br) and Chlorine (Cl) in any homogeneous
material. Maximum concentration value of 0.09%
(900 ppm) for Antimony (Sb) in any homogeneous
material.
8-Lead SOIC
8-Lead VDFN
= Package according to RoHS(1)
2019-2021 Microchip Technology Inc.
8-Lead SOIC,
Tape and Reel package according
to RoHS
8-Lead VDFN,
Tape and Reel package according
to RoHS
DS20006191D-page 25
ATA663211
NOTES:
DS20006191D-page 26
2019-2021 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specifications contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is secure when used in the intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods being used in attempts to breach the code protection features of the Microchip
devices. We believe that these methods require using the Microchip products in a manner outside the operating specifications
contained in Microchip's Data Sheets. Attempts to breach these code protection features, most likely, cannot be accomplished
without violating Microchip's intellectual property rights.
•
Microchip is willing to work with any customer who is concerned about the integrity of its code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not
mean that we are guaranteeing the product is "unbreakable." Code protection is constantly evolving. We at Microchip are
committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection
feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or
other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication is provided for the sole
purpose of designing with and using Microchip products. Information regarding device applications and the like is provided
only for your convenience and may be superseded by updates.
It is your responsibility to ensure that your application meets
with your specifications.
THIS INFORMATION IS PROVIDED BY MICROCHIP "AS IS".
MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION INCLUDING BUT NOT
LIMITED TO ANY IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A
PARTICULAR PURPOSE OR WARRANTIES RELATED TO
ITS CONDITION, QUALITY, OR PERFORMANCE.
IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
WHATSOEVER RELATED TO THE INFORMATION OR ITS
USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES
ARE FORESEEABLE. TO THE FULLEST EXTENT
ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON
ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION
OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF
ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP
FOR THE INFORMATION. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and
the buyer agrees to defend, indemnify and hold harmless
Microchip from any and all damages, claims, suits, or expenses
resulting from such use. No licenses are conveyed, implicitly or
otherwise, under any Microchip intellectual property rights
unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, Adaptec,
AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT,
chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex,
flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck,
LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi,
Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer,
PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire,
Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST,
SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,
TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A. and
other countries.
AgileSwitch, APT, ClockWorks, The Embedded Control Solutions
Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight
Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3,
Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, QuietWire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub,
TimePictra, TimeProvider, WinPath, and ZL are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, Augmented Switching, BlueSky,
BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive,
CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net,
Dynamic Average Matching, DAM, ECAN, Espresso T1S,
EtherGREEN, IdealBridge, In-Circuit Serial Programming, ICSP,
INICnet, Intelligent Paralleling, Inter-Chip Connectivity,
JitterBlocker, maxCrypto, maxView, memBrain, Mindi, MiWi,
MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK,
NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net,
PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE,
Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O,
simpleMAP, SimpliPHY, SmartBuffer, SMART-I.S., storClad, SQI,
SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total
Endurance, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY,
ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks
of Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage
Technology, and Symmcom are registered trademarks of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany
II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2019-2021, Microchip Technology Incorporated, All Rights
Reserved.
For information regarding Microchip’s Quality Management Systems,
please visit www.microchip.com/quality.
2019-2021 Microchip Technology Inc.
ISBN: 978-1-5224-8328-1
DS20006191D-page 27
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
Australia - Sydney
Tel: 61-2-9868-6733
India - Bangalore
Tel: 91-80-3090-4444
China - Beijing
Tel: 86-10-8569-7000
India - New Delhi
Tel: 91-11-4160-8631
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
China - Chengdu
Tel: 86-28-8665-5511
India - Pune
Tel: 91-20-4121-0141
Denmark - Copenhagen
Tel: 45-4485-5910
Fax: 45-4485-2829
China - Chongqing
Tel: 86-23-8980-9588
Japan - Osaka
Tel: 81-6-6152-7160
Finland - Espoo
Tel: 358-9-4520-820
China - Dongguan
Tel: 86-769-8702-9880
Japan - Tokyo
Tel: 81-3-6880- 3770
China - Guangzhou
Tel: 86-20-8755-8029
Korea - Daegu
Tel: 82-53-744-4301
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Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
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Tel: 86-571-8792-8115
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Tel: 82-2-554-7200
China - Hong Kong SAR
Tel: 852-2943-5100
Malaysia - Kuala Lumpur
Tel: 60-3-7651-7906
China - Nanjing
Tel: 86-25-8473-2460
Malaysia - Penang
Tel: 60-4-227-8870
China - Qingdao
Tel: 86-532-8502-7355
Philippines - Manila
Tel: 63-2-634-9065
China - Shanghai
Tel: 86-21-3326-8000
Singapore
Tel: 65-6334-8870
China - Shenyang
Tel: 86-24-2334-2829
Taiwan - Hsin Chu
Tel: 886-3-577-8366
China - Shenzhen
Tel: 86-755-8864-2200
Taiwan - Kaohsiung
Tel: 886-7-213-7830
Israel - Ra’anana
Tel: 972-9-744-7705
China - Suzhou
Tel: 86-186-6233-1526
Taiwan - Taipei
Tel: 886-2-2508-8600
China - Wuhan
Tel: 86-27-5980-5300
Thailand - Bangkok
Tel: 66-2-694-1351
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
China - Xian
Tel: 86-29-8833-7252
Vietnam - Ho Chi Minh
Tel: 84-28-5448-2100
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Austin, TX
Tel: 512-257-3370
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Novi, MI
Tel: 248-848-4000
Houston, TX
Tel: 281-894-5983
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Tel: 317-536-2380
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Tel: 951-273-7800
Raleigh, NC
Tel: 919-844-7510
New York, NY
Tel: 631-435-6000
San Jose, CA
Tel: 408-735-9110
Tel: 408-436-4270
Canada - Toronto
Tel: 905-695-1980
Fax: 905-695-2078
DS20006191D-page 28
China - Xiamen
Tel: 86-592-2388138
China - Zhuhai
Tel: 86-756-3210040
Germany - Garching
Tel: 49-8931-9700
Germany - Haan
Tel: 49-2129-3766400
Germany - Heilbronn
Tel: 49-7131-72400
Germany - Karlsruhe
Tel: 49-721-625370
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Germany - Rosenheim
Tel: 49-8031-354-560
Italy - Padova
Tel: 39-049-7625286
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Norway - Trondheim
Tel: 47-7288-4388
Poland - Warsaw
Tel: 48-22-3325737
Romania - Bucharest
Tel: 40-21-407-87-50
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Sweden - Gothenberg
Tel: 46-31-704-60-40
Sweden - Stockholm
Tel: 46-8-5090-4654
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
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02/28/20
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