This is a summary document. A
complete document is available on
our Web site at www.microchip.com
ATmega324PB Summary
AVR Microcontroller with Core Independent Peripherals
and PicoPower technology
Introduction
®
The picoPower ATmega324PB is a low-power CMOS 8-bit microcontroller based on the AVR® enhanced
RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega324PB achieves
throughputs close to 1MIPS per MHz. This empowers system designers to optimize the device for power
consumption versus processing speed.
Feature
High Performance, Low Power AVR® 8-Bit Microcontroller Family
•
Advanced RISC Architecture
– 131 Powerful Instructions
– Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20MHz
– On-Chip 2-cycle Multiplier
•
High Endurance Non-Volatile Memory Segments
– 32KBytes of In-System Self-Programmable Flash Program Memory
– 1KBytes EEPROM
– 2KBytes Internal SRAM
– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
– Data Retention: 20 Years at 85°C
– Optional Boot Code Section with Independent Lock Bits
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
– Programming Lock for Software Security
•
JTAG (IEEE std. 1149.1 Compliant) Interface
– Boundary-Scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits Through the JTAG Interface
•
Peripheral Features
– Peripheral Touch Controller (PTC)
• Capacitive Touch Buttons, Sliders and Wheels
• 32 Self-Sap Channels and 256 Mutual Cap Channels
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
© 2017 Microchip Technology Inc.
Datasheet Summary
DS-40001928A-page 1
ATmega324PB Summary
–
–
–
–
–
–
–
•
•
•
•
•
•
Three 16-bit Timer/Counters with Separate Prescaler, Compare Mode, and Capture Mode
Real Time Counter with Separate Oscillator
Ten PWM Channels
8-Channel 10-Bit ADC
• Differential Mode with Selectable Gain at 1×, 10× or 200×
Three Programmable Serial USARTs
Two Master/Slave SPI Serial Interfaces
Two Byte-oriented 2-wire Serial Interfaces (Philips I2C Compatible)
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal 8 MHz Calibrated Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended
Standby
– Clock Failure Detection Mechanism and Switch to Internal 8 MHz RC Oscillator in case of Failure
– Individual Serial Number to Represent a Unique ID
I/O and Packages
– 39 Programmable I/O Lines
– 44-Pin TQFP and 44-Pin QFN /MLF
Operating Voltage:
– 1.8 - 5.5V
Temperature Range:
– -40°C to 105°C
Speed Grade:
– 0 - 4MHz @ 1.8 - 5.5V
– 0 - 10MHz @ 2.7 - 5.5.V
– 0 - 20MHz @ 4.5 - 5.5V
Power Consumption at 1MHz, 1.8V, 25°C
– Active Mode: 0.24mA
– Power-Down Mode: 0.2μA
– Power-Save Mode: 1.3μA (Including 32kHz RTC)
© 2017 Microchip Technology Inc.
Datasheet Summary
DS-40001928A-page 2
Table of Contents
Introduction......................................................................................................................1
Feature............................................................................................................................ 1
1. Description.................................................................................................................4
2. Configuration Summary.............................................................................................5
3. Ordering Information .................................................................................................6
4. Block Diagram........................................................................................................... 7
5. Pin Configurations..................................................................................................... 8
5.1.
Pin Descriptions........................................................................................................................... 8
6. I/O Multiplexing........................................................................................................10
7. General Information.................................................................................................12
7.1.
7.2.
7.3.
Resources.................................................................................................................................. 12
About Code Examples................................................................................................................12
Capacitive Touch Sensing.......................................................................................................... 12
8. Packaging Information.............................................................................................13
8.1.
8.2.
44-pin TQFP...............................................................................................................................13
44-pin VQFN.............................................................................................................................. 14
The Microchip Web Site................................................................................................ 15
Customer Change Notification Service..........................................................................15
Customer Support......................................................................................................... 15
Microchip Devices Code Protection Feature................................................................. 15
Legal Notice...................................................................................................................16
Trademarks................................................................................................................... 16
Quality Management System Certified by DNV.............................................................17
Worldwide Sales and Service........................................................................................18
© 2017 Microchip Technology Inc.
Datasheet Summary
DS-40001928A-page 3
ATmega324PB Summary
1.
Description
The ATmega324PB is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the ATmega324PB achieves
throughputs close to 1MIPS per MHz. This empowers system designers to optimize the device for power
consumption versus processing speed.
The AVR® core combines a rich instruction set with 32 general purpose working registers. All the 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to
be accessed in a single instruction executed in one clock cycle. The resulting architecture is more code
efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The ATmega324PB provides the following features: 32K bytes of In-System Programmable Flash with
Read-While-Write capabilities, 1Kbytes EEPROM, 2Kbytes SRAM, 39 general purpose I/O lines, 32
general purpose working registers, five flexible Timer/Counters with compare modes, internal and
external interrupts, three serial programmable USART, two byte-oriented 2-wire Serial Interface (I2C), two
SPI serial port, a 8-channel 10-bit ADC with optional differential input stage with programmable gain, a
programmable Watchdog Timer with internal Oscillator, IEEE std. 1149.1 compliant JTAG test interface,
also used for accessing the On-chip Debug system and programming, Clock failure detection mechanism
and six software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM,
Timer/Counters, USART, 2-wire Serial Interface, SPI port, and interrupt system to continue functioning.
PTC with enabling up to 32 self-cap and 256 mutual-cap sensors. The Power-down mode saves the
register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or
hardware reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to
maintain a timer base while the rest of the device is sleeping. Also ability to run PTC in power-save mode/
wake-up on touch and Dynamic on/off of PTC analog and digital portion. The ADC Noise Reduction mode
stops the CPU and all I/O modules except asynchronous timer, PTC, and ADC to minimize switching
noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest
of the device is sleeping. This allows very fast start-up combined with low power consumption.
The device is manufactured using high density non-volatile memory technology. The On-chip ISP Flash
allows the program memory to be reprogrammed In-System through an SPI serial interface, by a
conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core.
The Boot program can use any interface to download the application program in the Application Flash
memory. Software in the Boot Flash section will continue to run while the Application Flash section is
updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System
Self-Programmable Flash on a monolithic chip, the ATmega324PB is a powerful microcontroller that
provides a highly flexible and cost effective solution to many embedded control applications.
The ATmega324PB is supported with a full suite of program and system development tools including: C
Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits.
© 2017 Microchip Technology Inc.
Datasheet Summary
DS-40001928A-page 4
ATmega324PB Summary
2.
Configuration Summary
Features
ATmega324PB
Pin count
44
Flash (KB)
32
SRAM (KB)
2
EEPROM (KB)
1
General Purpose I/O lines
39
SPI
2
TWI (I2C)
2
USART
3
ADC
10-bit 15ksps
Differential ADC mode
Available
ADC channels
8
AC
1
8-bit Timer/Counters
2
16-bit Timer/Counters
3
PWM channels
10
PTC
Available
Peripheral Touch Controller (PTC) channels (X- x Y-Lines) for mutual capacitance
256 (16 x 16)
Peripheral Touch Controller (PTC) channels for self capacitance (Y-Lines only)
32
Clock Failure Detector (CFD)
Available
Output Compare Modulator (OCM1C2)
Available
© 2017 Microchip Technology Inc.
Datasheet Summary
DS-40001928A-page 5
ATmega324PB Summary
3.
Ordering Information
Speed [MHz]
Power Supply [V]
20
1.8 - 5.5
Ordering Code(2)
Package(1)
ATmega324PB-AU
ATmega324PB-AUR(3)
ATmega324PB-MU
ATmega324PB-MUR(3)
44A
44A
44M1
44M1
ATmega324PB-AN
ATmega324PB-ANR(3)
ATmega324PB-MN
ATmega324PB-MNR(3)
44A
44A
44M1
44M1
Operational Range
Industrial
(-40°C to 85°C)
Industrial
(-40°C to 105°C)
Note: 1. This device can also be supplied in wafer form. Contact your local sales office for detailed
ordering information and minimum quantities.
2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS
directive). Also Halide free and fully Green.
3. Tape & Reel.
Package Type
44A
44-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)
44M1 44-pad, 7 x 7 x 0.9mm body, Lead Pitch 0.50mm, Very-thin Fine pitch, Quad Flat No Lead Package/Quad
Flat No-Lead/Micro Lead Frame Package (VQFN/QFN/MLF)
© 2017 Microchip Technology Inc.
Datasheet Summary
DS-40001928A-page 6
ATmega324PB Summary
4.
Block Diagram
Figure 4-1. Block Diagram
SRAM
TCK
TMS
TDI
TDO
JTAG
CPU
OCD
Clock generation
TOSC1
32.768kHz
XOSC
TOSC2
XTAL1
XTAL2
16MHz LP
XOSC
8MHz
Calib RC
128kHz int
osc
External
clock
Crystal failure detection
VCC
RESET
GND
Power
Supervision
POR/BOD &
RESET
NVM
programming
Power
management
and clock
control
Watchdog
Timer
ADC[7:0]
AREF
ADC
X[15:0]
Y[31:0]
PTC
PCINT[38:0]
INT[2:0]
OC1A/B
T1
ICP1
OC2A
OC2B
OC3A/B
T3
ICP3
OC4A/B
T4
ICP4
© 2017 Microchip Technology Inc.
FLASH
D
A
T
A
B
U
S
EEPROM
EEPROMIF
I/O
PORTS
I
N
/
O
U
T
GPIOR[2:0]
D
A
T
A
B
U
S
TC 0
(8-bit)
SPI 0
AC
Internal
Reference
USART 0
RxD0
TxD0
XCK0
EXTINT
USART 1
RxD1
TxD1
XCK1
TC 1
USART 2
RxD2
TxD2
XCK2
TC 2
TWI 0
SDA0
SCL0
TC 3
TWI 1
SDA1
SCL1
TC 4
SPI 1
MISO1
MOSI1
SCK1
SS1
(16-bit)
(8-bit async)
PA[7:0]
PB[7:0]
PC[7:0]
PD[7:0]
PE[6:0]
T0
OC0A
OC0B
MISO0
MOSI0
SCK0
SS0
AIN0
AIN1
ACO
ADCMUX
(16-bit)
(16-bit)
Datasheet Summary
DS-40001928A-page 7
ATmega324PB Summary
5.
Pin Configurations
PB1 (PTCY/T1/CLKO)
PB0 (PTCY/T0/XCK0)
PE6 (SCL1)
PE5 (SDA1)
PA0 (ADC0/PTCY)
PA1 (ADC1/PTCY)
PA2 (ADC2/PTCY)
PA3 (ADC3/PTCY)
41
40
39
38
37
36
35
34
Crystal/Osc
PB2 (AIN0/PTCY/INT2)
Analog
42
Digital
PB3 (AIN1/PTCY/OC0A)
Programming/debug
43
Ground
PB4 (PTCY/OC0B/SS0)
Power
44
Figure 5-1. Pinout ATmega324PB
(MOSI0/ICP3/PTCY) PB5
1
33
PA4 (ADC4/PTCY)
(MISO0/OC3A/PTCY) PB6
2
32
PA5 (ADC5/PTCY)
(SCK0/OC3B/OC4B/PTCY) PB7
3
31
PA6 (ADC6/PTCY)
RESET
4
30
PA7 (ADC7/PTCY)
11
23
PC4 (PTCXY/OC4A/TDO)
5.1
Pin Descriptions
5.1.1
VCC
Digital supply voltage.
5.1.2
GND
Ground.
© 2017 Microchip Technology Inc.
22
(RXD1/INT0/PTCXY) PD2
(TMS/ICP4/PTCXY) PC3
PC5 (PTCXY/ACO/TDI)
21
24
(TCK/T4/PTCXY) PC2
10
20
(TXD0/PTCXY) PD1
(SDA0/PTCXY) PC1
PC6 (TOSC1)
19
25
(SCL0/PTCXY) PC0
9
18
(RXD0/T3/PTCXY) PD0
(MOSI1/TXD2/PTCXY) PE3
PC7 (TOSC2)
17
26
16
8
(MISO1/RXD2/PTCXY) PE2
(XTAL1) PE1
(SCK1/XCK2/OC2A/PTCXY) PD7
AVCC
15
27
(SS1/ICP1/OC2B/PTCXY) PD6
7
14
(XTAL2) PE0
(OC1A/PTCXY) PD5
GND
13
PE4 (AREF)
28
(XCK1/OC1B/PTCXY) PD4
29
6
12
5
(TXD1/INT1/PTCXY) PD3
VCC
GND
Datasheet Summary
DS-40001928A-page 8
ATmega324PB Summary
5.1.3
Port A (PA[7:0])
This port serves as analog inputs to the Analog-to-digital Converter.
This is an 8-bit, bi-directional I/O port with internal pull-up resistors, individually selectable for each pin.
The output buffers have symmetrical drive characteristics, with both high sink and source capability. As
inputs, the port pins that are externally pulled low will source current if pull-up resistors are activated. Port
pins are tri-stated during a reset condition, even if the clock is not running.
5.1.4
Port B (PB[7:0])
This is an 8-bit, bi-directional I/O port with internal pull-up resistors, individually selectable for each pin.
The output buffers have symmetrical drive characteristics, with both high sink and source capability. As
inputs, the port pins that are externally pulled low will source current if pull-up resistors are activated. Port
pins are tri-stated during a reset condition, even if the clock is not running.
This port also serves the functions of various special features.
5.1.5
Port C (PC[7:0])
This is an 8-bit, bi-directional I/O port with internal pull-up resistors, individually selectable for each pin.
The output buffers have symmetrical drive characteristics, with both high sink and source capability. As
inputs, the port pins that are externally pulled low will source current if pull-up resistors are activated. Port
pins are tri-stated during a reset condition, even if the clock is not running.
This port also serves the functions of the JTAG interface, along with special features.
5.1.6
Port D (PD[7:0])
This is an 8-bit, bi-directional I/O port with internal pull-up resistors, individually selectable for each pin.
The output buffers have symmetrical drive characteristics, with both high sink and source capability. As
inputs, the port pins that are externally pulled low will source current if pull-up resistors are activated. Port
pins are tri-stated during a reset condition, even if the clock is not running.
This port also serves the functions of various special features.
5.1.7
Port E (PE6:0) XTAL1/XTAL2/AREF
This is a 7-bit bi-directional GPIO port with internal pull-up resistors (selected for each pin). The Port E
output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs,
Port E pins that are externally pulled low will source current if the pull-up resistors are activated. Port pins
are tri-stated during a reset condition, even if the clock is not running. PE0 and PE1 are multiplexed with
XTAL1 and XTAL2 input. PE4 is multiplexed with AREF for the A/D Converter.
5.1.8
RESET
Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if
the clock is not running. Shorter pulses are not guaranteed to generate a reset.
5.1.9
AVCC
AVCC is the supply voltage pin for Port A, PE4 (AREF) and the Analog-to-digital Converter. It should be
externally connected to VCC, even if the ADC is not used. If the ADC is used, it should be connected to
VCC through a low-pass filter.
© 2017 Microchip Technology Inc.
Datasheet Summary
DS-40001928A-page 9
ATmega324PB Summary
6.
I/O Multiplexing
Each pin is by default controlled by the PORT as a general purpose I/O and alternatively it can be
assigned to one of the peripheral functions.
The following table describes the peripheral signals multiplexed to the PORT I/O pins.
Table 6-1. PORT Function Multiplexing
No.
PAD
EXTINT
PCINT
ADC/AC
1
PB[5]
PCINT13
Y29
ICP3
MOSI0
2
PB[6]
PCINT14
Y30
OC3A
MISO0
3
PB[7]
PCINT15
Y31
OC3B
4
RESET
5
VCC
6
GND
7
PE[0]
PCINT32
XTAL2
8
PE[1]
PCINT33
XTAL1
9
PD[0]
PCINT24
X0
Y8
10
PD[1]
PCINT25
X1
Y9
TxD0
11
PD[2]
INT0
PCINT26
X2
Y10
RxD1
12
PD[3]
INT1
PCINT27
X3
Y11
TXD1
13
PD[4]
PCINT28
X4
Y12
OC1B
14
PD[5]
PCINT29
X5
Y13
OC1A
15
PD[6]
PCINT30
X6
Y14
OC2B
16
PD[7]
PCINT31
X7
Y15
OC2A
17
PE[2]
X8
18
PE[3]
X9
19
PC[0]
PCINT16
X10
Y18
SCL0
20
PC[1]
PCINT17
X11
Y19
SDA0
21
PC[2]
PCINT18
X12
Y20
T4
TCK
22
PC[3]
PCINT19
X13
Y21
ICP4
TMS
23
PC[4]
PCINT20
X14
Y22
OC4A
TDO
24
PC[5]
PCINT21
X15
Y23
25
PC[6]
PCINT22
TOSC1
26
PC[7]
PCINT23
TOSC2
27
AVCC
28
GND
29
PE[4]
30
PA[7]
PCINT7
ADC7
Y7
31
PA[6]
PCINT6
ADC6
Y6
32
PA[5]
PCINT5
ADC5
Y5
33
PA[4]
PCINT4
ADC4
Y4
34
PA[3]
PCINT3
ADC3
Y3
ACO
PTC X
PTC Y
OSC
T/C # 0
T/C # 1
USART
I2C
OC4B
T3
SPI
JTAG
SCK0
RxD0
XCK1
ICP1
SS1
XCK2
SCK1
Y16
RxD2
MISO1
Y17
TxD2
MOSI1
TDI
AREF
© 2017 Microchip Technology Inc.
Datasheet Summary
DS-40001928A-page 10
ATmega324PB Summary
No.
PAD
35
EXTINT
PCINT
ADC/AC
PA[2]
PCINT2
ADC2
Y2
36
PA[1]
PCINT1
ADC1
Y1
37
PA[0]
PCINT0
ADC0
Y0
38
PE[5]
SDA1
39
PE[6]
SCL1
40
PB[0]
PCINT8
Y24
41
PB[1]
PCINT9
Y25
42
PB[2]
43
44
INT2
PTC X
PTC Y
OSC
T/C # 0
T0
CLKO
USART
I2C
SPI
JTAG
XCK0
T1
PCINT10
AIN0
Y26
PB[3]
PCINT11
AIN1
Y27
OC0A
PB[4]
PCINT12
Y28
OC0B
© 2017 Microchip Technology Inc.
T/C # 1
Datasheet Summary
SS0
DS-40001928A-page 11
ATmega324PB Summary
7.
General Information
7.1
Resources
A comprehensive set of development tools, application notes, and datasheets are available for download
on http://www.microchip.com/design-centers/8-bit/microchip-avr-mcus.
7.2
About Code Examples
This documentation contains simple code examples that briefly show how to use various parts of the
device. These code examples assume that the part specific header file is included before compilation. Be
aware that not all C compiler vendors include bit definitions in the header files and interrupt handling in C
is compiler dependent. Confer with the C compiler documentation for more details.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions
must be replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS”
combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
7.3
Capacitive Touch Sensing
7.3.1
QTouch Library
®
®
The QTouch Library provides a simple to use solution to realize touch sensitive interfaces on most AVR
®
microcontrollers. The QTouch Library includes support for the Touch and QMatrix acquisition methods.
Touch sensing can be added to any application by linking the appropriate QTouch Library for the AVR
Microcontroller. This is done by using a simple set of APIs to define the touch channels and sensors, and
then calling the touch sensing API’s to retrieve the channel information and determine the touch sensor
states.
The QTouch Library is FREE and down-loadable from QTouch Library . For implementation details and
other information, refer to the QTouch Library User Guide - also available for download from the website.
© 2017 Microchip Technology Inc.
Datasheet Summary
DS-40001928A-page 12
ATmega324PB Summary
8.
Packaging Information
8.1
44-pin TQFP
PIN 1 IDENTIFIER
PIN 1
e
B
E1
E
A1
A2
D1
D
C
0°~7°
L
A
COMMON DIMENSIONS
(Unit of Measure = mm)
Notes:
1. This package conforms to JEDEC reference MS-026, Variation ACB.
2. Dimensions D1 and E1 do not include mold protrusion. Allowable
protrusion is 0.25mm per side. Dimensions D1 and E1 are maximum
plastic body size dimensions including mold mismatch.
3. Lead coplanarity is 0.10mm maximum.
SYMBOL
MIN
NOM
MAX
A
–
–
1.20
A1
0.05
–
0.15
A2
0.95
1.00
1.05
D
11.75
12.00
12.25
D1
9.90
10.00
10.10
E
11.75
12.00
12.25
E1
9.90
10.00
10.10
B
0.30
0.37
0.45
C
0.09
(0.17)
0.20
L
0.45
0.60
0.75
e
NOTE
Note 2
Note 2
0.80 TYP
06/02/2014
44A, 44-lead, 10 x 10mm body size, 1.0mm body thickness,
0.8 mm lead pitch, thin profile plastic quad flat package (TQFP)
© 2017 Microchip Technology Inc.
Datasheet Summary
44A
DS-40001928A-page 13
C
ATmega324PB Summary
8.2
44-pin VQFN
D
Marked Pin# 1 ID
E
SEATING PLANE
A1
TOP VIEW
A3
A
K
L
Pin #1 Corner
D2
1
2
3
Option A
SIDE VIEW
Pin #1
Triangle
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
NOM
MAX
A
0.80
0.90
1.00
A1
–
0.02
0.05
E2
Option B
Pin #1
Chamfer
(C 0.30)
A3
b
K
Option C
b
e
Pin #1
Notch
(0.20 R)
BOTTOM VIEW
0.20 REF
0.18
0.23
0.30
D
6.90
7.00
7.10
D2
5.00
5.20
5.40
E
6.90
7.00
7.10
E2
5.00
5.20
5.40
e
Note: JEDEC Standard MO-220, Fig. 1 (SAW Singulation) VKKD-3.
NOTE
0.50 BSC
L
0.59
0.64
0.69
K
0.20
0.26
0.41
9/26/08
Package Drawing Contact:
avr@atmel.com
© 2017 Microchip Technology Inc.
TITLE
44M1,44-pad, 7 x 7 x 1.0mm body, lead
pitch 0.50mm, 5.20mm exposed pad, thermally
enhanced plastic very thin quad flat no
lead package (VQFN)
Datasheet Summary
GPC
ZWS
DRAWING NO.
REV.
44M1
H
DS-40001928A-page 14
ATmega324PB Summary
The Microchip Web Site
Microchip provides online support via our web site at http://www.microchip.com/. This web site is used as
a means to make files and information easily available to customers. Accessible by using your favorite
Internet browser, the web site contains the following information:
•
•
•
Product Support – Data sheets and errata, application notes and sample programs, design
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General Technical Support – Frequently Asked Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant program member listing
Business of Microchip – Product selector and ordering guides, latest Microchip press releases,
listing of seminars and events, listings of Microchip sales offices, distributors and factory
representatives
Customer Change Notification Service
Microchip’s customer notification service helps keep customers current on Microchip products.
Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata
related to a specified product family or development tool of interest.
To register, access the Microchip web site at http://www.microchip.com/. Under “Support”, click on
“Customer Change Notification” and follow the registration instructions.
Customer Support
Users of Microchip products can receive assistance through several channels:
•
•
•
•
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
Customers should contact their distributor, representative or Field Application Engineer (FAE) for support.
Local sales offices are also available to help customers. A listing of sales offices and locations is included
in the back of this document.
Technical support is available through the web site at: http://www.microchip.com/support
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices:
•
•
•
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the
market today, when used in the intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of
these methods, to our knowledge, require using the Microchip products in a manner outside the
operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is
engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
© 2017 Microchip Technology Inc.
Datasheet Summary
DS-40001928A-page 15
ATmega324PB Summary
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the
code protection features of our products. Attempts to break Microchip’s code protection feature may be a
violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software
or other copyrighted work, you may have a right to sue for relief under that Act.
Legal Notice
Information contained in this publication regarding device applications and the like is provided only for
your convenience and may be superseded by updates. It is your responsibility to ensure that your
application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY
OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS
CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life
support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend,
indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting
from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual
property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings,
BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo,
Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA,
SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight
Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom,
chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController,
dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient
Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL
ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are
trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their respective companies.
©
2017, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
© 2017 Microchip Technology Inc.
Datasheet Summary
DS-40001928A-page 16
ATmega324PB Summary
ISBN: 978-1-5224-1818-4
Quality Management System Certified by DNV
ISO/TS 16949
Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer
fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California
®
®
and India. The Company’s quality system processes and procedures are for its PIC MCUs and dsPIC
®
DSCs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design and manufacture of development
systems is ISO 9001:2000 certified.
© 2017 Microchip Technology Inc.
Datasheet Summary
DS-40001928A-page 17
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Datasheet Summary
DS-40001928A-page 18
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