8-bit AVR Microcontroller
ATmega16M1/32M1/64M1
DATASHEET SUMMARY
Introduction
®
The Atmel ATmega16M1/32M1/64M1 is a low-power CMOS 8-bit
microcontroller based on the AVR® enhanced RISC architecture. By
executing powerful instructions in a single clock cycle, the
ATmega16M1/32M1/64M1 achieves throughputs close to 1 MIPS per MHz.
This empowers system designer to optimize the device for power
consumption versus processing speed.
Features
•
•
•
This is a summary document. A
complete document is available
on our Web site at
www.atmel.com
•
•
•
•
®
High performance, low power 8-bit AVR microcontroller
Advanced RISC architecture
– 131 powerful instructions - most single clock cycle execution
– 32 × 8 general purpose working registers
– Fully static operation
– Up to 1 MIPS throughput per MHz
– On-chip 2-cycle multiplier
Data and non-volatile program memory
– 16/32/64KBytes flash of in-system programmable program
memory
– 512B/1K/2KBytes of in-system programmable EEPROM
– 1/2/4KBytes internal SRAM
– Write/erase cycles: 10,000 flash/ 100,000 EEPROM
– Data retention: 20 years at 85°C/ 100 years at 25°C (1)
– Optional boot code section with independent lock bits
• In-system programming by on-chip boot program
• True read-while-write operation
– Programming lock for flash program and EEPROM data security
On-chip debug interface (debugWIRE)
CAN 2.0A/B with six message objects - ISO 16845 certified
LIN 2.1 and 1.3 controller or 8-bit UART
One 12-bit high speed PSC (power stage controller)
– Non overlapping inverted PWM output pins with flexible deadtime
Atmel-8209F-ATmega16M1/32M1/64M1_Datasheet_Summary-10/2016
•
– Variable PWM duty cycle and frequency
– Synchronous update of all PWM registers
– Auto stop function for emergency event
Peripheral features
– One 8-bit general purpose timer/counter with separate prescaler, compare mode and capture
mode
– One 16-bit general purpose timer/counter with separate prescaler, compare mode and
capture mode
– One master/slave SPI serial interface
–
•
•
•
•
10-bit ADC
• Up to 11 single ended channels and three fully differential ADC channel pairs
• Programmable gain (5×, 10×, 20×, 40×) on differential channels
• Internal reference voltage
• Direct power supply voltage measurement
– 10-bit DAC for variable voltage reference (comparators, ADC)
– Four analog comparators with variable threshold detection
– 100μA ±2% current source (LIN node identification)
– Interrupt and wake-up on pin change
– Programmable watchdog timer with separate on-chip oscillator
– On-chip temperature sensor
Special microcontroller features
– Low power idle, noise reduction, and power down modes
– Power on reset and programmable brown-out detection
– In-system programmable via SPI port
– High precision crystal oscillator for CAN operations (16MHz)
– Internal calibrated RC oscillator (8MHz)
– On-chip PLL for fast PWM (32MHz, 64MHz) and CPU (16MHz)
Operating voltage: 2.7V - 5.5V
Extended operating temperature:
– -40°C to +85°C
Core speed grade:
– 0 - 8MHz @ 2.7 - 4.5V
– 0 - 16MHz @ 4.5 - 5.5V
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
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Table of Contents
Introduction......................................................................................................................1
Features.......................................................................................................................... 1
1. Pin configurations...................................................................................................... 4
1.1.
Pin descriptions............................................................................................................................ 5
2. Ordering Information .................................................................................................9
2.1.
2.2.
2.3.
ATmega16M1............................................................................................................................... 9
ATmega32M1............................................................................................................................... 9
ATmega64M1............................................................................................................................... 9
3. Overview..................................................................................................................10
3.1.
3.2.
Block diagram.............................................................................................................................10
Pin descriptions.......................................................................................................................... 11
4. Resources................................................................................................................13
5. About code examples.............................................................................................. 14
6. Data retention.......................................................................................................... 15
7. Packaging Information............................................................................................. 16
7.1.
7.2.
32-pin 32A.................................................................................................................................. 16
PV 32 QFN................................................................................................................................. 17
Pin configurations
P D0 (P CINT16/P S COUT0A)
P B7 (ADC4/P S COUT0B/S CK/P CINT7)
P B6 (ADC7/P S COUT1B/P CINT6)
P B5 (ADC6/INT2/ACMP N1/AMP 2-/P CINT5)
P C7 (D2A/AMP 2+/P CINT15)
P C0 (P CINT8/INT3/P S COUT1A)
P D1 (P CINT17/P S CIN0/CLKO)
32
31
30
29
28
27
26
25
P E0 (P CINT24/RES ET/OCD)
Figure 1-1. Atmel ATmega16M1/32M1/64M1 TQFP32/QFN32 (7mm × 7mm) package.
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
P B4 (AMP 0+/P CINT4)
P B3 (AMP 0-/P CINT3)
P C6 (ADC10/ACMP 1/P CINT14)
AREF(IS RC)
AGND
AVCC
P C5 (ADC9/ACMP 3/AMP 1+/P CINT13)
P C4 (ADC8/ACMP N3/AMP 1-/P CINT12)
9
10
11
12
13
14
15
16
(P CINT18/P S CIN2/OC1A/MIS O_A) P D2
(P CINT19/TXD/TXLIN/OC0A/S S /MOS I_A) P D3
(P CINT9/P S CIN1/OC1B/S S _A) P C1
VCC
GND
(P CINT10/T0/TXCAN) P C2
(P CINT11/T1/RXCAN/ICP 1B) P C3
(P CINT0/MIS O/P S COUT2A) P B0
(P CINT1/MOS I/P S COUT2B) P B1
(P CINT25/OC0B/XTAL1) P E1
(P CINT26/ADC0/XTAL2) P E2
(P CINT20/ADC1/RXD/RXLIN/ICP 1A/S CK_A) P D4
(ADC2/ACMP 2/P CINT21) P D5
(ADC3/ACMP N2/INT0/P CINT22) P D6
(ACMP 0/P CINT23) P D7
(ADC5/INT1/ACMP N0/P CINT2) P B2
1.
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
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1.1.
Pin descriptions
Table 1-1. Pinout description.
QFN32 pin
number
Mnemonic Type
Name, function, and alternate function
5
GND
Power Ground: 0V reference
20
AGND
Power Analog ground: 0V reference for analog part
4
VCC
Power Power supply
19
AVCC
Power Analog power supply: This is the power supply voltage for analog part
For a normal use this pin must be connected
21
AREF
Power Analog reference: reference for analog converter . This is the reference
voltage of the A/D converter. As output, can be used by external analog
ISRC (Current Source Output)
8
PB0
I/O
MISO (SPI Master In Slave Out)
PSCOUT2A (1) (PSC Module 2 Output A)
PCINT0 (Pin Change Interrupt 0)
9
PB1
I/O
MOSI (SPI Master Out Slave In)
PSCOUT2B (1) (PSC Module 2 Output B)
PCINT1 (Pin Change Interrupt 1)
16
PB2
I/O
ADC5 (Analog Input Channel 5)
INT1 (External Interrupt 1 Input)
ACMPN0 (Analog Comparator 0 Negative Input)
PCINT2 (Pin Change Interrupt 2)
23
PB3
I/O
AMP0- (Analog Differential Amplifier 0 Negative Input)
PCINT3 (Pin Change Interrupt 3)
24
PB4
I/O
AMP0+ (Analog Differential Amplifier 0 Positive Input)
PCINT4 (Pin Change Interrupt 4)
26
PB5
I/O
ADC6 (Analog Input Channel 6)
INT2 (External Interrupt 2 Input)
ACMPN1 (Analog Comparator 1 Negative Input)
AMP2- (Analog Differential Amplifier 2 Negative Input)
PCINT5 (Pin Change Interrupt 5)
27
PB6
I/O
ADC7 (Analog Input Channel 7)
PSCOUT1B (1) (PSC Module 1 Output A)
PCINT6 (Pin Change Interrupt 6)
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
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QFN32 pin
number
Mnemonic Type
Name, function, and alternate function
28
PB7
ADC4 (Analog Input Channel 4)
PSCOUT0B (1) (PSC Module 0 Output B)
I/O
SCK (SPI Clock)
PCINT7 (Pin Change Interrupt 7)
30
PC0
I/O
PSCOUT1A (1) (PSC Module 1 Output A)
INT3 (External Interrupt 3 Input)
PCINT8 (Pin Change Interrupt 8)
3
PC1
I/O
PSCIN1 (PSC Digital Input 1)
OC1B (Timer 1 Output Compare B)
SS_A (Alternate SPI Slave Select)
PCINT9 (Pin Change Interrupt 9)
6
PC2
I/O
T0 (Timer 0 clock input)
TXCAN (CAN Transmit Output)
PCINT10 (Pin Change Interrupt 10)
7
PC3
I/O
T1 (Timer 1 clock input)
RXCAN (CAN Receive Input)
ICP1B (Timer 1 input capture alternate B input)
PCINT11 (Pin Change Interrupt 11)
17
PC4
I/O
ADC8 (Analog Input Channel 8)
AMP1- (Analog Differential Amplifier 1 Negative Input)
ACMPN3 (Analog Comparator 3 Negative Input )
PCINT12 (Pin Change Interrupt 12)
18
PC5
I/O
ADC9 (Analog Input Channel 9)
AMP1+ (Analog Differential Amplifier 1 Positive Input)
ACMP3 (Analog Comparator 3 Positive Input)
PCINT13 (Pin Change Interrupt 13)
22
PC6
I/O
ADC10 (Analog Input Channel 10)
ACMP1 (Analog Comparator 1 Positive Input)
PCINT14 (Pin Change Interrupt 14)
25
PC7
I/O
D2A (DAC output)
AMP2+ (Analog Differential Amplifier 2 Positive Input)
PCINT15 (Pin Change Interrupt 15)
29
PD0
I/O
PSCOUT0A (1) (PSC Module 0 Output A)
PCINT16 (Pin Change Interrupt 16)
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
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QFN32 pin
number
Mnemonic Type
Name, function, and alternate function
32
PD1
PSCIN0 (PSC Digital Input 0)
CLKO (System Clock Output)
I/O
PCINT17 (Pin Change Interrupt 17)
1
PD2
I/O
OC1A (Timer 1 Output Compare A)
PSCIN2 (PSC Digital Input 2)
MISO_A (Programming & alternate SPI Master In Slave Out)
PCINT18 (Pin Change Interrupt 18)
2
PD3
I/O
TXD (UART Tx data)
TXLIN (LIN Transmit Output)
OC0A (Timer 0 Output Compare A)
SS (SPI Slave Select)
MOSI_A (Programming & alternate Master Out SPI Slave In)
PCINT19 (Pin Change Interrupt 19)
12
PD4
I/O
ADC1 (Analog Input Channel 1)
RXD (UART Rx data)
RXLIN (LIN Receive Input)
ICP1A (Timer 1 input capture alternate A input)
SCK_A (Programming & alternate SPI Clock)
PCINT20 (Pin Change Interrupt 20)
13
PD5
I/O
ADC2 (Analog Input Channel 2)
ACMP2 (Analog Comparator 2 Positive Input)
PCINT21 (Pin Change Interrupt 21)
14
PD6
I/O
ADC3 (Analog Input Channel 3)
ACMPN2 (Analog Comparator 2 Negative Input)
INT0 (External Interrupt 0 Input)
PCINT22 (Pin Change Interrupt 22)
15
PD7
I/O
ACMP0 (Analog Comparator 0 Positive Input)
PCINT23 (Pin Change Interrupt 23)
31
PE0
I/O or I RESET (Reset Input)
OCD (On Chip Debug I/O)
PCINT24 (Pin Change Interrupt 24)
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
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QFN32 pin
number
Mnemonic Type
Name, function, and alternate function
10
PE1
XTAL1 (XTAL Input)
OC0B (Timer 0 Output Compare B)
I/O
PCINT25 (Pin Change Interrupt 25)
11
PE2
I/O
XTAL2 (XTAL Output)
ADC0 (Analog Input Channel 0)
PCINT26 (Pin Change Interrupt 26)
1.
2.
Note: Only for Atmel Atmega32M1/64M1.
Note: On the engineering samples, the ACMPN3 alternate function is not located on PC4. It is
located on PE2.
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
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2.
Ordering Information
2.1.
ATmega16M1
Speed [MHz]
Power Supply [V]
Ordering Code
Package
Operational Range
16
2.7 - 5.5
ATmega16M1-AU
ATmega16M1-MU
32A
PV
Industrial
(-40°C to 85°C)
Note: All packages are Pb free, fully LHF.
Package Type
32A
32-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)
PV
PV, 32-lead, 7.0mm × 7.0mm body, 0.65mm pitch quad flat no lead package (QFN)
2.2.
ATmega32M1
Speed [MHz]
Power Supply [V]
Ordering Code
Package
Operational Range
16
2.7 - 5.5
ATmega32M1-AU
ATmega32M1-MU
32A
PV
Industrial
(-40°C to 85°C)
Note: All packages are Pb free, fully LHF.
Package Type
32A
32-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)
PV
PV, 32-lead, 7.0mm × 7.0mm body, 0.65mm pitch quad flat no lead package (QFN)
2.3.
ATmega64M1
Speed [MHz]
Power Supply [V]
Ordering Code
Package
Operational Range
16
2.7 - 5.5
ATmega64M1-AU
ATmega64M1-MU
32A
PV
Industrial
(-40°C to 85°C)
Note: All packages are Pb free, fully LHF.
Package Type
32A
32-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)
PV
PV, 32-lead, 7.0mm × 7.0mm body, 0.65mm pitch quad flat no lead package (QFN)
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
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3.
Overview
The Atmel ATmega16M1/32M1/64M1 is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the
ATmega16M1/32M1/64M1 achieves throughputs approaching 1 MIPS per MHz allowing the system
designer to optimize power consumption versus processing speed.
Block diagram
Figure 3-1. Block diagram.
Data bus 8-bit
Flash program
memory
Program
counter
Status
and control
Interrupt
unit
SPI
unit
32 x 8
general
purpose
registrers
Instruction
register
Indire ct a ddre s s ing
Control lines
Watchdog
timer
Four analog
comparators
Instruction
decoder
Dire ct a ddre s s ing
3.1.
ALU
HW LIN/UART
Timer 0
Timer 1
Data
SRAM
ADC
EEPROM
DAC
I/O lines
MPSC
Current source
CAN
The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to
be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code
efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The Atmel ATmega16M1/32M1/64M1 provides the following features: 16/32/64Kbytes of In-System
Programmable Flash with Read-While-Write capabilities, 512B/1K/2Kbytes EEPROM, 1/2/4Kbytes
SRAM, 27 general purpose I/O lines, 32 general purpose working registers, one Motor Power Stage
Controller, two flexible Timer/Counters with compare modes and PWM, one UART with HW LIN, an 11channel 10-bit ADC with two differential input stages with programmable gain, a 10-bit DAC, a
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
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programmable Watchdog Timer with Internal Individual Oscillator, an SPI serial port, an On-chip Debug
system and four software selectable power saving modes.
The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI ports, CAN, LIN/UART and
interrupt system to continue functioning. The Power-down mode saves the register contents but freezes
the Oscillator, disabling all other chip functions until the next interrupt or Hardware Reset. The ADC Noise
Reduction mode stops the CPU and all I/O modules except ADC, to minimize switching noise during ADC
conversions. In Standby mode, the Crystal/Resonator Oscillator is running while the rest of the device is
sleeping. This allows very fast start-up combined with low power consumption.
The device is manufactured using the Atmel high-density nonvolatile memory technology. The On-chip
ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial interface, by
a conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR
core. The boot program can use any interface to download the application program in the application
Flash memory. Software in the Boot Flash section will continue to run while the Application Flash section
is updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System
Self-Programmable Flash on a monolithic chip, the Atmel ATmega16M1/32M1/64M1 is a powerful
microcontroller that provides a highly flexible and cost effective solution to many embedded control
applications.
The Atmel ATmega16M1/32M1/64M1 AVR is supported with a full suite of program and system
development tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit
emulators, and evaluation kits.
3.2.
Pin descriptions
3.2.1.
VCC
Digital supply voltage.
3.2.2.
GND
Ground.
3.2.3.
Port B (PB7..PB0)
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B
output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs,
Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port
B pins are tri-stated when a reset condition becomes active, even if the clock is not running.
Port B also serves the functions of various special features of the ATmega16M1/32M1/64M1 as listed on
Alternate Functions of Port B. Refer to Alternate Functions of Port B for details.
3.2.4.
Port C (PC7..PC0)
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C
output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs,
Port C pins that are externally pulled low will source current if the pull-up resistors are activated. The Port
C pins are tri-stated when a reset condition becomes active, even if the clock is not running.
Port C also serves the functions of special features of the ATmega16M1/32M1/64M1 as listed in Alternate
Functions of Port C. Refer to Alternate Functions of Port C for details.
3.2.5.
Port D (PD7..PD0)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D
output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs,
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
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Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port
D pins are tri-stated when a reset condition becomes active, even if the clock is not running.
Port D also serves the functions of various special features of the Atmel ATmega16M1/32M1/64M1 as
listed in Alternate Functions of Port D. Refer to Alternate Functions of Port D for details.
3.2.6.
Port E (PE2..0) RESET/ XTAL1/XTAL2
Port E is an 3-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port E
output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs,
Port E pins that are externally pulled low will source current if the pull-up resistors are activated. The Port
E pins are tri-stated when a reset condition becomes active, even if the clock is not running.
If the RSTDISBL Fuse is programmed, PE0 is used as an I/O pin. Note that the electrical characteristics
of PE0 differ from those of the other pins of Port E.
If the RSTDISBL Fuse is unprogrammed, PE0 is used as a reset input. A low level on this pin for longer
than the minimum pulse length will generate a reset, even if the clock is not running. The minimum pulse
length is given in System and reset characteristics. Shorter pulses are not guaranteed to generate a
Reset.
Depending on the clock selection fuse settings, PE1 can be used as input to the inverting Oscillator
amplifier and input to the internal clock operating circuit.
Depending on the clock selection fuse settings, PE2 can be used as output from the inverting Oscillator
amplifier.
The various special features of Port E are elaborated in Alternate Functions of Port E.
3.2.7.
AVCC
AVCC is the supply voltage pin for the A/D Converter, D/A Converter, Current source. It should be
externally connected to VCC, even if the ADC, DAC are not used. If the ADC is used, it should be
connected to VCC through a low-pass filter.
3.2.8.
AREF
This is the analog reference pin for the A/D Converter.
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
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4.
Resources
A comprehensive set of development tools, application notes and datasheets are available for download
on http://www.atmel.com/avr.
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
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5.
About code examples
This documentation contains simple code examples that briefly show how to use various parts of the
device. Be aware that not all C compiler vendors include bit definitions in the header files and interrupt
handling in C is compiler dependent. Please confirm with the C compiler documentation for more details.
These code examples assume that the part specific header file is included before compilation. For I/O
registers located in extended I/O map, "IN", "OUT", "SBIS", "SBIC", "CBI", and "SBI" instructions must be
replaced with instructions that allow access to extended I/O. Typically "LDS" and "STS" combined with
"SBRS", "SBRC", "SBR", and "CBR".
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6.
Data retention
Reliability Qualification results show that the projected data retention failure rate is much less than 1ppm
over 20 years at 85°C or 100 years at 25°C.
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7.
Packaging Information
7.1.
32-pin 32A
PIN 1 IDENTIFIER
PIN 1
e
B
E1
E
D1
D
C
0°~7°
L
A1
A2
A
COMMON DIMENSIONS
(Unit of measure = mm)
Notes:
1. This package conforms to JEDEC reference MS-026, Variation ABA.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable
protrusion is 0.25mm per side. Dimensions D1 and E1 are maximum
plastic body size dimensions including mold mismatch.
3. Lead coplanarity is 0.10mm maximum.
SYMBOL
MIN
NOM
MAX
A
–
–
1.20
A1
0.05
–
0.15
A2
0.95
1.00
1.05
D
8.75
9.00
9.25
D1
6.90
7.00
7.10
E
8.75
9.00
9.25
E1
6.90
7.00
7.10
–
0.45
–
0.20
–
0.75
B
0.30
C
0.09
L
0.45
e
NOTE
Note 2
Note 2
0.80 TYP
2010-10-20
TITLE
32A, 32-lead, 7 x 7mm body size, 1.0mm body thickness,
0.8mm lead pitch, thin profile plastic quad flat package (TQFP)
DRAWING NO.
REV.
32A
C
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7.2.
PV 32 QFN
PV, 32 - lead 7.0mm x 7.0mm body, 0.65mm pitch
quad f at no lead package (QFN)
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
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Atmel Corporation
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2016 Atmel Corporation. / Rev.: Atmel-8209F-ATmega16M1/32M1/64M1_Datasheet_Summary-10/2016
®
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