ATmega8A
Low-Power AVR 8-bit Microcontroller Data Sheet Summary
Introduction
®
The ATmega8A is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the ATmega8A achieves
throughputs close to 1 MIPS per MHz. This empowers system designers to optimize the device for power
consumption versus processing speed.
Features
•
•
•
•
•
High-performance, Low-power AVR 8-bit Microcontroller
Advanced RISC Architecture
– 130 powerful instructions - most single-clock cycle execution
– 32 x 8 general purpose working registers
– Fully static operation
– Up to 16 MIPS throughput at 16 MHz
– On-chip 2-cycle multiplier
High Endurance Nonvolatile Memory segments
– 8 KB of In-System Self-programmable Flash program memory
– 512B EEPROM
– 1 KB internal SRAM
– Write/erase cycles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C(1)
– Optional boot code section with independent lock bits
• In-system programming by on-chip boot program
• True read-while-write operation
– Programming lock for software security
®
Microchip QTouch library support
– Capacitive touch buttons, sliders and wheels
– QTouch and QMatrix acquisition
– Up to 64 sense channels
Peripheral Features
– Two 8-bit timer/counters with separate prescaler, one compare mode
– One 16-bit timer/counter with separate prescaler, compare mode, and capture mode
– Real-time counter with separate oscillator
– Three PWM channels
– 8-channel ADC in TQFP and QFN/MLF package
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 1
ATmega8A
–
–
–
–
–
–
•
•
•
•
•
• Eight channels 10-bit accuracy
6-channel ADC in PDIP package
• Six channels 10-bit accuracy
Byte-oriented two-wire serial interface
Programmable serial USART
Master/slave SPI serial interface
Programmable watchdog timer with separate on-chip oscillator
On-chip analog comparator
Special Microcontroller Features
– Power-on Reset and programmable Brown-out Detection
– Internal calibrated RC oscillator
– External and internal interrupt sources
– Five sleep modes: Idle, ADC noise reduction, power-save, power-down, and standby
I/O and Packages
– 23 programmable I/O lines
– 28-lead PDIP, 32-lead TQFP, and 32-pad QFN/MLF
Operating Voltages
– 2.7 - 5.5V
Speed Grades
– 0 - 16 MHz
Power Consumption at 4 MHz, 3V, 25°C
– Active: 3.6 mA
– Idle mode: 1.0 mA
– Power-down mode: 0.5 μA
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 2
Table of Contents
Introduction......................................................................................................................1
Features.......................................................................................................................... 1
1. Description.................................................................................................................5
2. Configuration Summary.............................................................................................6
3. Ordering Information..................................................................................................7
4. Block Diagram........................................................................................................... 8
5. Pin Configurations..................................................................................................... 9
6. I/O Multiplexing........................................................................................................12
7. Resources............................................................................................................... 14
8. Data Retention.........................................................................................................15
9. About Code Examples.............................................................................................16
10. Capacitive Touch Sensing....................................................................................... 17
10.1. QTouch Library........................................................................................................................... 17
11. Packaging Information.............................................................................................18
11.1. 32-pin 32A.................................................................................................................................. 18
11.2. 28-pin 28P3................................................................................................................................ 19
11.3. 32-pin 32M1-A............................................................................................................................20
12. Errata.......................................................................................................................21
12.1. ATmega8A, rev. L.......................................................................................................................21
13. Appendix A: Revision History.................................................................................. 23
The Microchip Web Site................................................................................................ 24
Customer Change Notification Service..........................................................................24
Customer Support......................................................................................................... 24
Microchip Devices Code Protection Feature................................................................. 24
Legal Notice...................................................................................................................25
Trademarks................................................................................................................... 25
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 3
ATmega8A
Quality Management System Certified by DNV.............................................................26
Worldwide Sales and Service........................................................................................27
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 4
ATmega8A
Description
1.
Description
®
The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to
be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code
efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The ATmega8A provides the following features: 8 KB of In-System Programmable Flash with ReadWhile-Write capabilities, 512 B of EEPROM, 1 KB of SRAM, 23 general purpose I/O lines, 32 general
purpose working registers, three flexible timer/counters with compare modes, internal and external
interrupts, a serial programmable USART, one byte oriented two-wire serial interface, a 6-channel ADC
(eight channels in TQFP and QFN/MLF packages) with 10-bit accuracy, a programmable Watchdog timer
with internal oscillator, an SPI serial port, and five software selectable power saving modes. The Idle
mode stops the CPU while allowing the SRAM, timer/counters, one SPI port, and interrupt system to
continue functioning. The Power-down mode saves the register contents but freezes the oscillator,
disabling all other chip functions until the next Interrupt or Hardware Reset. In Power-save mode, the
asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the
device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except
asynchronous timer and ADC, to minimize switching noise during ADC conversions. In Standby mode,
the crystal/resonator oscillator is running while the rest of the device is sleeping. This allows very fast
start-up combined with low-power consumption.
Microchip offers the QTouch library for embedding capacitive touch buttons, sliders and wheels
functionality into AVR microcontrollers. The patented charge-transfer signal acquisition offers robust
sensing and includes fully debounced reporting of touch keys and includes Adjacent Key SuppressionTM
(AKSTM) technology for unambiguous detection of key events. The easy-to-use QTouch Composer allows
you to explore, develop and debug your own touch applications.
The device is manufactured using Microchip’s high density nonvolatile memory technology. The on-chip
ISP Flash allows the program memory to be reprogrammed In-System through an SPI serial interface, by
a conventional nonvolatile memory programmer, or by an on-chip Boot program running on the AVR core.
The Boot program can use any interface to download the application program in the Application Flash
memory. Software in the Boot Flash section will continue to run while the Application Flash section is
updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System
Self-Programmable Flash on a monolithic chip, the ATmega8A is a powerful microcontroller that provides
a highly flexible and cost effective solution to many embedded control applications.
The device is supported with a full suite of program and system development tools including: C
Compilers, macro assemblers, program debugger/simulators, In-Circuit Emulators, and evaluation kit.
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 5
ATmega8A
Configuration Summary
2.
Configuration Summary
Features
ATmega8A
Pin count
32
Flash (KB)
8
SRAM (KB)
1
EEPROM (Bytes)
512
General Purpose I/O pins
23
SPI
1
TWI (I2C)
1
USART
1
ADC
10-bit 15 ksps
ADC channels
6 (8 in TQFP and QFN/MLF packages)
AC propagation delay
Typ 400 ns
8-bit Timer/Counters
2
16-bit Timer/Counters
1
PWM channels
3
RC Oscillator
+/-3%
Operating voltage
2.7 - 5.5V
Max operating frequency
16 MHz
Temperature range
-40°C to +105°C
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 6
ATmega8A
Ordering Information
3.
Ordering Information
Speed (MHz)
16
Power Supply
2.7 - 5.5V
Ordering Code(2)
Package(1)
ATmega8A-AU
ATmega8A-AUR(3)
32A
32A
ATmega8A-PU
28P3
ATmega8A-MU
32M1-A
ATmega8A-MUR(3)
32M1-A
ATmega8A-AN
ATmega8A-ANR(3)
32A
32A
ATmega8A-MN
32M1-A
ATmega8A-MNR(3)
32M1-A
ATmega8A-PN
28P3
Operational Range
Industrial (-40oC to 85oC)
Extended (-40oC to 105oC)
Note:
1. This device can also be supplied in wafer form. Please contact your local Microchip sales office for
detailed ordering information and minimum quantities.
2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances
(RoHS directive). Also Halide free and fully Green.
3. Tape and Reel
Package Type
32A
32-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)
28P3
28-lead, 0.300” Wide, Plastic Dual Inline Package (PDIP)
32M1-A 32-pad, 5 x 5 x 1.0mm body, lead pitch 0.50mm, Quad Flat No-Lead/Micro Lead Frame
Package (QFN/MLF)
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 7
ATmega8A
Block Diagram
4.
Block Diagram
Figure 4-1. Block Diagram
®
SRAM
CPU
FLASH
XTAL1/
TOSC1
XTAL2/
TOSC2
VCC
RESET
GND
Clock generation
8 MHz
Crystal Osc
1/2/4/8MHz
Calib RC
12MHz
External
RC Osc
32.768kHz
XOSC
External
clock
1MHz int
osc
Power
Supervision
POR/BOD &
RESET
ADC[7:0]
AREF
AIN0
AIN1
ADCMUX
Power
management
and clock
control
EEPROMIF
NVM
programming
Watchdog
Timer
Internal
Reference
D
A
T
A
B
U
S
ADC
SPI
PB[7:0]
PC[6:0]
PD[7:0]
EXTINT
INT[1:0]
AC
USART
TC 1
(16-bit)
TWI
TC 2
(8-bit async)
© 2018 Microchip Technology Inc.
MISO
MOSI
SCK
SS
I/O
PORTS
(8-bit)
SDA
SCL
PARPROG
Serial
Programming
TC 0
RxD
TxD
XCK
EEPROM
Datasheet Summary
T0
OC1A/B
T1
ICP1
OC2
40001991A-page 8
ATmega8A
Pin Configurations
5.
Pin Configurations
Figure 5-1. PDIP
(RESET) PC6
1
28
PC5 (ADC5/SCL)
(RXD) PD0
2
27
PC4 (ADC4/SDA)
(TXD) PD1
3
26
PC3 (ADC3)
(INT0) PD2
4
25
PC2 (ADC2)
(INT1) PD3
5
24
PC1 (ADC1)
(XCK/T0) PD4
6
23
PC0 (ADC0)
VCC
7
22
GND
GND
8
21
AREF
(XTAL1/TOSC1) PB6
9
20
AVCC
(XTAL2/TOSC2) PB7
10
19
PB5 (SCK)
(T1) PD5
11
18
PB4 (MISO)
(AIN0) PD6
12
17
PB3 (MOSI/OC2)
(AIN1) PD7
13
16
PB2 (SS/OC1B)
(ICP1) PB0
14
15
PB1 (OC1A)
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 9
ATmega8A
Pin Configurations
PD2 (INT0)
PD1 (TXD)
PD0 (RXD)
PC6 (RESET)
PC5 (ADC5/SCL)
PC4 (ADC4/SDA)
PC3 (ADC3)
PC2 (ADC2)
32
31
30
29
28
27
26
25
Figure 5-2. TQFP Top View
GND
5
20
AREF
VCC
6
19
ADC6
(XTAL1/TOSC1) PB6
7
18
AVCC
(XTAL2/TOSC2) PB7
8
17
PB5 (SCK)
© 2018 Microchip Technology Inc.
16
GND
(MISO) PB4
21
15
4
(MOSI/OC2) PB3
VCC
14
ADC7
(SS/OC1B) PB2
22
13
3
(OC1A) PB1
GND
12
PC0 (ADC0)
(ICP1) PB0
23
11
2
(AIN1) PD7
(XCK/T0) PD4
10
PC1 (ADC1)
(AIN0) PD6
24
9
1
(T1) PD5
(INT1) PD3
Datasheet Summary
40001991A-page 10
ATmega8A
Pin Configurations
PD2 (INT0)
PD1 (TXD)
PD0 (RXD)
PC6 (RESET)
PC5 (ADC5/SCL)
PC4 (ADC4/SDA)
PC3 (ADC3)
PC2 (ADC2)
32
31
30
29
28
27
26
25
Figure 5-3. MLF Top View
GND
3
22
ADC7
VCC
4
21
GND
GND
5
20
AREF
VCC
6
19
ADC6
(XTAL1/TOSC1) PB6
7
18
AVCC
(XTAL2/TOSC2) PB7
8
17
PB5 (SCK)
Datasheet Summary
(MISO) PB4
(MOSI/OC2) PB3
(SS/OC1B) PB2
(OC1A) PB1
(ICP1) PB0
(AIN1) PD7
(AIN0) PD6
(T1) PD5
© 2018 Microchip Technology Inc.
16
PC0 (ADC0)
15
23
14
2
13
(XCK/T0) PD4
12
PC1 (ADC1)
11
24
10
1
9
(INT1) PD3
NOTE:
The large center pad underneath
the MLF packages is made of
metal and internally connected to
GND. It should be soldered or
glued to the PCB to ensure good
mechanical stability. If the center
pad is left unconneted, the
package might loosen from the
PCB.
40001991A-page 11
ATmega8A
I/O Multiplexing
6.
I/O Multiplexing
Each pin is by default controlled by the PORT as a general purpose I/O and alternatively it can be
assigned to one of the peripheral functions.
The following table describes the peripheral signals multiplexed to the PORT I/O pins.
Table 6-1. 32-Pin TQFP and MLF: PORT Function Multiplexing
No
PAD32
EXTINT
1
PD[3]
INT1
2
PD[4]
3
GND
4
VCC
5
GND
6
VCC
7
PB[6]
XTAL1/TOSC1
8
PB[7]
XTAL2/TOSC2
9
PD[5]
10
PD[6]
AIN0
11
PD[7]
AIN1
12
PB[0]
ICP1
13
PB[1]
OC1A
14
PB[2]
OC1B
SS0
15
PB[3]
OC2
MOSI0
16
PB[4]
MISO0
17
PB[5]
SCK0
18
AVCC
19
ADC6
20
AREF
21
GND
22
ADC7
ADC7
23
PC[0]
ADC0
24
PC[1]
ADC1
25
PC[2]
ADC2
26
PC[3]
ADC3
27
PC[4]
ADC4
SDA0
28
PC[5]
ADC5
SCL0
29
PC[6]/RESET
30
PD[0]
ADC/AC
OSC
T/C # 0
T/C # 1
T0
USART
I2C
SPI
XCK0
T1
ADC6
© 2018 Microchip Technology Inc.
RXD0
Datasheet Summary
40001991A-page 12
ATmega8A
I/O Multiplexing
No
PAD32
31
PD[1]
32
PD[2]
EXTINT
ADC/AC
OSC
T/C # 0
T/C # 1
USART
I2C
SPI
I2C
SPI
TXD0
INT0
Table 6-2. 28-Pin PDIP: PORT Function Multiplexing
No
PAD28
EXTINT
ADC/AC
OSC
T/C # 0
T/C # 1
1
PC[6]/RESET
2
PD[0]
RXD0
3
PD[1]
TXD0
4
PD[2]
INT0
5
PD[3]
INT1
6
PD[4]
7
VCC
8
GND
9
PB[6]
XTAL1/TOSC1
10
PB[7]
XTAL2/TOSC2
11
PD[5]
12
PD[6]
AIN0
13
PD[7]
AIN1
14
PB[0]
ICP1
15
PB[1]
OC1A
16
PB[2]
OC1B
SS0
17
PB[3]
OC2
MOSI0
18
PB[4]
MISO0
19
PB[5]
SCK0
20
AVCC
21
AREF
22
GND
23
PC[0]
ADC0
24
PC[1]
ADC1
25
PC[2]
ADC2
26
PC[3]
ADC3
27
PC[4]
ADC4
SDA0
28
PC[5]
ADC5
SCL0
T0
USART
XCK0
T1
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 13
ATmega8A
Resources
7.
Resources
A comprehensive set of development tools, application notes and datasheets are available for download
on http://www.microchip.com/design-centers/8-bit .
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 14
ATmega8A
Data Retention
8.
Data Retention
Reliability qualification results show that the projected data retention failure rate is much less than 1 PPM
over 20 years at 85°C or 100 years at 25°C.
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 15
ATmega8A
About Code Examples
9.
About Code Examples
This datasheet contains simple code examples that briefly show how to use various parts of the device.
These code examples assume that the part specific header file is included before compilation. Be aware
that not all C compiler vendors include bit definitions in the header files and interrupt handling in C is
compiler dependent. Please confirm with the C compiler documentation for more details.
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 16
ATmega8A
Capacitive Touch Sensing
10.
10.1
Capacitive Touch Sensing
QTouch Library
®
®
The QTouch library provides a simple to use solution to realize touch sensitive interfaces on most AVR
™
microcontrollers. The QTouch library includes support for the QTouch and QMatrix acquisition methods.
Touch sensing can be added to any application by linking the appropriate QTouch library for the AVR
microcontroller. This is done by using a simple set of APIs to define the touch channels and sensors, and
then calling the touch sensing API’s to retrieve the channel information and determine the touch sensor
states.
The QTouch library is FREE and downloadable from QTouch Library . For implementation details and
other information, refer to the QTouch Library User Guide, also available for download from the Microchip
website.
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 17
ATmega8A
Packaging Information
11.
Packaging Information
11.1
32-pin 32A
Note:
Note: For the most current package drawings, see the Microchip Packaging Specification located at http://
www.microchip.com/packaging
PIN 1 IDENTIFIER
PIN 1
e
B
E1
E
D1
D
C
0°~7°
L
A1
A2
A
COMMON DIMENSIONS
(Unit of measure = mm)
SYMBOL
Notes:
1. This package conforms to JEDEC reference MS-026, Variation ABA.
2. Dimensions D1 and E1 do not include mold protrusion. Allowable
protrusion is 0.25mm per side. Dimensions D1 and E1 are maximum
plastic body size dimensions including mold mismatch.
3. Lead coplanarity is 0.10mm maximum.
MIN
NOM
MAX
A
–
–
1.20
A1
0.05
–
0.15
A2
0.95
1.00
1.05
D
8.75
9.00
9.25
D1
6.90
7.00
7.10
E
8.75
9.00
9.25
E1
6.90
7.00
7.10
–
0.45
B
0.30
C
0.09
–
0.20
L
0.45
–
0.75
e
NOTE
Note 2
Note 2
0.80 TYP
2010-10-20
TITLE
32A, 32-lead, 7 x 7mm body size, 1.0mm body thickness,
0.8mm lead pitch, thin profile plastic quad flat package (TQFP)
© 2018 Microchip Technology Inc.
Datasheet Summary
DRAWING NO.
REV.
32A
C
40001991A-page 18
ATmega8A
Packaging Information
11.2
28-pin 28P3
Note:
Note: For the most current package drawings, see the Microchip Packaging Specification located at http://
www.microchip.com/packaging
D
PIN
1
E1
A
SEATING PLANE
L
B2
B1
A1
B
(4 PLACES)
0º ~ 15º
REF
e
E
C
COMMON DIMENSIONS
(Unit of Measure = mm)
NOM
MAX
–
4.5724
A1
0.508
–
–
D
34.544
–
34.798
E
7.620
–
8.255
E1
7.112
–
7.493
B
0.381
–
0.533
B1
1.143
–
1.397
B2
0.762
–
1.143
L
3.175
–
3.429
C
0.203
–
0.356
eB
–
–
10.160
A
eB
Note:
1. Dimensions D and E1 do not include mold Flash or Protrusion.
Mold Flash or Protrusion shall not exceed 0.25mm (0.010").
MIN
–
SYMBOL
e
NOTE
Note 1
Note 1
2.540 TYP
09/28/01
TITLE
2325 Orchard Parkway
28P3, 28-lead (0.300"/7.62mm Wide) Plastic Dual
San Jose, CA 95131
Inline Package (PDIP)
© 2018 Microchip Technology Inc.
Datasheet Summary
DRAWING NO.
REV.
28P3
B
40001991A-page 19
ATmega8A
Packaging Information
11.3
32-pin 32M1-A
Note:
Note: For the most current package drawings, see the Microchip Packaging Specification located at http://
www.microchip.com/packaging
D
D1
1
2
3
0
Pin 1 ID
E1
SIDE VIEW
E
TOP VIEW
A2
A3
A1
A
K
0.08 C
P
D2
SYMBOL
MIN
NOM
MAX
A
0.80
0.90
1.00
A1
–
0.02
0.05
A2
–
0.65
1.00
1
2
3
P
Pin #1 Notch
(0.20 R)
A3
E2
K
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
L
BOTTOM VIEW
0.20 REF
b
0.18
0.23
0.30
D
4.90
5.00
5.10
D1
4.70
4.75
4.80
D2
2.95
3.10
3.25
E
4.90
5.00
5.10
E1
4.70
4.75
4.80
E2
2.95
3.10
3.25
e
Note: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2.
NOTE
0.50 BSC
L
0.30
0.40
0.50
P
–
–
0
–
–
0.60
o
12
K
0.20
–
–
03/14/2014
32M1-A , 32-pad, 5 x 5 x 1.0mm Body, Lead Pitch 0.50mm,
3.10mm Exposed Pad, Micro Lead Frame Package (MLF)
© 2018 Microchip Technology Inc.
Datasheet Summary
32M1-A
F
40001991A-page 20
ATmega8A
Errata
12.
Errata
The revision letter in this section refers to the revision of the ATmega8A device.
12.1
ATmega8A, rev. L
•
•
•
First Analog Comparator conversion may be delayed
Interrupts may be lost when writing the timer registers in the asynchronous timer
Signature may be Erased in Serial Programming Mode
•
CKOPT Does not Enable Internal Capacitors on XTALn/TOSCn Pins when 32kHz Oscillator is
Used to Clock the Asynchronous Timer/Counter2
Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request
•
1.
First Analog Comparator conversion may be delayed
If the device is powered by a slow rising VCC, the first analog comparator conversion will take
longer than expected on some devices.
Problem Fix / Workaround:
2.
When the device has been powered or reset, disable then enable the analog comparator before the
first conversion.
Interrupts may be lost when writing the timer registers in the asynchronous timer
The interrupt will be lost if a timer register that is synchronous timer clock is written when the
asynchronous Timer/Counter register (TCNTx) is 0x00.
Problem Fix / Workaround:
3.
Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor 0x00
before writing to the asynchronous Timer Control Register (TCCRx), asynchronous Timer Counter
Register (TCNTx), or asynchronous Output Compare Register (OCRx).
Signature may be Erased in Serial Programming Mode
If the signature bytes are read before a chiperase command is completed, the signature may be
erased causing the device ID and calibration bytes to disappear. This is critical, especially, if the
part is running on internal RC oscillator.
Problem Fix / Workaround:
4.
Ensure that the chiperase command has exceeded before applying the next command.
CKOPT Does not Enable Internal Capacitors on XTALn/TOSCn Pins when 32kHz Oscillator is
Used to Clock the Asynchronous Timer/Counter2
When the internal RC oscillator is used as the main clock source, it is possible to run the Timer/
Counter2 asynchronously by connecting a 32kHz Oscillator between XTAL1/TOSC1 and XTAL2/
TOSC2. But when the internal RC oscillator is selected as the main clock source, the CKOPT fuse
does not control the internal capacitors on XTAL1/TOSC1 and XTAL2/TOSC2. As long as there are
no capacitors connected to XTAL1/TOSC1 and XTAL2/TOSC2, safe operation of the oscillator is
not guaranteed.
Problem Fix / Workaround:
Use external capacitors in the range of 20 - 36 pF on XTAL1/TOSC1 and XTAL2/TOSC2. This will
be fixed in ATmega8A Rev. G where the CKOPT Fuse will control internal capacitors also when
internal RC oscillator is selected as main clock source. For ATmega8A Rev. G, CKOPT = 0
(programmed) will enable the internal capacitors on XTAL1 and XTAL2. Customers who want
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 21
ATmega8A
Errata
5.
compatibility between Rev. G and older revisions, must ensure that CKOPT is unprogrammed
(CKOPT = 1).
Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request.
Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR register
triggers an unexpected EEPROM interrupt request.
Problem Fix / Workaround:
Always use OUT or SBI to set EERE in EECR.
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 22
ATmega8A
Appendix A: Revision History
13.
Appendix A: Revision History
Revision A (January 2018)
•
Atmel document number 8159FS is now Microchip DS40001991A.
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 23
ATmega8A
The Microchip Web Site
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Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the
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There are dishonest and possibly illegal methods used to breach the code protection feature. All of
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Microchip is willing to work with the customer who is concerned about the integrity of their code.
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 24
ATmega8A
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the
code protection features of our products. Attempts to break Microchip’s code protection feature may be a
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All other trademarks mentioned herein are property of their respective companies.
© 2018 Microchip Technology Inc.
Datasheet Summary
40001991A-page 25
ATmega8A
©
2018, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 978-1-5224-2599-1
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®
®
and India. The Company’s quality system processes and procedures are for its PIC MCUs and dsPIC
®
DSCs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and
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systems is ISO 9001:2000 certified.
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Datasheet Summary
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