SAMA5D27 SOM1
SAMA5D27 MPU, 1Gbit (128MB) DDR2 SDRAM, 10/100
Ethernet PHY, 64Mbit (8MB) Flash, Power Management IC,
1Kbit EEPROM
Introduction
The Microchip SAMA5D27 SOM1 is a small single-sided System-On-Module (SOM) based on the high-performance
System-in-Package 32-bit Arm® Cortex®-A5 processor-based MPU SAMA5D27 and 1Gb DDR2 SDRAM running up
to 500 MHz.
The SAMA5D27 SOM1 is built on a common set of proven Microchip components to reduce time to market by
simplifying hardware design and software development.
The SOM also limits design rules of the main application board, reducing overall PCB complexity and cost. The
SAMA5D27 SOM1 is delivered with a free Linux® distribution and bare metal C examples.
Figure 1. SAMA5D27 SOM1
Features
•
•
•
•
•
System-In-Package (SAMA5D27C-D1G-CU) including:
– Arm Cortex-A5 processor-based SAMA5D2 MPU
– 1 Gbit DDR2 SDRAM
On-Board Power Management Unit (MIC2800-G1JJYML)
1 Kb Serial EEPROM with EUI-48™ Node Identity (24AA02E48T-I/OT)
64 Mb Serial Quad I/O Flash Memory (SST26VF064BT-104I/MF)
10Base-T/100Base-TX Ethernet PHY (KSZ8081RNAIA)
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 1
SAMA5D27 SOM1
•
•
•
•
•
•
•
•
40 x 38 mm Module, Pitch 0.8 mm, solderable by hand
103 I/Os
Up to 7 Tampers
One USB Device, One USB Host and One HSIC Interface
Shutdown and Reset Control Pins
Up to 24-bit LCD Interface
Independent Power Supplies Available for Camera Sensor, for SD Card and for Backup depending on Voltage
Domains
Operational Specifications:
– Main operating voltage: 3.3V ± 5%
– Temperature range: -40°C to 85°C
– Integrated crystals, internal voltage regulators
– Multiple interfaces and I/Os for easy application development
Applications
•
•
•
•
Healthcare/Patient Monitoring
IoT Secure Gateways
Human Machine Interface, Control Panel
Home and Building Automation, Thermostat, Industrial Gateways
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 2
SAMA5D27 SOM1
Table of Contents
Introduction.....................................................................................................................................................1
Features......................................................................................................................................................... 1
Applications.................................................................................................................................................... 2
1.
Description.............................................................................................................................................. 5
2.
Reference Documents............................................................................................................................ 6
3.
Block Diagram.........................................................................................................................................7
4.
Pinout...................................................................................................................................................... 8
4.1.
4.2.
5.
Functional Description...........................................................................................................................26
5.1.
5.2.
5.3.
5.4.
5.5.
5.6.
6.
SAMA5D27 System-In-Package................................................................................................ 26
Power Supplies.......................................................................................................................... 27
System Control...........................................................................................................................28
Ethernet PHY............................................................................................................................. 29
QSPI Memory.............................................................................................................................30
EEPROM Memory......................................................................................................................31
Power Supply Connections and Timing Sequences............................................................................. 33
6.1.
6.2.
6.3.
6.4.
7.
Pinout Overview........................................................................................................................... 8
Pin List .........................................................................................................................................8
Power Supply Configuration #1..................................................................................................33
Power Supply Configuration #2..................................................................................................34
Power Supply Configuration #3..................................................................................................35
Power Supply Configuration #4..................................................................................................37
Booting Guidelines................................................................................................................................ 39
7.1.
7.2.
7.3.
7.4.
Boot Process.............................................................................................................................. 39
Boot Configuration......................................................................................................................39
NVM Programming.....................................................................................................................39
Boot From External Memory...................................................................................................... 39
8.
Debug Considerations...........................................................................................................................41
9.
Electrical Characteristics.......................................................................................................................42
9.1.
9.2.
9.3.
Absolute Maximum Ratings........................................................................................................42
Operational Characteristics........................................................................................................ 42
DC Electrical Characteristics......................................................................................................43
10. Mechanical Characteristics................................................................................................................... 45
10.1. Module Dimensions....................................................................................................................45
10.2. Module Land Pattern.................................................................................................................. 46
11. Production Settings............................................................................................................................... 48
11.1. Bake Information........................................................................................................................ 48
11.2. Reflow Profile............................................................................................................................. 48
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 3
SAMA5D27 SOM1
12. Ordering Information............................................................................................................................. 50
13. Revision History.................................................................................................................................... 51
The Microchip Website.................................................................................................................................52
Product Change Notification Service............................................................................................................52
Customer Support........................................................................................................................................ 52
Product Identification System.......................................................................................................................53
Microchip Devices Code Protection Feature................................................................................................ 53
Legal Notice................................................................................................................................................. 53
Trademarks.................................................................................................................................................. 54
Quality Management System....................................................................................................................... 54
Worldwide Sales and Service.......................................................................................................................55
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 4
SAMA5D27 SOM1
Description
1.
Description
The SAMA5D27 SOM1 is a high-performance System-On-Module based on the 32-bit ARM Cortex-A5 RISC
SAMA5D2 processor. The SAMA5D27 SOM1 is certified for industrial operating conditions over a -40 to 85°C
temperature range.
The system of the SAMA5D27 SOM1 operates at a maximum CPU operating frequency of 500 MHz and a maximum
bus speed of 166 MHz. It features up to:
• 1 Gbit of DDR2 SDRAM memory (SAMA5D27C-D1G-CU)
• 1 Kb of EEPROM memory (24AA02E48T-I/OT) with EUI-48
• 64 Mb of QSPI Flash (SST26VF064BT-104I/MF) memory
The SAMA5D27 SOM1 is a 176-pin, 0.8mm pad pitch module, 40 mm x 38 mm in size.
The SAMA5D27 SOM1 offers an extensive peripheral set, including High-speed USB Host and Device, HSIC
Interface, 10Base-T/100Base-TX Ethernet Interface, system control and up to 103 I/Os featuring:
•
•
•
•
•
•
•
•
•
•
•
•
Up to 4 UARTs
Up to 4 Flexcoms
Up to 6 Capactive Touch lines for up to 9 touch buttons
Up to 10 ADC Inputs
Up to 2 CAN
Up to 7 Tamper Pins
Serial Interfaces such as SPI, TWI, QSPI, SSC and I²S
SD/MMC, eMMC, SDIO Interfaces
Up to 24-bit LCD RGB Interface
CMOS Camera Interface
Mono PDMIC and Full-Bridge Class-D Stereo
Up to 6 Capacitive Touch Lines
Tip: Each I/O of the SAMA5D27 SOM1 is configurable, as either a general-purpose I/O line only, or as an
I/O line multiplexed with up to six peripheral I/Os. As the multiplexing is hardware-defined, the hardware
designer and programmer must carefully determine the configuration of the PIO Controllers required by
their application.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 5
SAMA5D27 SOM1
Reference Documents
2.
Reference Documents
The SAMA5D27 SOM1 is equipped with various Microchip silicon devices. The relevant documentation is listed in the
table below.
Type
Document Title
Available
Ref. No./Product
Data sheet
SAMA5D2
www.microchip.com/SAMA5D2
DS60001476
Data sheet
SAMA5D2 System-In-Package (SIP)
www.microchip.com/SAMA5D2
SIP
DS60001484
Data sheet
Serial EEPROMs with EUI-48 Node
Identity
www.microchip.com/24AA02E48
24AA02E48T-I/OT
www.microchip.com/ksz8081
KSZ8081RNAIA
Data sheet 10BASE-T/100BASE-TX Ethernet PHY
Data sheet
Serial Quad I/O (SQI) Flash Memory
www.microchip.com/sst26vf064b
SST26VF064BT-104I/MF
Data sheet
Digital Power Management IC
www.microchip.com/mic2800
MIC2800-G1JJYML
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 6
SAMA5D27 SOM1
Block Diagram
Block Diagram
Figure 3-1. SAMA5D27 SOM1 Block Diagram
VDDSDHC
VDDISC
JTAG & DBGU Interfaces
VDDBU
TWI Interface
Power Management
Unit
MIC2800-G1JJYML
Main
3.3V
1K Serial EEPROM
ΤΜ
with EUI-48 Node Identity
24AA02E48T-I/OT
Debug
7 * PIOBU
Backup
RXD
WAKEUP
RESET
MPU + DDR2 1Gb
SAMA5D27C-D1G-CU
LFBGA289
System
SHUTDOWN
Disable Boot
CLK_AUDIO
10BASE-T / 100BASE-TX
PHY With RMII Support
KSZ8081RNAIA
Physical
Receiver
Transceiver
Interface
64 Mbit Serial Quad I/O
Flash Memory
SST26VF064BT-104I/MF
External
QSPI
Connection
Misc
COMPP / COMPN
USB Device Connector
USB Dev.
USB Host Connector
USB Host
HSIC Device
HSIC
© 2020 Microchip Technology Inc.
Datasheet
CLASS-D Stereo
Mono PDMIC Interface
Camera Interface
LCD Interface up to 24-bit
SD-CARD Interface
SDIO Interface
eMMC Interface
I²S Interface
SSC Interface
QSPI Interface
TWI Interface
2 * SPI Interfaces
Up to 2 * CAN
Up to 10 * ADC Inputs
Up to 4 * FLEXCOM
103 I/O
Up to 4 * UART
3.
DS60001521D-page 7
SAMA5D27 SOM1
Pinout
4.
Pinout
4.1
Pinout Overview
The categories of pins are listed below:
•
•
•
•
Red: Power Supplies
Black: Ground
Blue: Signals
Orange: Reserved for future use
131
135
140
145
150
155
160
165
1
130 GND
RFU0
PB8
PB6
DIS_BOOT
125 PB04
PB02
PB03
PB01
PD0
120 PC30
PB0
PC29
PC28
PC31
115 PC26
PC27
PD1
PA16
PA14
110 PD25
PA15
PA17
GND
PA22
105 PA18
PA20
PA21
PA23
PA19
100 PA26
PA24
GND
PA25
PA29
95 PA28
PA30
PA31
PA12
PA13
90 PA27
89 GND
5
10
15
20
25
30
35
40
88
85
80
75
70
65
60
55
50
GND
PIOBU2
PIOBU7
PIOBU5
PIOBU4
PIOBU3
WKUP
GND
PD28
PD29
PD27
PD30
VDDBU
GND
PD20
PD19
PIOBU6
nRST
CLK_AUDIO
GND
COMPP
COMPN
VDDSDHC
GND
USBA_M
USBA_P
GND
USBB_M
USBB_P
GND
STROBE
DATA
GND
PA1
PA9
PA8
PA07/SDM
PA0
PA3
PA10
PA2
PA4
PA5
PA6
PA11
GND
45
42
43
GND
PC9
PC12
PC13
PC17
PC19
PC21
PC14
PC10
GND
PC22
PC15
PC24
PC20
VDDISC
VDDIN_3V3
VDDIN_3V3
GND
PD21
PD22
PD5
PD6
PD2
PD3
PD7
GND
PD4
PD8
PD24
PD23
GND
RXD
PIOBU1
PD26
SHDN
ETH_LED0
ETH_RXM
ETH_RXP
GND
ETH_TXM
ETH_TXP
GND
170
176
175
GND
PC11
PC16
PC25
PC18
GND
PC23
PB26
PB24
PB28
GND
PB30
PB21
PB27
PB15
PB22
PB23
PB25
PB19
PB17
PB20
PB13
PB16
RFU2
PB18
PB12
PB14
GND
PB11
RFU1
PC2
PC0
PB29
PB31
PC3
PC1
PC6
PC7
PC8
PC5
PC4
PB10
PB5
PB7
PB9
GND
Figure 4-1. SAMA5D27 SOM1 Pinout Overview
4.2
Pin List
The pin list of the SAMA5D27 SOM1 is provided in the following tables.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 8
SAMA5D27 SOM1
Pinout
Important: Compared to SAMA5D2 Series devices, some PIO features are not listed. These features are
used internally on the SOM and cannot be shared with other PIOs for purposes of features or signal
integrity.
4.2.1
PIOA Pin Description
Table 4-1. System-On-Module Pin Description: PIOA
Primary
Pad No.
Power Rail
Signal
80
76
83
81
84
85
86(2)
79(2)
78(2)
VDDSDHC
VDDSDHC
VDDSDHC
VDDSDHC
VDDSDHC
VDDSDHC
VDDSDHC
VDDSDHC
VDDSDHC
Alternate
PIO Peripheral
I/O Type
GPIO_EMMC
GPIO_EMMC
GPIO_EMMC
GPIO_EMMC
GPIO_EMMC
GPIO_EMMC
GPIO_EMMC
GPIO_EMMC
GPIO_EMMC
© 2020 Microchip Technology Inc.
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Signal
–
–
–
–
–
–
–
–
–
Dir
–
–
–
–
–
–
Func
Signal
Dir
IO Set
A
SDMMC0_CK
I/O
1
B
QSPI0_SCK
O
1
F
D0
I/O
2
A
SDMMC0_CMD
I/O
1
B
QSPI0_CS
O
1
F
D1
I/O
2
A
SDMMC0_DAT0
I/O
1
B
QSPI0_IO0
I/O
1
F
D2
I/O
2
A
SDMMC0_DAT1
I/O
1
B
QSPI0_IO1
I/O
1
F
D3
I/O
2
A
SDMMC0_DAT2
I/O
1
B
QSPI0_IO2
I/O
1
F
D4
I/O
2
A
SDMMC0_DAT3
I/O
1
B
QSPI0_IO3
I/O
1
F
D5
I/O
2
A
SDMMC0_DAT4
I/O
1
D
TIOA5
I/O
1
E
FLEXCOM2_IO0
I/O
1
F
D6
I/O
2
A
SDMMC0_DAT5
I/O
1
D
TIOB5
I/O
1
E
FLEXCOM2_IO1
I/O
1
F
D7
I/O
2
A
SDMMC0_DAT6
I/O
1
D
TCLK5
I
1
E
FLEXCOM2_IO2
I/O
1
F
NWE/NANDWE
O
2
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
Datasheet
DS60001521D-page 9
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Signal
77(2)
82(2)
87(2)
92
91
111
109
112
VDDSDHC
VDDSDHC
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO_EMMC
GPIO_EMMC
GPIO
GPIO
GPIO
GPIO_QSPI
GPIO
GPIO_IO
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
© 2020 Microchip Technology Inc.
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Signal
–
–
–
–
–
–
–
–
Dir
Func
Signal
Dir
IO Set
A
SDMMC0_DAT7
I/O
1
D
TIOA4
I/O
1
E
FLEXCOM2_IO3
O
1
F
NCS3
O
2
A
SDMMC0_RSTN
O
1
D
TIOB4
I/O
1
E
FLEXCOM2_IO4
O
1
F
A21/NANDALE
O
2
A
SDMMC0_VDDSEL
O
1
D
TCLK4
I
1
F
A22/NANDCLE
O
2
A
SDMMC0_WP
I
1
B
IRQ
I
1
F
NRD/NANDOE
O
2
A
SDMMC0_CD
I
1
E
FLEXCOM3_IO1
I/O
1
F
D8
I/O
2
A
SPI0_SPCK
I/O
1
B
TK1
I/O
1
C
QSPI0_SCK
O
2
D
I2SMCK1
O
2
E
FLEXCOM3_IO2
I/O
1
F
D9
I/O
2
A
SPI0_MOSI
I/O
1
B
TF1
I/O
1
C
QSPI0_CS
O
2
D
I2SCK1
I/O
2
E
FLEXCOM3_IO0
I/O
1
F
D10
I/O
2
A
SPI0_MISO
I/O
1
B
TD1
O
1
C
QSPI0_IO0
I/O
2
D
I2SWS1
I/O
2
E
FLEXCOM3_IO3
O
1
F
D11
I/O
2
–
PIO, I, PU, ST
–
–
–
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
–
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
Datasheet
DS60001521D-page 10
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Signal
108
105
101
104
103
106
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO_IO
GPIO_IO
GPIO_IO
GPIO_IO
GPIO_IO
GPIO_QSPI
PA17
PA18
PA19
PA20
PA21
PA22
© 2020 Microchip Technology Inc.
Dir
I/O
I/O
I/O
I/O
I/O
I/O
Signal
–
–
–
–
–
–
Dir
Func
Signal
Dir
IO Set
A
SPI0_NPCS0
I/O
1
B
RD1
I
1
C
QSPI0_IO1
I/O
2
D
I2SDI1
I
2
E
FLEXCOM3_IO4
O
1
F
D12
I/O
2
A
SPI0_NPCS1
O
1
B
RK1
I/O
1
C
QSPI0_IO2
I/O
2
D
I2SDO1
O
2
E
SDMMC1_DAT0
I/O
1
F
D13
I/O
2
A
SPI0_NPCS2
O
1
B
RF1
I/O
1
C
QSPI0_IO3
I/O
2
D
TIOA0
I/O
1
E
SDMMC1_DAT1
I/O
1
F
D14
I/O
2
A
SPI0_NPCS3
O
1
D
TIOB0
I/O
1
E
SDMMC1_DAT2
I/O
1
F
D15
I/O
2
A
IRQ
I
2
B
PCK2
O
3
D
TCLK0
O
1
E
SDMMC1_DAT3
I/O
1
F
NANDRDY
I
2
A
FLEXCOM1_IO2
I/O
1
B
D0
I/O
1
C
TCK
I
4
D
SPI1_SPCK
I/O
2
E
SDMMC1_CK
I/O
1
F
QSPI0_SCK
O
3
–
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
–
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
–
PIO, I, PU, ST
PIO, I, PU, ST
Datasheet
DS60001521D-page 11
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Signal
102
99
97
100
90
95
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO
GPIO_IO
GPIO_IO
GPIO_IO
GPIO_IO
GPIO
PA23
PA24
PA25
PA26
PA27
PA28
© 2020 Microchip Technology Inc.
Dir
I/O
I/O
I/O
I/O
I/O
I/O
Signal
–
–
–
–
–
–
Dir
–
–
–
–
Func
Signal
Dir
IO Set
A
FLEXCOM1_IO1
I/O
1
B
D1
I/O
1
C
TDI
I
4
D
SPI1_MOSI
I/O
2
F
QSPI0_CS
O
3
A
FLEXCOM1_IO0
I/O
1
B
D2
I/O
1
C
TDO
O
4
D
SPI1_MISO
I/O
2
F
QSPI0_IO0
I/O
3
A
FLEXCOM1_IO3
O
1
B
D3
I/O
1
C
TMS
I
4
D
SPI1_NPCS0
I/O
2
F
QSPI0_IO1
I/O
3
A
FLEXCOM1_IO4
O
1
B
D4
I/O
1
C
NTRST
I
4
D
SPI1_NPCS1
O
2
F
QSPI0_IO2
I/O
3
A
TIOA1
I/O
2
B
D5
I/O
1
C
SPI0_NPCS2
O
2
D
SPI1_NPCS2
O
2
E
SDMMC1_RSTN
O
1
F
QSPI0_IO3
I/O
3
A
TIOB1
I/O
2
B
D6
I/O
1
C
SPI0_NPCS3
O
2
D
SPI1_NPCS3
O
2
E
SDMMC1_CMD
I/O
1
F
CLASSD_L0
O
1
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
–
PIO, I, PU, ST
Datasheet
DS60001521D-page 12
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Signal
96
94
93
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO
GPIO
GPIO
PA29
PA30
PA31
Dir
I/O
I/O
I/O
Signal
–
Dir
–
–
–
–
Func
Signal
Dir
IO Set
A
TCLK1
I
2
B
D7
I/O
1
C
SPI0_NPCS1
O
2
E
SDMMC1_WP
I
1
F
CLASSD_L1
O
1
B
NWE / NANDWE
O
1
C
SPI0_NPCS0
I/O
2
D
PWMH0
O
1
E
SDMMC1_CD
I
1
F
CLASSD_L2
O
1
B
NCS3
O
1
C
SPI0_MISO
I/O
2
D
PWML0
O
1
F
CLASSD_L3
O
1
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
Notes:
1. Fixed feature due to the SOM internal connection.
2. Limited feature compared to SAMA5D2 due to the SOM internal use of specific functionality, for example,
QSPI, GMAC.
3. Limited feature compared to SAMA5D2 due to the use of a part of the functionality for other features in the
SOM, for example, GMAC, ISC, Flexcom, etc.
4.2.2
PIOB Pin Description
Table 4-2. System-On-Module Pin Description: PIOB
Primary
Pad No.
Power Rail
Signal
119
122
124
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO
GPIO
GPIO
© 2020 Microchip Technology Inc.
PB0
PB1
PB2
Dir
I/O
I/O
I/O
Signal
–
–
–
Dir
–
Func
Signal
Dir
IO Set
B
A21 / NANDALE
O
1
C
SPI0_MOSI
I/O
2
D
PWMH1
O
1
B
A22 / NANDCLE
O
1
C
SPI0_SPCK
I/O
2
D
PWML1
O
1
F
CLASSD_R0
O
1
B
NRD/NANDOE
O
1
D
PWMFI0
I
1
F
CLASSD_R1
O
1
–
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
PIO, I, PU, ST
Datasheet
PIO, I, PU, ST
DS60001521D-page 13
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Signal
123
125
134(2)
127(2)
133(2)
128(2)
132(2)
135(2)
148(3)
151(3)
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO
GPIO
GPIO_QSPI
GPIO
GPIO_IO
GPIO_IO
GPIO_IO
GPIO_IO
GPIO
GPIO
© 2020 Microchip Technology Inc.
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Signal
–
–
–
–
–
–
–
–
–
–
Dir
–
Func
Signal
Dir
IO Set
A
URXD4
I
1
B
D8
I/O
1
C
IRQ
I
3
D
PWMEXTRG0
I
1
F
CLASSD_R2
O
1
A
UTXD4
O
1
B
D9
I/O
1
C
FIQ
I
4
F
CLASSD_R3
O
1
A
TCLK2
I
1
C
PWMH2
O
1
D
QSPI1_SCK
O
2
A
TIOA2
I/O
1
C
PWML2
O
1
D
QSPI1_CS
O
2
A
TIOB2
I/O
1
C
PWMH3
O
1
D
QSPI1_IO0
I/O
2
A
TCLK3
I
1
C
PWML3
O
1
D
QSPI1_IO1
I/O
2
A
TIOA3
I/O
1
C
PWMFI1
I
1
D
QSPI1_IO2
I/O
2
A
TIOB3
I/O
1
C
PWMEXTRG1
I
1
D
QSPI1_IO3
I/O
2
A
LCDDAT0
O
1
B
A0/NBS0
O
1
C
URXD3
I
3
D
PDMDAT0
I/O
2
A
LCDDAT1
O
1
B
A1
O
1
C
UTXD3
O
3
D
PDMCLK0
O
2
–
–
–
–
–
–
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
PIO, I, PU, ST
–
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
–
PIO, I, PU, ST
Datasheet
DS60001521D-page 14
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Signal
155(3)
VDDIN_3V3
150(2), (3)
162(2), (3)
154(2), (3)
157(2), (3)
152(2), (3)
158(2), (3)
156(3)
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO
GPIO_QSPI
GPIO
GPIO_IO
GPIO_IO
GPIO_IO
GPIO_IO
GPIO
© 2020 Microchip Technology Inc.
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Signal
–
–
–
–
–
–
–
–
Dir
–
Func
Signal
Dir
IO Set
A
LCDDAT2
O
1
B
A2
O
1
C
PCK1
I/O
3
A
LCDDAT3
O
1
B
A3
O
1
C
TK1
I/O
2
D
I2SMCK1
O
1
A
LCDDAT4
O
1
B
A4
O
1
C
TF1
I/O
2
D
I2SCK1
I/O
1
A
LCDDAT5
O
1
B
A5
O
1
C
TD1
O
2
D
I2SWS1
I/O
1
A
LCDDAT6
O
1
B
A6
O
1
C
RD1
I
2
D
I2SDI1
I
1
A
LCDDAT7
O
1
B
A7
O
1
C
RK1
I/O
2
D
I2SDO1
O
1
A
LCDDAT8
O
1
B
A8
O
1
C
RF1
I/O
2
D
TIOA3
I/O
2
A
LCDDAT9
O
1
B
A9
O
1
C
TK0
I/O
1
D
TIOB3
I/O
2
E
PCK1
O
4
–
PIO, I, PU, ST
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
–
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
Datasheet
PIO, I, PU, ST
DS60001521D-page 15
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Signal
164(3)
161(3)
160(3)
168
159
169
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
© 2020 Microchip Technology Inc.
PB21
PB22
PB23
PB24
PB25
PB26
Dir
I/O
I/O
I/O
I/O
I/O
I/O
Signal
–
–
–
–
–
–
Dir
–
–
–
Func
Signal
Dir
IO Set
A
LCDDAT10
O
1
B
A10
O
1
C
TF0
I/O
1
D
TCLK3
I
2
E
FLEXCOM3_IO2
I/O
3
A
LCDDAT11
O
1
B
A11
O
1
C
TD0
O
1
D
TIOA2
I/O
2
E
FLEXCOM3_IO1
I/O
3
A
LCDDAT12
O
1
B
A12
O
1
C
RD0
I
1
D
TIOB2
I/O
2
E
FLEXCOM3_IO0
I/O
3
A
LCDDAT13
O
1
B
A13
O
1
C
RK0
I/O
1
D
TCLK2
I
2
E
FLEXCOM3_IO3
O
3
F
ISI_D10
I
3
A
LCDDAT14
O
1
B
A14
O
1
C
RF0
I/O
1
E
FLEXCOM3_IO4
O
3
F
ISI_D11
I
3
A
LCDDAT15
O
1
B
A15
O
1
C
URXD0
I
1
D
PDMDAT0
I/O
1
F
ISI_D0
I
3
–
–
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
Datasheet
PIO, I, PU, ST
PIO, I, PU, ST
DS60001521D-page 16
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Signal
163
167
144
165
143(2)
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO
GPIO
GPIO
GPIO
GPIO
PB27
PB28
PB29
PB30
PB31
Dir
I/O
I/O
I/O
I/O
I/O
Signal
–
–
–
–
–
Dir
–
–
–
–
Func
Signal
Dir
IO Set
A
LCDDAT16
O
1
B
A16
O
1
C
UTXD0
O
1
D
PDMCLK0
O
1
F
ISI_D1
I
3
A
LCDDAT17
O
1
B
A17
O
1
C
FLEXCOM0_IO0
I/O
1
D
TIOA5
I/O
2
F
ISI_D2
I
3
A
LCDDAT18
O
1
B
A18
O
1
C
FLEXCOM0_IO1
I/O
1
D
TIOB5
I/O
2
F
ISI_D3
I
3
A
LCDDAT19
O
1
B
A19
O
1
C
FLEXCOM0_IO2
I/O
1
D
TCLK5
I
2
F
ISI_D4
I
3
A
LCDDAT20
O
1
B
A20
O
1
C
FLEXCOM0_IO3
O
1
F
ISI_D5
I
3
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
Notes:
1. Fixed feature due to the SOM internal connection.
2. Limited feature compared to SAMA5D2 due to the SOM internal use of specific functionality, for example,
QSPI, GMAC.
3. Limited feature compared to SAMA5D2 due to the use of a part of the functionality for other features in the
SOM, for example, GMAC, ISC, Flexcom, etc.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 17
SAMA5D27 SOM1
Pinout
4.2.3
PIOC Pin Description
Table 4-3. System-On-Module Pin Description: PIOC
Primary
Pad No.
Power Rail
Signal
145(2)
141
146
142
136
137
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
PC0
PC1
PC2
PC3
PC4
PC5
© 2020 Microchip Technology Inc.
Dir
I/O
I/O
I/O
I/O
I/O
I/O
Signal
–
–
–
–
–
–
Dir
Func
Signal
Dir
IO Set
A
LCDDAT21
O
1
B
A23
O
1
C
FLEXCOM0_IO4
O
1
F
ISI_D6
I
3
A
LCDDAT22
O
1
B
A24
O
1
C
CANTX0
O
1
D
SPI1_SPCK
I/O
1
E
I2SCK0
I/O
1
F
ISI_D7
I
3
A
LCDDAT23
O
1
B
A25
O
1
C
CANRX0
I/O
1
D
SPI1_MOSI
I/O
1
E
I2SMCK0
O
1
F
ISI_D8
I
3
A
LCDPWM
O
1
B
NWAIT
I
1
C
TIOA1
I/O
1
D
SPI1_MISO
I/O
1
E
I2SWS0
I/O
1
F
ISI_D9
I
3
A
LCDDISP
O
1
B
NWR1/NBS1
O
1
C
TIOB1
I/O
1
D
SPI1_NPCS0
I/O
1
E
I2SDI0
I
1
F
ISI_PCK
I
3
A
LCDVSYNC
O
1
B
NCS0
O
1
C
TCLK1
I
1
D
SPI1_NPCS1
O
1
E
I2SDO0
O
1
F
ISI_VSYNC
I
3
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
Datasheet
DS60001521D-page 18
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Signal
140
139
138
2(2)
9(2)
175(2)
3(2)
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDISC
VDDISC
VDDISC
VDDISC
Alternate
PIO Peripheral
I/O Type
GPIO
GPIO_CLK
GPIO
GPIO
GPIO
GPIO
GPIO
PC6
PC7
PC8
PC9
PC10
PC11
PC12
© 2020 Microchip Technology Inc.
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Signal
–
–
–
–
–
–
–
Dir
–
Func
Signal
Dir
IO Set
A
LCDHSYNC
O
1
B
NCS1
O
1
C
TWD1
I/O
1
D
SPI1_NPCS2
O
1
F
ISI_HSYNC
I
3
A
LCDPCK
O
1
B
NCS2
O
1
C
TWCK1
I/O
1
D
SPI1_NPCS3
O
1
E
URXD1
I
2
F
ISI_MCK
O
3
A
LCDDEN
O
1
B
NANDRDY
I
1
C
FIQ
I
1
D
PCK0
O
3
E
UTXD1
O
2
F
ISI_FIELD
I
3
A
FIQ
I
3
C
ISI_D0
I
1
D
TIOA4
I/O
2
A
LCDDAT2
O
2
C
ISI_D1
I
1
D
TIOB4
I/O
2
E
CANTX0
O
2
A
LCDDAT3
O
2
C
ISI_D2
I
1
D
TCLK4
I
2
E
CANRX0
I
2
F
A0/NBS0
O
2
A
LCDDAT4
O
2
C
ISI_D3
I
1
D
URXD3
I
1
E
TK0
I/O
2
F
A1
O
2
–
PIO, I, PU, ST
–
–
–
PIO, I, PU, ST
PIO, I, PU, ST
–
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
PIO, I, PU, ST
Datasheet
PIO, I, PU, ST
PIO, I, PU, ST
DS60001521D-page 19
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Signal
4(2)
8(2)
12(2)
174(2)
5(2)
172(2)
6(2)
14(2)
VDDISC
VDDISC
VDDISC
VDDISC
VDDISC
VDDISC
VDDISC
VDDISC
Alternate
PIO Peripheral
I/O Type
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
© 2020 Microchip Technology Inc.
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Signal
–
–
–
–
–
–
–
–
Dir
–
Func
Signal
Dir
IO Set
A
LCDDAT5
O
2
C
ISI_D4
I
1
D
UTXD3
O
1
E
TF0
I/O
2
F
A2
O
2
A
LCDDAT6
O
2
C
ISI_D5
I
1
E
TD0
O
2
F
A3
O
2
A
LCDDAT7
O
2
C
ISI_D6
I
1
E
RD0
I
2
F
A4
O
2
A
LCDDAT10
O
2
C
ISI_D7
I
1
E
RK0
I/O
2
F
A5
O
2
A
LCDDAT11
O
2
C
ISI_D8
I
1
E
RF0
I/O
2
F
A6
O
2
A
LCDDAT12
O
2
C
ISI_D9
I
1
E
FLEXCOM3_IO2
I/O
2
F
A7
O
2
A
LCDDAT13
O
2
C
ISI_D10
I
1
E
FLEXCOM3_IO1
I/O
2
F
A8
O
2
A
LCDDAT14
O
2
C
ISI_D11
I
1
E
FLEXCOM3_IO0
I/O
2
F
A9
O
2
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
–
PIO, I, PU, ST
Datasheet
DS60001521D-page 20
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Signal
7(2)
11(2)
170(2)
13(2)
173(2)
115(2)
114(2)
117(2)
118
120
VDDISC
VDDISC
VDDISC
VDDISC
VDDISC
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO
GPIO
GPIO
GPIO_CLK
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
© 2020 Microchip Technology Inc.
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Signal
–
–
–
–
–
–
–
–
–
–
Dir
Func
Signal
Dir
IO Set
A
LCDDAT15
O
2
C
ISI_PCK
I
1
E
FLEXCOM3_IO3
O
2
F
A10
O
2
A
LCDDAT18
O
2
C
ISI_VSYNC
I
1
E
FLEXCOM3_IO4
O
2
F
A11
O
2
A
LCDDAT19
O
2
C
ISI_HSYNC
I
1
F
A12
O
2
A
LCDDAT20
O
2
C
ISI_MCK
O
1
F
A13
O
2
A
LCDDAT21
O
2
C
ISI_FIELD
I
1
F
A14
O
2
A
LCDDAT22
O
2
D
CANTX1
O
1
F
A15
O
2
A
LCDDAT23
O
2
C
PCK1
O
2
D
CANRX1
I/O
1
F
A16
O
2
A
LCDPWM
O
2
B
FLEXCOM4_IO0
I/O
1
C
PCK2
O
1
F
A17
O
2
A
LCDDISP
O
2
B
FLEXCOM4_IO1
I/O
1
F
A18
O
2
A
LCDVSYNC
O
2
B
FLEXCOM4_IO2
I/O
1
F
A19
O
2
–
PIO, I, PU, ST
–
–
–
–
–
PIO, I, PU, ST
–
–
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
–
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
Datasheet
PIO, I, PU, ST
PIO, I, PU, ST
DS60001521D-page 21
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Signal
116
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO
Dir
PC31
I/O
Signal
–
Dir
Func
Signal
Dir
IO Set
A
LCDHSYNC
O
2
B
FLEXCOM4_IO3
O
1
C
URXD3
I
2
F
A20
O
2
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
Notes:
1. Fixed feature due to the SOM internal connection.
2. Limited feature compared to SAMA5D2 due to the SOM internal use of specific functionality, for example,
QSPI, GMAC.
3. Limited feature compared to SAMA5D2 due to the use of a part of the functionality for other features in the
SOM, for example, GMAC, ISC, Flexcom, etc.
4.2.4
PIOD Pin Description
Table 4-4. System-On-Module Pin Description: PIOD
Primary
Pad No.
Power Rail
Signal
121(2)
113(2)
23(2), (3)
24(2), (3)
27(2), (3)
21(2), (3)
22(2), (3)
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO_CLK
GPIO
GPIO_CLK
GPIO_AD
GPIO_AD
GPIO_AD
GPIO_AD
PD0
PD1
PD2
PD3
PD4
PD5
PD6
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Signal
–
–
–
PTCROW0
PTCROW1
PTCROW2
PTCROW3
Dir
Func
Signal
Dir
IO Set
A
LCDPCK
O
2
B
FLEXCOM4_IO4
O
1
C
UTXD3
O
2
F
A23
O
2
A
LCDDEN
O
2
F
A24
O
2
A
URXD1
I
1
F
A25
O
2
A
UTXD1
O
1
B
FIQ
I
2
F
NWAIT
I
2
A
TWD1
I/O
2
B
URXD2
I
1
F
NCS0
O
2
A
TWCK1
I/O
2
B
UTXD2
O
1
F
NCS1
O
2
B
PCK1
O
1
F
NCS2
O
2
–
PIO, I, PU, ST
–
PIO, I, PU, ST
–
–
–
–
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
PIO, I, PU, ST
–
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
25(2), (3)
VDDIN_3V3
GPIO_AD
PD7
I/O
PTCROW4
–
F
NWR1/NBS1
O
2
PIO, I, PU, ST
28(2), (3)
VDDIN_3V3
GPIO_AD
PD8
I/O
PTCROW5
–
F
NANDRDY
I
2
PIO, I, PU, ST
N/A(1)
VDDIN_3V3
GPIO_AD
PD9
I/O
–
–
D
GTXCK
O
2
PIO, I, PU, ST
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 22
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Alternate
PIO Peripheral
I/O Type
Signal
Dir
Signal
Dir
Func
Signal
Dir
IO Set
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
N/A(1)
VDDIN_3V3
GPIO_AD
PD10
I/O
–
–
D
GTXEN
O
2
PIO, I, PU, ST
N/A(1)
VDDIN_3V3
GPIO_AD
PD11
I/O
–
–
D
GRXDV
I
2
PIO, I, PU, ST
N/A(1)
VDDIN_3V3
GPIO_AD
PD12
I/O
–
–
D
GRXER
I
2
PIO, I, PU, ST
N/A(1)
VDDIN_3V3
GPIO_AD
PD13
I/O
–
–
D
GRX0
I
2
PIO, I, PU, ST
N/A(1)
VDDIN_3V3
GPIO_AD
PD14
I/O
–
–
D
GRX1
I
2
PIO, I, PU, ST
N/A(1)
VDDIN_3V3
GPIO_AD
PD15
I/O
–
–
D
GTX0
O
2
PIO, I, PU, ST
N/A(1)
VDDIN_3V3
GPIO_AD
PD16
I/O
–
–
D
GTX1
O
2
PIO, I, PU, ST
N/A(1)
VDDIN_3V3
GPIO_AD
PD17
I/O
–
–
D
GMDC
O
2
PIO, I, PU, ST
N/A(1)
VDDIN_3V3
GPIO_AD
PD18
I/O
–
–
D
GMDIO
I/O
2
PIO, I, PU, ST
A
PCK0
O
1
B
TWD1
I/O
3
C
URXD2
I
3
A
TIOA2
I/O
3
B
TWCK1
I/O
3
C
UTXD2
O
3
58(3)
57(3)
VDDIN_3V3
VDDIN_3V3
GPIO_AD
GPIO_AD
PD19
PD20
I/O
I/O
AD0
AD1
–
–
PIO, I, PU, ST
PIO, I, PU, ST
19(1)
VDDIN_3V3
GPIO_AD
PD21
I/O
–
–
B
TWD0
I/O
4
PIO, I, PU, ST
20(1)
VDDIN_3V3
GPIO_AD
PD22
I/O
–
–
B
TWCK0
I/O
4
PIO, I, PU, ST
30(3)
VDDIN_3V3
GPIO_AD
PD23
I/O
AD4
–
A
URXD2
I
2
PIO, I, PU, ST
29(3)
VDDIN_3V3
GPIO_AD
PD24
I/O
AD5
–
A
UTXD2
O
2
PIO, I, PU, ST
110
VDDIN_3V3
GPIO_AD
PD25
I/O
AD6
–
A
SPI1_SPCK
O
3
PIO, I, PU, ST
A
SPI1_MOSI
I/O
3
34
VDDIN_3V3
GPIO_AD
PD26
I/O
AD7
–
C
FLEXCOM2_IO0
I/O
2
A
SPI1_MISO
I/O
3
B
TCK
I
3
C
FLEXCOM2_IO1
I/O
2
A
SPI1_NPCS0
I/O
3
B
TDI
I
3
C
FLEXCOM2_IO2
I/O
2
A
SPI1_NPCS1
O
3
B
TDO
O
3
C
FLEXCOM2_IO3
O
2
D
TIOA3
I/O
3
53
51
52(2)
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
GPIO_AD
GPIO_AD
GPIO_AD
PD27
PD28
PD29
© 2020 Microchip Technology Inc.
I/O
I/O
I/O
AD8
AD9
AD10
–
–
PIO, I, PU, ST
–
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
Datasheet
DS60001521D-page 23
SAMA5D27 SOM1
Pinout
...........continued
Primary
Pad No.
Power Rail
Signal
54(2)
N/A(1)
VDDIN_3V3
VDDIN_3V3
Alternate
PIO Peripheral
I/O Type
GPIO_AD
GPIO_AD
PD30
PD31
Dir
I/O
Signal
AD11
I/O
–
Dir
Func
Signal
Dir
IO Set
A
SPI1_NPCS2
O
3
B
TMS
I
3
C
FLEXCOM2_IO4
O
2
D
TIOB3
I/O
3
C
IRQ
I
4
Reset State
(Signal, Dir, PU, PD, HiZ, ST)
–
PIO, I, PU, ST
–
PIO, I, PU, ST
Notes:
1. Fixed feature due to the SOM internal connection.
2. Limited feature compared to SAMA5D2 due to the SOM internal use of specific functionality, for example,
QSPI, GMAC.
3. Limited feature compared to SAMA5D2 due to the use of a part of the functionality for other features in the
SOM, for example, GMAC, ISC, Flexcom, etc.
4.2.5
System Pin Description
Table 4-5. System-On-Module Pin Description: System
Pin Number
PIO
Power Rail
Designation
Type
61
CLK_AUDIO
VDDIN_3V3
Audio clock
Output
64
COMPN
VDDBU
External analog comparator input
Input
63
COMPP
VDDBU
External analog comparator input
Input
126
DIS_BOOT
VDDIN_3V3
QSPI Interface Disable pin
Input
67
USBA_M
VDDIN_3V3
USB Device High-speed Data -
–
68
USBA_P
VDDIN_3V3
USB Device High-speed Data +
–
70
USBB_M
VDDIN_3V3
USB Host Port B High-speed Data -
–
71
USBB_P
VDDIN_3V3
USB Host Port B High-speed Data +
–
74
DATA
VDDHSIC
USB High-speed Inter-Chip Data
–
73
STROBE
VDDHSIC
USB High-speed Inter-Chip Strobe
–
60
NRST
VDDIN_3V3
Microprocessor reset
Input / Active Low
33
PIOBU1
VDDBU
Tamper or Wake-up input
Input
44
PIOBU2
VDDBU
Tamper or Wake-up input
Input
48
PIOBU3
VDDBU
Tamper or Wake-up input
Input
47
PIOBU4
VDDBU
Tamper or Wake-up input
Input
46
PIOBU5
VDDBU
Tamper or Wake-up input
Input
59
PIOBU6
VDDBU
Tamper or Wake-up input
Input
45
PIOBU7
VDDBU
Tamper or Wake-up input
Input
32
RXD
VDDBU
Low-Power Asynchronous Receiver
Input
35
SHDN
VDDBU
Shutdown Control
Output
49
WKUP
VDDBU
Wake-up
Input
36
ETH_LED0
VDDIN_3V3
Status LED control for Ethernet ports
Output
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 24
SAMA5D27 SOM1
Pinout
...........continued
4.2.6
Pin Number
PIO
Power Rail
Designation
Type
37
ETH_RXM
± 2.5V
Physical receive or transmit signal (– differential)
I/O
38
ETH_RXP
± 2.5V
Physical receive or transmit signal (+ differential)
I/O
40
ETH_TXM
± 2.5V
Physical receive or transmit signal (– differential)
I/O
41
ETH_TXP
± 2.5V
Physical receive or transmit signal (+ differential)
I/O
Power Pin Description
Table 4-6. System-On-Module Pin Description: Power
Pin Number
PIO
Description
Comments
16,17
VDDIN_3V3
Main 3.3V Supply inputs. Used for Peripheral
I/O lines and MIC2800-G1JJYML supplies.
–
55
VDDBU
Input supply for Slow Clock Oscillator, internal
32 kHz RC Oscillator and a part of the System
Controller
–
65
VDDSDHC
SDMMC I/O lines supply input
–
15
VDDISC
Image Sensor I/O lines supply input
–
1, 10, 18, 26, 31, 39,
42, 43, 50, 56, 62,
66, 69, 72, 75, 88,
89, 98, 107, 130,
131, 149, 166, 171,
176
GND
Ground connections
Must be connected together
129
RFU0
Reserved for future use
Must be left floating
147
RFU1
Reserved for future use
Must be left floating
153
RFU2
Reserved for future use
Must be left floating
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 25
SAMA5D27 SOM1
Functional Description
5.
Functional Description
5.1
SAMA5D27 System-In-Package
The SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5 processor-based
SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package.
By combining the high-performance, ultra-low power SAMA5D2 with DDR2-SDRAM in a single package, PCB routing
complexity, area and number of layers is reduced. This makes board design easier and lowers the overall cost of bill
of materials. Board design is more robust by facilitating design for EMI, ESD and signal integrity.
For more information about the SIP, see Reference Documents. This section lists the sole reference documents for
product information on the SAMA5D2 and the DDR2-SDRAM memory.
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package.
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in the following
schematics.
Figure 5-1. SAMA5D27C-D1G-CU Supplies Distribution Schematic
BLM03AX100SZ1
1
VDDIN_3V3
2
VDDIOP2
1
2
VDDIOP1
BLM03AX100SZ1
2
1
0R
100nF
2
1
4.7µF
100nF
VDDOSC
MLZ1608N100L
2
VDDUTMII
100nF
2.2R
100nF
100nF
VDDIOP0
100nF
1
100nF
10µF
BLM03AX100SZ1
BLM03AX100SZ1
1
2
BLM03AX100SZ1
© 2020 Microchip Technology Inc.
Datasheet
VDDAUDIOPLL
100nF
MLZ1608N100L
0R
GNDUTMII
2
VDDANA
100nF
1
4.7µF
2.2R
DS60001521D-page 26
SAMA5D27 SOM1
Functional Description
Figure 5-2. SAMA5D27C-D1G-CU Supplies Decoupling Schematic
VDDCORE
(1V25) D7
E9
H2
L12
P7
U3
100nF
100nF
100nF
100nF
100nF
100nF
1nF
1nF
1nF
1nF
1nF
1nF
10µF
VDDCORE
VDDIODDR
(1V8)
100nF
100nF
100nF
100nF
100nF
100nF
100nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
10µF
VDDIODDR
E8
E11
G12
H10
J8
L10
L14
U5
VDDBU
(3V3)
J5
K4
VDDIOP0
(3V3)
D4
F3
VDDIOP1
(3V3)
N12
P12
VDDIOP2
(3V3)
D9
(1V25)
R7
VDDANA
1
VDDCORE
2
VDDHSIC
BLM03AX100SZ1
VDDFUSE
VDDAUDIOPLL
BLM03AX100SZ1
1
2
VDDCORE
VDDUTMIC
VDDUTMII
(2V5)
N13
(3V3)
M4
(1V25)
M7
(3V3)
P6
N8
VDDSDHC
VDDCORE
2.2R
VDDOSC
1
2
MLZ1608N100L
VDDPLLA
(1V25)
R5
(3V3)
N6
H3
VDDISC
U2G
VDDCORE_1
VDDCORE_2
VDDCORE_3
VDDCORE_4
VDDCORE_5
VDDCORE_6
GNDCORE_1
GNDCORE_2
GNDCORE_3
GNDCORE_4
GNDCORE_5
GNDCORE_6
VDDIODDR_1
VDDIODDR_2
VDDIODDR_3
VDDIODDR_4
VDDIODDR_5
VDDIODDR_6
VDDIODDR_7
GNDIODDR_1
GNDIODDR_2
GNDIODDR_3
GNDIODDR_4
GNDIODDR_5
GNDIODDR_6
GNDIODDR_7
GNDBU
VDDBU
VDDANA_1
VDDANA_2
GNDANA_1
GNDANA_2
VDDIOP0_1
VDDIOP0_2
GNDIOP0_1
GNDIOP0_2
VDDIOP1_1
VDDIOP1_2
GNDIOP1_1
GNDIOP1_2
VDDIOP2_1
GNDIOP2_1
E12
F12
J11
K6
K7
K11
E10
F8
G10
H12
J9
K10
M14
U4
M1
J6
E3
F2
M12
P11
D6
VDDHSIC
VDDFUSE
GNDDPLL
VDDAUDIOPLL
GNDAUDIOPLL
VDDUTMIC
GNDUTMIC
VDDUTMII
GNDUTMII
VDDSDMMC
GNDSDMMC
VDDPLLA
GNDPLLA
VDDOSC
GNDOSC
VDDISC
GNDISC
T3
T4
R6
M6
GNDUTMII
R8
T5
P5
H5
100nF
100nF
100nF
100nF
100nF
100nF
4.7µF
100nF
100nF
4.7µF
100nF
SAMA5D27C-D1G-CU
Figure 5-3. SAMA5D27C-D1G-CU System Schematic
U2
U1
1
3
1
GND1
4
GND2
NX2016SA_24MHz
3
nRST
WKUP
2
100R
10K
Y1
12pF
50V
100R
12pF
50V
SHDN
RXD
CLK_AUDIO
T7
R3
R2
R4
T2
HHSDPB
HHSDMB
NRST
JTAGSEL
WKUP
TST
SHDN
N2
T8
RXD
CLK_AUDIO
ADVREFP
HHSDPDATC
HHSDMSTRC
VBG
COMPP
COMPN
PIOBU0
PIOBU1
PIOBU2
PIOBU3
PIOBU4
PIOBU5
PIOBU6
PIOBU7
USBA_P
USBA_M
U11
T11
USBB_P
USBB_M
T12
U12
DATA
STROBE
T6
U6
U7
P3
M3
P2
P4
N4
M5
N5
N3
100R
100R
COMPP
COMPN
LOWQ#
PIOBU1
PIOBU2
PIOBU3
PIOBU4
PIOBU5
PIOBU6
PIOBU7
10pF
25V
GNDUTMII
R &C
as close as possible
2
1
5.2
XIN32
XOUT32
U10
T10
SAMA5D27C-D1G-CU
NX2012SA_32-768KHz
8pF
50V
HHSDPA
HHSDMA
100R
L9
VDDANA
XIN
XOUT
5.62K
U9
U8
Y2
8pF
50V
Power Supplies
The SAMA5D27 SOM1 is supplied by an external 3.3V and generates its own internal supplies by interfacing with the
Microchip MIC2800-G1JJYML Power Management Unit.
The MIC2800 is a high-performance power management IC, providing three output voltages with maximum efficiency
and is optimized to respect the MPU power-up and power-down cycles.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 27
SAMA5D27 SOM1
Functional Description
Integrating a 2 MHz DC/DC converter with an LDO post regulator, the MIC2800 gives two high-efficiency outputs with
a second, 300mA LDO for maximum flexibility. The DC-to-DC converter uses small values of L and C to reduce board
space while still retaining efficiency over 90% at load currents up to 600mA.
The three outputs supply the following internal nodes:
• DCDC set @ 1.8V supplies SAMA5D27C-D1G-CU DDR2 pads and device.
• LDO1 set @ 1.25V supplies SAMA5D27C-D1G-CU Core.
• LDO2 set @ 2.5V supplies SAMA5D27C-D1G-CU VDDFUSE pad.
The MIC2800 is a μCap design, operating with very small ceramic output capacitors and inductors for stability.
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLF® lead-less package. For more information, refer
to the product web page.
Figure 5-4. Power Management Unit Schematic
VDDFUSE
VDDIN_3V3
VDDIN_3V3
10uF
56K
VDDIODDR
1
LOWQ#
14
2
13
100nF
10nF
SW
FB
EN1
MIC2800-G1JJYML
LDO
LDO1
LOWQ
CBYP
CBIAS
CSET
5.3
8
1
5
9
10
11
2.2uH
2
10uF
VDDIODDR
VDDCORE
2.2uF
4
100nF
EN2
TPAD
15
100K
LDO2
SGND
16
VIN1
VIN2
17
6
7
PGND
VDDBU
4.7uF
3
100nF
POR
12
10uF
nRST
System Control
The SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to the application board.
•
•
The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in
respect with power sequence timing. It can be forced externally in case of a system crash and must be
connected as described in the example schematic below.
The SHDN pin is an output pin and is managed by the software application. It switches the Main 3.3V Supply
ON or OFF.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 28
SAMA5D27 SOM1
Functional Description
Figure 5-5. Internal System Control Schematic
VDDIN_3V3
VDDBU
10K
100K
nRST
G2
3
D2
Q1
5
S2
4
D1
2
DMN26D0UDJ-7
G1
SHDN
6
S1
1
From SAMA5D27
5.4
Ethernet PHY
The Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T/100BASE-TX Ethernet physical-layer
transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair (UTP) cable.
The KSZ8081RNAIA is a highly-integrated PHY solution. The KSZ8081RNAIA offers the Reduced Media
Independent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors.
The KSZ8081RNAIA is available in 24-pin, lead-free QFN packages. For more information, refer to the product web
page.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 29
SAMA5D27 SOM1
Functional Description
Figure 5-6. Ethernet PHY Schematic
VDDIN_3V3
1K
U6
6
5
ETH_RXP
ETH_RXM
4
3
1
22
25
100nF
6.49K
9
ETH_XI
8
TXP
TXM
REF_CLK
TXD1
TXD0
TXEN
RXD1
RXD0
RXER
CRS_DV/PHYAD[1_0]
MDC
MDIO
INTRP
RXP
RXM
VDD_1V2
GND
PADDLE
REXT
VDDA_3V3
XI
GTXCK_PD09
GTX1_PD16
GTX0_PD15
GTXEN_PD10
GRX1_PD14
GRX0_PD13
GRXER_PD12
GRXDV_PD11
GMDC_PD17
GMDIO_PD18
ETH_INT_IRQ_PD31
2
4
1
7
2
VDDIO
XO
LED0/ANEN_SPEED
RST#
3
3
GND1
ETH_XO
NX2016SA_25MHz
1
GND2
2
1
22pF
50V
Y3
1K
16
21
20
19
12
13
17
15
11
10
18
10uF
100nF
10uF
100nF
VDDIN_3V3
10K
BLM18PG181SN1D
VDDIN_3V3
VDDIN_3V3
2.2uF
ETH_TXP
ETH_TXM
14
10K
23
ETH_LED0
24
nRST
0R
KSZ8081RNAIA
22pF
50V
5.5
QSPI Memory
The SAMA5D27 SOM1 embeds the SST26VF064BT-104I/MF, a 64Mb Serial Quad I/O Flash memory.
The SST26VF064BT-104I/MF SQI features a six-wire, 4-bit I/O interface that allows for low-power, high-performance
operation in a low pin-count package.
The SST26VF064BT-104I/MF is available in 8-lead WDFN package with 6mm × 5mm dimensions.
For more information, refer to the product web page.
Figure 5-7. QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
100nF
10K
DNP
10K
DNP
10K
DNP
10K
DNP
10K
DNP
100nF
22R
22R
22R
22R
22R
QSPI_IO0_PB07
QSPI_IO1_PB08
QSPI_IO2_PB09
QSPI_IO3_PB10
QSPI_SCK_PB05
5
2
3
7
6
SI/SIO0
VDD
SO/SIO1
VSS
WP#/SIO2
CE#
HOLD/SIO3
SCK
TPAD
8
4
1
5
QSPI_CS#
9
22R
22R
22R
22R
4
VCC
OE
OUT
IN
GND
SST26VF064BT-104I/MF
22R
10K
10K
10K
DNP
1
DIS_BOOT
2
QSPI_CS_PB06
3
22R
NL17SZ126DFT2G
PB07/TIOB2/PWMH3/QSPI1_IO0
PB08/TCLK3/PWML3/QSPI1_IO1
PB06/TIOA2/PWML2/QSPI1_CS
22R
PB09/TIOA3/PWMFI1/QSPI1_IO2
PB10/TIOB3/PWMEXTRG1/QSPI1_IO3
PB05/TCLK2/PWMH2/QSPI1_SCK
Tip: In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1, it is possible to
reassign the signals dedicated to QSPI memory to another PIO function as defined in the table below. To
do so, the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced to ground.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 30
SAMA5D27 SOM1
Functional Description
Table 5-1. Other GPIO Possibilities for QSPI Interface in Case of Non-use
Primary
Pin Number
134
127
133
128
132
135
PIO Peripheral
Power Rail
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
VDDIN_3V3
Reset State
Signal
Dir
Func
Signal
Dir
IOset
PB5
I/O
A
TCLK2
I
1
C
PWMH2
O
1
D
QSPI1_SCK
O
2
A
TIOA2
I/O
1
C
PWML2
O
1
D
QSPI1_CS
O
2
A
TIOB2
I/O
1
C
PWMH3
O
1
D
QSPI1_IO0
I/O
2
A
TCLK3
I
1
C
PWML3
O
1
D
QSPI1_IO1
I/O
2
A
TIOA3
I/O
1
C
PWMFI1
I
1
D
QSPI1_IO2
I/O
2
A
TIOB3
I/O
1
C
PWMEXTRG1
I
1
D
QSPI1_IO3
I/O
2
PB6
PB7
PB8
PB9
PB10
I/O
I/O
I/O
I/O
I/O
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
Tip: The QSPI interface can be shared with another external device. To do so, the QSPI_CS# node must
stay at "High" level. That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced to
ground.
5.6
EEPROM Memory
The SAMA5D27 SOM1 embeds the 24AA02E48T-I/OT, a 1Kb Serial EEPROM with pre-programmed EUI-48 MAC
address.
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface. The second block is
reserved for MAC Address storage.
The 24AA02E48T-I/OT also has a page write capability for up to 8 bytes of data.
The 24AA02E48T-I/OT is available in the standard 5-lead SOT-23 package. For more information, see the product
web page.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 31
SAMA5D27 SOM1
Functional Description
Figure 5-8. EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
100nF
5
2
NC
VSS
VCC
SCL
SDA
24AA02E48T-I/OT
4
2.2K
2.2K
1
3
EEPROM_TWCK_PD22
22R
EEPROM_TWD_PD21
22R
PD22/EEPROM_TWCK_PD22
22R
PD21/EEPROM_TWD_PD21
22R
Tip: The 2-Wire serial interface can be externally shared with another device. 2-Wire Data Signal
(SAMA5D27 SOM1 Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1 Pad 20) are used.
Important: If the 2-Wire serial interface is used externally, the device connected must have a different I²C
address than the embedded EEPROM. For more details, refer to the device data sheet.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 32
SAMA5D27 SOM1
Power Supply Connections and Timing ...
6.
Power Supply Connections and Timing Sequences
The SAMA5D27 SOM1 can be supplied in different ways depending on application needs.
Four power domains must be supplied and can be connected differently. The four different power connections are
described below:
• Power Configuration #1: All supplies are connected to the Main 3.3V Supply.
• Power Configuration #2: Backup domain is connected to a coin-cell and the rest to the Main 3.3V Supply.
• Power Configuration #3: Backup domain is connected to a coin-cell. Camera sensor is connected to a separate
power supply and the rest to the Main 3.3V Supply.
• Power Configuration #4: All supply domains are connected to separate power supplies.
For each power configuration, the power-on and power-off timing sequences to respect are described below.
Power Supply Configuration #1
The SAMA5D27 SOM1 is supplied by only one main supply.
In this configuration mode, all supplies are connected together and supplied by the main 3.3V supply. All PIOs have
VDDIN_3V3 Power Rail as voltage reference.
Figure 6-1. Power Configuration #1
3.3V
VDDIN_3V3
VDDBU
VDDISC
VDDSDHC
SHDN
SHDN
nRST
nRST
SAMA5D27-SOM1
6.1
In this configuration mode, the two following timing sequences are applied.
Figure 6-2. Power-On Sequence Timing Diagram
SYSTEM IS OFF
VDDIN_3V3
SYSTEM IS POWERED-UP
RESET IS RELEASED
a
MAIN 3.3V IS PRESENT
Tmain
VDDBU
VDDIN_3V3 LEVEL
VDDISC
c
VDDSDHC
d
INT_VDD
Tstart
VDDIN_3V3 LEVEL
VDDIN_3V3 LEVEL
e
Tpor
SHDN
VDDIN_3V3 LEVEL
f
nRST
© 2020 Microchip Technology Inc.
INTERNAL SUPPLIES GENERATION
Datasheet
DS60001521D-page 33
SAMA5D27 SOM1
Power Supply Connections and Timing ...
Figure 6-3. Power-Off Sequence Timing Diagram
SYSTEM IS ON
POWER-OFF PROCEDURE
VDDIN_3V3
VDDBU
VDDIN_3V3 LEVEL
VDDISC
VDDIN_3V3 LEVEL
VDDSDHC
VDDIN_3V3 LEVEL
INT_VDD
SOFTWARE
SYSTEM IS POWER-DOWN
SYSTEM IS OFF
c
MAIN 3.3V IS PRESENT
Tstop
Tmain_off
d
INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING
SHDN
a
SOFTWARE SHUTDOWN
Tsoft
SOFTWARE REQUEST
b
nRST
Table 6-1. Timing Values
Symbol Description
Min.
Typ.
Max.
Unit
Main 3.3V Start-up Time
–
–
1
ms
tstart
Internal Delay before starting System Core Supplies
1
–
3
ms
tpor
Power-on Reset Delay
–
10
11
ms
tsoft
Software Shutdown Time
tmain_off
Main 3.3V Power-off Time
–
–
1
ms
Internal Delay before switching off System Core Supplies
1
–
3
ms
tmain(1)
tstop
Depending on system off time
ms
Note:
1. The three supplies VDDIN_3V3, VDDISC and VDDSDHC must be applied at the same time. If a delay is
implemented, it must be lower than 800µs. VDDBU must be applied at the same time as VDDIN_3V3 or just
before. It is forbidden to apply VDDBU after VDDIN_3V3.
Power Supply Configuration #2
The SAMA5D27 SOM1 is supplied by different power supplies.
•
•
Backup domain is connected to a coin-cell supply.
The rest of the power inputs are connected to the main 3.3V supply.
In this configuration, the following PIOs have VDDBU Power Rail as reference. All other PIO have VDDIN_3V3
Power Rail as reference.
• COMPP and COMPN
• PIOBU1 to PIOBU7
• RXD, SHDN and WKUP
Figure 6-4. Power Configuration #2
3.3V
VDDIN_3V3
VDDBU
VDDISC
VDDSDHC
© 2020 Microchip Technology Inc.
SHDN
SHDN
nRST
nRST
Datasheet
SAMA5D27-SOM1
6.2
DS60001521D-page 34
SAMA5D27 SOM1
Power Supply Connections and Timing ...
In this configuration, the two following timing sequences are applied.
Figure 6-5. Power-On Sequence Timing Diagram
SYSTEM IN BACKUP
SYSTEM IS POWERED-UP
RESET IS RELEASED
b
VDDIN_3V3
MAIN 3.3V IS PRESENT
VDDBU
VDDBU ALWAYS PRESENT
VDDISC
c
VDDSDHC
d
Tstart
VDDIN_3V3 LEVEL
VDDIN_3V3 LEVEL
Tmain
INT_VDD
e
INTERNAL SUPPLIES GENERATION
Tpor
a
SHDN
VDDBU LEVEL / SOFTWARE RELEASE
f
nRST
Figure 6-6. Power-Off Sequence Timing Diagram
SYSTEM IS ON
POWER-OFF PROCEDURE
VDDIN_3V3
VDDBU
SYSTEM IN BACKUP
c
VDDBU ALWAYS PRESENT
VDDISC
VDDIN_3V3 LEVEL
VDDSDHC
VDDIN_3V3 LEVEL
INT_VDD
SOFTWARE
SYSTEM IS POWER-DOWN
MAIN 3.3V IS PRESENT
Tstop
Tmain_off
d
INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING
SHDN
a
SOFTWARE REQUEST
SOFTWARE SHUTDOWN
Tsoft
b
nRST
Table 6-2. Timing Values
Symbol Description
Min.
Typ.
Max.
Unit
Main 3.3V Start-up Time
–
–
1
ms
tstart
Internal Delay before starting System Core Supplies
1
–
3
ms
tpor
Power-on Reset Delay
–
10
11
ms
tsoft
Software Shutdown Time
tmain_off
Main 3.3V Power-off Time
–
–
1
ms
Internal Delay before switching-off System Core Supplies
1
–
3
ms
tmain(1)
tstop
Depending on system off time
ms
Note:
1. The three supplies VDDIN_3V3, VDDISC and VDDSDHC must be applied at the same time. If a delay is
implemented, it must be lower than tstart.
6.3
Power Supply Configuration #3
Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated power supplies.
•
•
•
Backup domain is connected to a coin cell.
Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the following
voltage levels (1.8V/2.5V/2.8V/3.0V or 3.3V) depending on the camera sensor technology used in the
application.
The remaining power inputs are connected to the main 3.3V supply.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 35
SAMA5D27 SOM1
Power Supply Connections and Timing ...
In this configuration, the following PIOs have:
• VDDBU Power Rail as reference
– COMPP and COMPN
– PIOBU1 to PIOBU7
– RXD, SHDN and WKUP
• VDDISC Power Rail as reference
– PC9 to PC25
• All other PIOs have VDDIN_3V3 Power Rail as reference.
Figure 6-7. Power Configuration #3
3.3V
VDDIN_3V3
SAMA5D27-SOM1
VDDBU
VDDISC
VDDSDHC
SHDN
SHDN
nRST
nRST
In this configuration mode, the two following timing sequences are applied.
Figure 6-8. Power-On Sequence Timing Diagram
SYSTEM IN BACKUP
WAKE UP
SYSTEM IS POWERED-UP
RESET IS RELEASED
b
VDDIN_3V3
MAIN 3.3V IS PRESENT
Ton1
VDDBU
VDDBU ALWAYS PRESENT
d
VDDISC
Tstart
EXTERNAL VDDISC LEVEL (1.8V/2.5V/2.8V/3.0V/3.3V)
c
VDDSDHC
VDDIN_3V3 LEVEL
Tmain
INT_VDD
e
INTERNAL SUPPLIES GENERATION
Tpor
a
SHDN
VDDBU LEVEL / SOFTWARE RELEASE
f
nRST
Figure 6-9. Power-Off Sequence Timing Diagram
SYSTEM IS ON
POWER-OFF PROCEDURE
VDDIN_3V3
VDDBU
VDDISC
Toff1
d
EXTERNAL VDDISC LEVEL (1.8V/2.5V/2.8V/3.0V/3.3V)
Tstop
Tmain_off
VDDIN_3V3 LEVEL
INT_VDD
e
INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING
SHDN
a
SOFTWARE REQUEST
SYSTEM IN BACKUP
c
VDDBU ALWAYS PRESENT
VDDSDHC
SOFTWARE
SYSTEM IS POWER-DOWN
MAIN 3.3V IS PRESENT
SOFTWARE SHUTDOWN
Tsoft
b
nRST
Table 6-3. Timing Values
Symbol Description
Min.
Typ.
Max.
Unit
Main 3.3V Start-up Time (From regulator available on the
motherboard)
–
–
1
ms
ton1
VDDISC Regulator Start-up Time (From regulator available on the
motherboard)
–
–
800
µs
tstart
Internal Delay before starting System Core Supplies
1
–
3
ms
tmain(1)
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 36
SAMA5D27 SOM1
Power Supply Connections and Timing ...
...........continued
Symbol Description
tpor
Power-on Reset Delay
tsoft
Software Shutdown Time
Min.
Typ.
Max.
Unit
–
10
11
ms
Depending on system off time
tmain_off Main 3.3V Power-off Time (From regulator available on the
motherboard)
ms
–
–
1
ms
toff1
VDDISC Regulator Power-off Time (From regulator available on the
motherboard)
–
–
1
ms
tstop
Internal Delay before switching off System Core Supplies
1
–
3
ms
Note:
1. The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time. If a delay is implemented, it must
be lower than tstart.
Power Supply Configuration #4
Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies.
•
•
•
•
Backup domain is connected to a coin cell.
Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the following
voltage levels (1.8V/2.5V/2.8V/3.0V or 3.3V) depending on the camera sensor technology used in the
application.
SD Card power input (VDDSDHC) is connected to a separate power supply set at one of the following voltage
levels (1.8V or 3.3V) depending on the SD Card Technology/Speed used in the application.
VDDIN_3V3 power input is connected to the main 3.3V supply.
In this configuration, the following PIOs have:
• VDDBU Power Rail as reference
– COMPP and COMPN
– PIOBU1 to PIOBU7
– RXD, SHDN and WKUP
• VDDISC Power Rail as reference
– PC9 to PC25
• VDDSDHC Power Rail as reference
– PA0 to PA10
• All other PIOs have VDDIN_3V3 Power Rail as reference.
Figure 6-10. Power Configuration #4
3.3V
VDDIN_3V3
VDDBU
SDMMC0_VDDSEL
VDDISC
VDDSDHC
© 2020 Microchip Technology Inc.
SHDN
SHDN
nRST
nRST
Datasheet
SAMA5D27-SOM1
6.4
DS60001521D-page 37
SAMA5D27 SOM1
Power Supply Connections and Timing ...
In this configuration mode, the two following timing sequences are applied.
Figure 6-11. Power-On Sequence Timing Diagram
SYSTEM IN BACKUP
WAKE UP
SYSTEM IS POWERED-UP
RESET IS RELEASED
b
VDDIN_3V3
MAIN 3.3V IS PRESENT
Ton1
VDDBU
VDDBU ALWAYS PRESENT
Ton2
d
VDDISC
EXTERNAL VDDISC LEVEL (1.8V/2.5V/2.8V/3.0V/3.3V)
Tstart
Tmain
VDDSDHC
c
DYNAMIC VDDSDHC LEVEL (3.3V)
DYNAMIC VDDSDHC LEVEL (1.8V)
g
SDMMC0_VDDSEL
e
INT_VDD
INTERNAL SUPPLIES GENERATION
Tsys
Tpor
a
SHDN
VDDBU LEVEL / SOFTWARE RELEASE
f
nRST
Figure 6-12. Power-Off Sequence Timing Diagram
SYSTEM IS ON
VDDIN_3V3
POWER-OFF PROCEDURE
SYSTEM IS POWER-DOWN
MAIN 3.3V IS PRESENT
Toff1
VDDBU
VDDBU ALWAYS PRESENT
VDDISC
EXTERNAL VDDISC LEVEL (1.8V/2.5V/2.8V/3.0V/3.3V)
VDDSDHC
SYSTEM IN BACKUP
c
VDDSDHC LEVEL (1.8V)
Tstop
d
VDDSDHC LEVEL (3.3V)
Toff2
e
Tmain_off
SDMMC0_VDDSEL
INT_VDD
f
INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE
SOFTWARE IS RUNNING
SHDN
a
SOFTWARE SHUTDOWN
SOFTWARE REQUEST
Tsoft
b
nRST
Table 6-4. Timing Values
Symbol
Description
Min.
Typ.
Max.
Unit
tmain
Main 3.3V Start-up Time (From regulator available on
the mother board)
–
–
1
ms
ton1
VDDISC Regulator Start-up Time (From regulator
available on the mother board)
–
–
800
µs
ton2
VDDSDHC Regulator Start-up Time (From regulator
available on the mother board)
–
–
800
µs
tstart
Internal Delay before starting System Core Supplies
1
–
3
ms
tpor
Power-on Reset Delay
–
10
11
ms
tsys
Low-speed to High-speed Card Timing(1)
Depending on system on
time
ms
tsoft
Software Shutdown Time
Depending on system off
time
ms
tmain_off
Main 3.3V Power-off Time (From regulator available
on the motherboard)
–
–
1
ms
toff1
VDDISC Regulator Power-off Time (From regulator
available on the motherboard)
–
–
1
ms
toff2
VDDSDHC Regulator Power-off Time (From regulator
available on the motherboard)
–
–
1
ms
tstop
Internal Delay before switching off System Core
Supplies
1
–
3
ms
Note:
1. Timing depends on the system boot time. No particular recommendations to apply.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 38
SAMA5D27 SOM1
Booting Guidelines
7.
Booting Guidelines
This section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it.
The SAMA5D27 SOM1 embeds a Quad I/O Flash Memory as a source for boot. Another type of NVM may be
located on the motherboard. This section explains how to program, select and boot from an NVM.
7.1
Boot Process
The system always boots from the ROM memory at address 0x0. The ROM code is a boot program contained in the
embedded ROM. It is also called “First level bootloader”. The SAMA5D2 can be configured to run a Standard Boot
mode or a Secure Boot mode. More information on how the Secure Boot mode can be enabled, and how the chip
operates in this mode, is provided in the document SAMA5D2x Secure Boot Strategy. To obtain this application note
and additional information about the secure boot and related tools, contact a Microchip sales representative.
By default, the chip starts in Standard Boot Mode.
The ROM code standard sequence is executed as follows:
• Basic chip initialization: crystal or external clock frequency detection.
• Attempt to retrieve a valid code from external non-volatile memories (NVM).
• Execution of a monitor called SAM-BA® Monitor, in case no valid application has been found on any NVM (1).
Note:
1. This may be the case during the first start-up or after an NVM erase or when a "boot disable jumper" is used
on the memory Chip Select, in order to force an update.
7.2
Boot Configuration
The boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backup registers
BUREG.
For details, refer to the section “Boot Configuration” of the SAMA5D2 Data Sheet, document no. DS60001476.
7.3
NVM Programming
The SAMA5D27 SOM1 is delivered with SAM-BA® In-System Programmer, a comprehensive tool to program boot
memories.
In case the boot code does not find a valid program in NVM, the SAM-BA monitor is launched in order to program the
considered NVM.
The SAM-BA monitor principle is to:
• Initialize DBGU and USB.
• Check if USB Device enumeration occurred.
• Check if characters are received on the DBGU.
Once the communication interface is identified, the application runs in an infinite loop waiting for different commands.
The firmware can be sent and programmed in the NVM.
For more information, refer to the following link: www.at91.com/linux4sam/bin/view/Linux4SAM/
Sama5d2XplainedMainPage#Using_SAM_BA_to_flash_components.
7.4
Boot From External Memory
Several types of external memories such as NAND Flash, SDCard, SPI Flash, QSPI Flash, etc. can be connected to
the SAMA5D27 SOM1 and placed on the motherboard.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 39
SAMA5D27 SOM1
Booting Guidelines
For details of the Boot sequence, refer to the "NVM Bootloader Program Description for MRL C Parts" diagram of the
SAMA5D2 data sheet, document no. DS60001476.
The table below provides the list of external memory types and interfaces that may be used to boot the SAMA5D27
SOM1:
Table 7-1. External Memory Connections
Memory Type
Interface
PIO
Comments
SDMMC0
PA0 to PA13
If external SDMMC0 interface is not used, bit
SDMMC_0 in Boot Configuration Word must be
set to 1.
SDMMC1
PA18 to PA22, PA27 to
PA30
If external SDMMC1 Interface is not used, bit
SDMMC_1 in Boot Configuration Word must be
set to 1.
SDMMC0
PA0 to PA10, PA13
If external SDMMC0 Interface is not used, bit
SDMMC_0 in Boot Configuration Word must be
set to 1.
SDMMC1
PA18 to PA22, PA27,
PA30
If external SDMMC0 interface is not used, bit
SDMMC_1 in Boot Configuration Word must be
set to 1.
PA0 to PA12
Field NFC in Boot Configuration Word must be
set to "01". IOSET2 is selected. (See Notes below)
PA22 to PA31, PB0 to
PB2, PC8
Field NFC in Boot Configuration Word must be
set to "00". IOSET1 is selected. (See Notes below)
PA0 to PA5
Field QSPI_0 in Boot Configuration Word must
be set to "00". IOSET1 is selected. (See Notes
below)
PA14 to PA19
Field QSPI_0 in Boot Configuration Word must
be set to "01". IOSET2 is selected. (See Notes
below)
PA22 to PA27
Field QSPI_0 in Boot Configuration Word must
be set to "10". IOSET3 is selected. (See Notes
below)
PB5 to PB10
Need to tie DIS-BOOT pin to GND. Bits QSPI_1 in
Boot Configuration Word must be set to "01".
IOSET2 is selected. (See Notes below)
PA14 to PA17
Bits SPI_0 in Boot Configuration Word must be
set to "00". IOSET1 is selected. (See Notes below)
PA30, PA31, PB0, PB1
Bits SPI_0 in Boot Configuration Word must be
set to "01". IOSET2 is selected. (See Notes below)
PA22 to PA25
Bits SPI_1 in Boot Configuration Word must be
set to "01". IOSET2 is selected. (See Notes below)
PC1 to PC4
Bits SPI_1 in Boot Configuration Word must be
set to "00". IOSET1 is selected. (See Notes below)
SDCard
eMMC
NAND Flash
NFC
QSPI0
QSPI Flash
QSPI1
SPI0
SPI Flash
SPI1
Note: For these external memory configurations, set the EXT_MEM_BOOT_ENABLE bit to "1" in Boot
Configuration Word.
Note: The Boot Configuration Word allows several customizations of the boot sequence. For details, refer to the
section "Boot Configuration" in the SAMA5D2 Data Sheet, document no. DS60001476.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 40
SAMA5D27 SOM1
Debug Considerations
8.
Debug Considerations
The SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence. It is re-enabled
when jumping into SRAM when a valid code has been found on an external NVM, at the same time the ROM memory
and fuses are hidden. If no valid boot is found on an external NVM, the ROM code
• enables the USB connection and one UART serial port
• starts the standard SAM-BA monitor
• locks access to the ROM memory
• re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings. For more information, refer to the SAMA5D2 Data
Sheet, document no. DS60001476, “SECUMOD JTAG Protection Control Register”, "Customer Fuse Matrix" and
"Special Function Bits".
The JTAG I/O set can be configured. For correct operations, the I/O set to be used is JTAG_IOSET_3, i.e., the field
JTAG_IO_SET in the Boot Configuration Word must be written with value '2'.(1)
Note: Due to IO conflict on line PA22, JTAG_IOSET_4 must not be implemented when SDMMC1 is used as an
NVM boot media. See the SAMA5D2 Data Sheet, document no. DS60001476, “Boot Configuration Word”.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 41
SAMA5D27 SOM1
Electrical Characteristics
9.
Electrical Characteristics
This section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 module. Absolute
maximum ratings for the SAMA5D27 SOM1 module are listed below. Exposure to these maximum rating conditions
for extended periods may affect device reliability. Functional operation of the module at these or any other conditions,
above the parameters indicated in the operation listings of this specification, is not implied.
9.1
Absolute Maximum Ratings
Table 9-1. Absolute Maximum Ratings
Parameter
Conditions
Min.
Max.
Storage Temperature
–
-60°C
+150°C
Maximum Operating Temperature
–
-40°C
+85°C
Voltage on Inputs Pins
With respect to ground
-0.3V
+4.0V
On VDDIN_3V3 Pads
–
+4.0V
On VDDBU Pad
–
+4.0V
On VDDSDHC Pad
–
+4.0V
On VDDISC Pad
–
+4.0V
Maximum Voltage
Important: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these or other
conditions beyond those indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect device reliability.
9.2
Operational Characteristics
The following characteristics are applicable to the operating temperature range TA = -40°C to +85°C, unless
otherwise specified.
Table 9-2. Table 7. Power Supplies Operating Conditions
Pad
VDDIN_3V3
VDDBU
VDDSDHC
Parameters
Conditions
Min.
Typ.
Max.
DC Supply
–
3.0V
3.3V
3.6V
Maximum Input
Current
–
–
–
450mA
DC Supply
Must be established first or at the
same time as VDDIN_3V3.
1.65V
3.3V
3.6V
Maximum Input
Current
–
–
–
0.1 mA
DC Supply
SDHC I/Os Lines
1.65V
3.3V
3.6V
Maximum Input
Current
–
–
–
30mA
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 42
SAMA5D27 SOM1
Electrical Characteristics
...........continued
Pad
VDDISC
9.3
9.3.1
Parameters
Conditions
DC Supply
ISC I/Os Lines
Maximum Input
Current
–
Min.
Typ.
Max.
1.65V
3.3V
3.6V
–
–
30mA
DC Electrical Characteristics
Standard Interfaces
The following characteristics are applicable to the operating temperature range TA = -40°C to +85°C, unless
otherwise specified.
Table 9-3. DC Electrical Characteristicsfor GPIO Inputs
Pad
Parameters
Conditions
Min.
Typ.
Max.
VIL
Low-level Input
Voltage
All GPIO @ 3.3V
-0.3V
–
0.4V
VIH
High-level Input
Voltage
All GPIO @ 3.3V
2.3V
–
3.6V
VOL
Low-level Output
Voltage
IO Max.
–
–
0.41V
VOH
High-level Output
Voltage
IO Max.
2.9V
–
--
IIL
Low-level Input
Current
All GPIO @ 3.3V
-1µA
–
1µA
IIH
High-level Input
Current
All GPIO @ 3.3V
-1µA
–
1µA
IOL
Low-level Output
Current
All GPIO @ 3.3V / Low
-2mA
–
--
All GPIO @ 3.3V / High
-32mA
–
--
IOH
High-level Output
Current
All GPIO @ 3.3V / Low
–
–
2mA
All GPIO @ 3.3V / High
–
–
32mA
RPULLUP
Pull-up Resistors
All GPIO @ 3.3V and PDxx in AD
mode.
280kΩ
380kΩ
480kΩ
All IOs in GPIO mode @3.3V.
40kΩ
66kΩ
130kΩ
280 kΩ
380kΩ
480kΩ
40kΩ
77kΩ
160kΩ
RPULLDOWN
Pull-down Resistors
All GPIO @ 3.3V and PDxx in AD
mode
All IOs in GPIO mode @3.3V.
Note: This table applies to all the following pads: PA0–PA31, PB0–PB31, PC0–PC31, PD0–PD8, PD19-PD30.
9.3.2
Other PIOs
The following characteristics are applicable to the operating temperature range TA = -40°C to +85°C, unless
otherwise specified.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 43
SAMA5D27 SOM1
Electrical Characteristics
Table 9-4. Table 7. DC Electrical Characteristics for System Inputs
Pad
Parameters
Conditions
Min.
Typ.
Max.
VIL
Low-level Input
Voltage
DIS_BOOT
–
–
1.0V
VIH
High-level Input
Voltage
DIS_BOOT
2.3V
–
–
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 44
SAMA5D27 SOM1
Mechanical Characteristics
Module Dimensions
The SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listed below.
Figure 10-1. System-On-Module Dimensions
E1
PIN 1 CORNER
S
131
132
133
140
134
137
135
136
143
141
142
144
138
139
146
145
152
149
147
148
150
151
158
153
154
161
159
160
155
162
156
157
164
163
171
170
167
165
166
172
174
173
168
169
175
176
E2
1
130
2
129
3
128
4
127
5
126
6
7
124
8
123
9
10
122
121
11
120
125
12
119
118
13
117
15
116
16
115
17
114
18
113
19
112
20
111
21
110
22
109
23
108
24
25
106
26
105
27
28
104
103
29
102
aaa
P1t
107
30
101
31
100
99
32
33
98
34
97
35
96
86
P2
82
70
59
54
51
47
48
183
184
180
(TP8)
(TP4)
91
(TP7)
186
e
(TP10)
31
182
27
26
25
(TP9)
aaa
179
P1b
(TP3)
D
(TP6)
185
A1
P2Eb
E
41
nx
ff
88
87
84
83
82
85
81
80
79
78
75
77
76
74
72
69
71
70
68
73
66
67
65
63
64
62
60
57
59
58
56
55
61
54
89
53
90
42
52
91
41
51
40
50
92
45
93
39
48
49
38
47
94
46
95
37
44
36
43
D1
14
D2
TOP VIEW
178
177
9
8
181
(TP2)
(TP1)
4
P2
155
173
(TP5)
170
10.1
Mechanical Characteristics
BOTTOM VIEW
10.
jjj x m
jjj
P2Ea
f fxn
ff
B
SAMA5D27-SOM1 DIMENSIONS
176
40 x 38 x 2.80
0.8
mm
Pads :
Body :
Pads Pitch :
Units:
Drawn by : R C R
SAMA5D27-SOM1_POD
A11
02/05/2017
Table 10-1. System-On-Module Dimensions
Symbol
Common Dimensions
Min.
Typ.
Max.
Comments
X
E
--
40.000
40.100
–
Y
D
--
38.000
38.100
–
Pad Pitch
e
--
0.800
--
–
PCB Thickness
S
1.150
1.200
1.250
–
Total Thickness
A1
--
2.750
2.800
–
PCB Angle Hole Diameter(1)
B
–
0.200
–
–
Bottom Side
P1b
–
1.500
–
–
Top Side
P1t
–
0.800
–
–
Body Size
Pad Length(1)
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 45
SAMA5D27 SOM1
Mechanical Characteristics
...........continued
Symbol
Pad Width(1)
P2
Pad Space(1)
aaa
Opening Drilling Diameter
Common Dimensions
Min.
–
–
Pad Count
Pad Axis to Edge(1)
0.600
0.200
–
φff
Edge Center to Center
Typ.
Comments
Max.
–
Solder Mask
defined 0.550
–
–
–
0.400 typic
minus
metallization
0.400
n
–
176
–
–
X
E1
37.550
37.630
37.700
–
Y
D1
34.400
34.480
34.550
–
X
E2
35.550
35.630
35.700
–
Y
D2
32.400
32.480
32.550
–
X
P2Ea
–
2.000
–
–
Y
P2Eb
–
2.600
–
–
Note:
1. Tolerances are defined upon:
– IPC A600 - Class2
– IPC 2615
WARNING
10.2
Test points placed on the bottom side are used for factory test only. It is not possible to connect external
devices on these test points.
Module Land Pattern
The SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 46
SAMA5D27 SOM1
Mechanical Characteristics
Figure 10-2. System-On-Module Land Pattern
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
k
S2
W
L
Pads :
Body :
Pads Pitch :
Units:
WARNING
SAMA5D27-SOM1 DIMENSIONS
176
40 x 38 x 2.80
0.8
mm
Drawn by : R C R
SAMA5D27-SOM1_POD
A11
02/05/2017
Do not place vias, copper or signals in the S1-S2 area on the top PCB layer of the motherboard. Copper
and low-speed signals may be used on inner and opposite layers.
Table 10-2. System-On-Module Land Pattern Dimensions
Symbol
Common Dimensions
Min.
Typ.
Max.
Comments
Land Pattern Pad Width
W
–
0.600
–
Solder Mask
Defined 0.550
Land Pattern Pad Length
L
–
2.000
–
–
Land Pattern Pad X Space
S1
–
37.000
–
–
Land Pattern Pad Y Space
S2
–
35.000
–
–
k
–
0.200
–
–
Land Pattern Pad Space
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 47
SAMA5D27 SOM1
Production Settings
11.
Production Settings
11.1
Bake Information
The SAMA5D27-SOM1 module is rated MSL 3, indicating that storage and assembly processes must be compliant
with IPC/JEDEC J-STD-033C.
The SAMA5D27-SOM1 module has a total thickness of 2.750 mm (PCB and SMD mounted) and is comparable to a
die package. Thus baking instructions must comply with Table 4-1 of J-STD-033-C as a package body comprised
between 2.0mm and 4.5mm.
Refer to the highlighted information in the table below.
IPC/JEDEC J-STD-033C
February 2012
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMD
Packages (User Bake: Floor life begins counting at time = 0 after bake)
Bake @ 125 °C +10/-0 °C
Package Body
Thickness
≤1.4 mm
Thickness
>1.4 mm
≤2.0 mm
Thickness
>2.0 mm
≤4.5 mm
BGA package
>17 mm x 17 mm
or any stacked
die package
Level
Exceeding
Floor Life
by >72 h
Exceeding
Floor Life
by ≤72 h
Bake @ 90 °C +8/-0 °C
≤5% RH
Exceeding
Floor Life
by >72 h
Exceeding
Floor Life
by ≤72 h
Bake @ 40 °C +5/-0 °C
≤5% RH
Exceeding
Floor Life
by >72 h
Exceeding
Floor Life
by ≤72 h
2
5 hours
3 hours
17 hours
11 hours
8 days
5 days
2a
7 hours
5 hours
23 hours
13 hours
9 days
7 days
3
9 hours
7 hours
33 hours
23 hours
13 days
9 days
4
11 hours
7 hours
37 hours
23 hours
15 days
9 days
5
12 hours
7 hours
41 hours
24 hours
17 days
10 days
5a
16 hours
10 hours
54 hours
24 hours
22 days
10 days
2
18 hours
15 hours
63 hours
2 days
25days
20 days
2a
21 hours
16 hours
3 days
2 days
29 days
22 days
3
27 hours
17 hours
4 days
2 days
37 days
23 days
4
34 hours
20 hours
5 days
3 days
47 days
28 days
5
40 hours
25 hours
6 days
4 days
57 days
35 days
5a
48 hours
40 hours
8 days
6 days
79 days
56 days
2
48 hours
48 hours
10 days
7 days
79 days
67 days
2a
48 hours
48 hours
10 days
7 days
79 days
67 days
3
48 hours
48 hours
10 days
8 days
79 days
67 days
4
48 hours
48 hours
10 days
10 days
79 days
67 days
5
48 hours
48 hours
10 days
10 days
79 days
67 days
5a
48 hours
48 hours
10 days
10 days
79 days
67 days
2-5a
96 hours
(See Note 2)
As above
per package
thickness and
moisture level
Not applicable
As above
per package
thickness and
moisture level
Not applicable
As above
per package
thickness and
moisture level
Note 1: Table 4-1 is based on worst-case molded lead frame SMD packages. Users may reduce the actual bake time if technically justified (e.g., absorption/
desorption data, etc.). In most cases it is applicable to other nonhermetic surface mount SMD packages. If parts have been exposed to >60% RH it
may be necessary to increase the bake time by tracking desorption data to ensure parts are dry.
Note 2: For BGA packages >17 mm x 17 mm, that do not have internal planes that block the moisture diffusion path in the substrate, may use bake times
based on the thickness/moisture level portion of the table.
Note 3: If baking of packages >4.5 mm thick is required see appendix B.
11.2
Reflow Profile
The SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPC/JEDEC J-STD-020E. We
recommend a maximum of two soldering processes.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 48
SAMA5D27 SOM1
Production Settings
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solder reflow profile. To
avoid damage to the module, follow the JEDEC recommendations as well as those listed below:
• Do not exceed the peak temperature (Tp) of 245ºC.
• Refer to the solder paste data sheet for specific reflow profile recommendations.
• Use no-clean flux solder paste.
• Use only one flow. If the PCB requires multiple flows, mount the module at the time of the final flow.
Figure 11-1. Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1
Board
-
Supplier Tp > Tc
-
User Tp < Tc
Tc
Supplier tp
Tc -5°C
User tp
Te m p e r a t u r e
Tp
tp
Max. Ramp Up Rate = 3°C/s
Max. Ramp Down Rate = 6°C/s
TL
Tsmax
Tc -5°C
tL
Preheat Area
Tsmin
ts
25
Time 25°C to Peak
Time
IPC-020e-5-1
Profile Feature
J-STD-020E Profile
Temperature Min
Tsmin
150°C
Temperature Max
Tsmax
200°C
Temperature Rise
ts (from Tsmin to Tsmax)
60 to 120 seconds
Ramp-up Rate
TL to Tp
3°C/sec.max
Liquidous Temperature Time maintained above 217°C
TL
60 to 150 seconds
Peak Temperature
Tp
245°C
Time (tp) within 5°C of the specified classification temperature (Tc)
30 seconds
Ramp-down rate
6°C/second max
Tp to TL
Time 25°C to peak temperature
© 2020 Microchip Technology Inc.
8 minutes max
Datasheet
DS60001521D-page 49
SAMA5D27 SOM1
Ordering Information
12.
Ordering Information
Table 12-1. Ordering Information
Ordering Code
Version
Package
Carrier Type
Operating Temperature
Range
ATSAMA5D27-SOM1
1
176-pin 38x40mm
Tray
-40°C to +85°C
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 50
SAMA5D27 SOM1
Revision History
13.
Revision History
Table 13-1. SAMA5D27 SOM1 Data Sheet, Rev. DS60001521D, June-2020
Changes
Description and Block Diagram: updated number of ADC inputs.
Pinout Overview: updated figure.
Pin List: updated PIO muxing tables for PIOA, PIOB, PIOC and PIOD.
Table Other GPIO Possibilities for QSPI Interface in Case of Non-use: updated primary signal column.
Table External Memory Connections: updated eMMC and NAND Flash.
Table 13-2. SAMA5D27 SOM1 Data Sheet, Rev. DS60001521C, Oct-2018
Changes
Deleted all references to PTC in Features, Block Diagram, Pinout Overview and Pin List.
Editorial corrections throughout.
Table 13-3. SAMA5D27 SOM1 Data Sheet, Rev. DS60001521B, Feb-2018
Changes
Features: added PTC support and LCD interface.
Applications: updated list.
1. Description: added PTC support.
2. Reference Documents: corrected datasheet cross-reference.
Pinout Overview: updated figure with correct color key.
SAMA5D27C-D1G-CU Supplies Decoupling Schematic: updated all occurrences of 1V2 to 1V25.
5.1 SAMA5D27 System-In-Package: removed table "SAMA5D27C-D1G-CU External Crystal".
5.2 Power Supplies: LDO1 output changed to 1.25V
5.4 Ethernet PHY: removed table "KSZ8081RNAIA External Crystal".
QSPI Memory Schematic: updated QSPI memory reference.
5.6 EEPROM Memory: updated Important Note.
10.2 Module Land Pattern: added Warning.
Added 11. Production Settings.
Updated 11.2 Reflow Profile.
Updated 12. Ordering Information.
Table 13-4. SAMA5D27 SOM1 Data Sheet, Rev. DS60001521A, Oct-2017
Changes
First issue.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 51
SAMA5D27 SOM1
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© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 52
SAMA5D27 SOM1
Product Identification System
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
ATSAMA5
D27 - SOM1
Architecture
Product Group
System on Module
Version
Architecture:
SAMA5
Product Group:
D27
System on Module:
SOM
Version:
1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices:
•
•
•
•
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today,
when used in the intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these
methods, to our knowledge, require using the Microchip products in a manner outside the operating
specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of
intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code
protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection
features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital
Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you
may have a right to sue for relief under that Act.
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use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless
otherwise stated.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 53
SAMA5D27 SOM1
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The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime,
BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox,
KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST,
MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer,
QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,
TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control,
HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus,
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CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM,
dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP,
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I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense,
ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of
Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their respective companies.
©
2020, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 978-1-5224-6118-0
AMBA, Arm, Arm7, Arm7TDMI, Arm9, Arm11, Artisan, big.LITTLE, Cordio, CoreLink, CoreSight, Cortex, DesignStart,
DynamIQ, Jazelle, Keil, Mali, Mbed, Mbed Enabled, NEON, POP, RealView, SecurCore, Socrates, Thumb,
TrustZone, ULINK, ULINK2, ULINK-ME, ULINK-PLUS, ULINKpro, µVision, Versatile are trademarks or registered
trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere.
Quality Management System
For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality.
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 54
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
www.microchip.com/support
Web Address:
www.microchip.com
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Austin, TX
Tel: 512-257-3370
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Novi, MI
Tel: 248-848-4000
Houston, TX
Tel: 281-894-5983
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Tel: 317-536-2380
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Tel: 951-273-7800
Raleigh, NC
Tel: 919-844-7510
New York, NY
Tel: 631-435-6000
San Jose, CA
Tel: 408-735-9110
Tel: 408-436-4270
Canada - Toronto
Tel: 905-695-1980
Fax: 905-695-2078
Australia - Sydney
Tel: 61-2-9868-6733
China - Beijing
Tel: 86-10-8569-7000
China - Chengdu
Tel: 86-28-8665-5511
China - Chongqing
Tel: 86-23-8980-9588
China - Dongguan
Tel: 86-769-8702-9880
China - Guangzhou
Tel: 86-20-8755-8029
China - Hangzhou
Tel: 86-571-8792-8115
China - Hong Kong SAR
Tel: 852-2943-5100
China - Nanjing
Tel: 86-25-8473-2460
China - Qingdao
Tel: 86-532-8502-7355
China - Shanghai
Tel: 86-21-3326-8000
China - Shenyang
Tel: 86-24-2334-2829
China - Shenzhen
Tel: 86-755-8864-2200
China - Suzhou
Tel: 86-186-6233-1526
China - Wuhan
Tel: 86-27-5980-5300
China - Xian
Tel: 86-29-8833-7252
China - Xiamen
Tel: 86-592-2388138
China - Zhuhai
Tel: 86-756-3210040
India - Bangalore
Tel: 91-80-3090-4444
India - New Delhi
Tel: 91-11-4160-8631
India - Pune
Tel: 91-20-4121-0141
Japan - Osaka
Tel: 81-6-6152-7160
Japan - Tokyo
Tel: 81-3-6880- 3770
Korea - Daegu
Tel: 82-53-744-4301
Korea - Seoul
Tel: 82-2-554-7200
Malaysia - Kuala Lumpur
Tel: 60-3-7651-7906
Malaysia - Penang
Tel: 60-4-227-8870
Philippines - Manila
Tel: 63-2-634-9065
Singapore
Tel: 65-6334-8870
Taiwan - Hsin Chu
Tel: 886-3-577-8366
Taiwan - Kaohsiung
Tel: 886-7-213-7830
Taiwan - Taipei
Tel: 886-2-2508-8600
Thailand - Bangkok
Tel: 66-2-694-1351
Vietnam - Ho Chi Minh
Tel: 84-28-5448-2100
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4485-5910
Fax: 45-4485-2829
Finland - Espoo
Tel: 358-9-4520-820
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany - Garching
Tel: 49-8931-9700
Germany - Haan
Tel: 49-2129-3766400
Germany - Heilbronn
Tel: 49-7131-72400
Germany - Karlsruhe
Tel: 49-721-625370
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Germany - Rosenheim
Tel: 49-8031-354-560
Israel - Ra’anana
Tel: 972-9-744-7705
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Italy - Padova
Tel: 39-049-7625286
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Norway - Trondheim
Tel: 47-72884388
Poland - Warsaw
Tel: 48-22-3325737
Romania - Bucharest
Tel: 40-21-407-87-50
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Sweden - Gothenberg
Tel: 46-31-704-60-40
Sweden - Stockholm
Tel: 46-8-5090-4654
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
© 2020 Microchip Technology Inc.
Datasheet
DS60001521D-page 55
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