Atmel SAM D11
SMART ARM-Based Microcontroller
DATASHEET
Description
The Atmel® | SMART™ SAM D11 is a series of low-power microcontrollers using the 32-bit
ARM® Cortex®-M0+ processor, and ranging from 14- to 24-pins with 16KB Flash and 4KB of
SRAM. The SAM D11 devices operate at a maximum frequency of 48MHz and reach
2.46 Coremark/MHz. They are designed for simple and intuitive migration with identical
peripheral modules, hex compatible code, identical linear address map and pin compatible
migration paths between all devices in the product series. All devices include intelligent and
flexible peripherals, Atmel Event System for inter-peripheral signaling, and support for capacitive
touch button, slider and wheel user interfaces. The SAM D11 series is compatible to the other
product series in the SAM D family, enabling easy migration to larger device with added features.
The Atmel SAM D11 devices provide the following features: In-system programmable Flash, sixchannel direct memory access (DMA) controller, 6 channel Event System, programmable
interrupt controller, up to 22 programmable I/O pins, 32-bit real-time clock and calendar, two 16bit Timer/Counters (TC) and one 24-bit Timer/Counter for Control (TCC), where each TC can be
configured to perform frequency and waveform generation, accurate program execution timing or
input capture with time and frequency measurement of digital signals. The TCs can operate in 8or 16-bit mode, selected TCs can be cascaded to form a 32-bit TC, and one timer/counter has
extended functions optimized for motor, lighting and other control applications. The series provide
one full-speed crystal-less USB 2.0 device interface; up to three Serial Communication Modules
(SERCOM) that each can be configured to act as an USART, UART, SPI, I2C up to 3.4MHz,
SMBus, PMBus and LIN slave; up to 10-channel 350ksps 12-bit ADC with programmable gain
and optional oversampling and decimation supporting up to 16-bit resolution, one 10-bit 350ksps
DAC, two analog comparators with window mode, Peripheral Touch Controller supporting up to
72 buttons, sliders, wheels and proximity sensing; programmable Watchdog Timer, brown-out
detector and power-on reset and two-pin Serial Wire Debug (SWD) program and debug interface.
All devices have accurate and low-power external and internal oscillators. All oscillators can be
used as a source for the system clock. Different clock domains can be independently configured
to run at different frequencies, enabling power saving by running each peripheral at its optimal
clock frequency, and thus maintaining a high CPU frequency while reducing power consumption.
The SAM D11 devices have two software-selectable sleep modes, idle and standby. In idle mode
the CPU is stopped while all other functions can be kept running. In standby all clocks and
functions are stopped expect those selected to continue running. The device supports
SleepWalking. This feature allows the peripheral to wake up from sleep based on predefined
conditions, and thus allows the CPU to wake up only when needed, e.g. when a threshold is
crossed or a result is ready. The Event System supports synchronous and asynchronous events,
allowing peripherals to receive, react to and send events even in standby mode.
The Flash program memory can be reprogrammed in-system through the SWD interface. The
same interface can be used for non-intrusive on-chip debug and trace of application code. A boot
loader running in the device can use any communication interface to download and upgrade the
application program in the Flash memory.
The Atmel SAM D11 devices are supported with a full suite of program and system development
tools, including C compilers, macro assemblers, program debugger/simulators, programmers and
evaluation kits.
Atmel-42363H-SAM-D11-Datasheet_09/2016
SMART
Features
z Processor
z ARM Cortex-M0+ CPU running at up to 48MHz
z Single-cycle hardware multiplier
z Micro Trace Buffer
z Memories
z 16KB in-system self-programmable Flash
z 4KB SRAM Memory
z System
z Power-on reset (POR) and brown-out detection (BOD)
z Internal and external clock options with 48MHz Digital Frequency Locked Loop (DFLL48M) and 48MHz to 96MHz Fractional
Digital Phase Locked Loop (FDPLL96M)
z External Interrupt Controller (EIC)
z 8 external interrupts
z One non-maskable interrupt
z Two-pin Serial Wire Debug (SWD) programming, test and debugging interface
z Low Power
z Idle and standby sleep modes
z SleepWalking peripherals
z Peripherals
z 6-channel Direct Memory Access Controller (DMAC)
z 6-channel Event System
z Two 16-bit Timer/Counters (TC), configurable as either:
z One 16-bit TC with compare/capture channels
z One 8-bit TC with compare/capture channels
z One 32-bit TC with compare/capture channels, by using two TCs
z One 24-bit Timer/Counters for Control (TCC), with extended functions:
z Up to four compare channels with optional complementary output
z Generation of synchronized pulse width modulation (PWM) pattern across port pins
z Deterministic fault protection, fast decay and configurable dead-time between complementary output
z Dithering that increase resolution with up to 5 bit and reduce quantization error
z 32-bit Real Time Counter (RTC) with clock/calendar function
z Watchdog Timer (WDT)
z CRC-32 generator
z One full-speed (12Mbps) Universal Serial Bus (USB) 2.0 interface
z Embedded device function
z Eight endpoints
z Can run from internal RC oscillator
z Up to three Serial Communication Interfaces (SERCOM), each configurable to operate as either:
z USART with full-duplex and single-wire half-duplex configuration
z I2C Bus up to 3.4MHz
z SMBUS/PMBUS
z SPI
z LIN slave
z 12-bit, 350ksps Analog-to-Digital Converter (ADC) with up to 10 channels
z Differential and single-ended input
z 1/2x to 16x programmable gain stage
z Automatic offset and gain error compensation
z Oversampling and decimation in hardware to support 13-, 14-, 15- or 16-bit resolution
z 10-bit, 350ksps Digital-to-Analog Converter (DAC)
z Two Analog Comparators (AC) with window compare function
z Peripheral Touch Controller (PTC)
z Up to 72-channel capacitive touch and proximity sensing
z I/O
z Up to 22 programmable I/O pins
z Packages
z 24-pin QFN
z 20-pin SOIC
z 20-ball WLCSP
z 14-pin SOIC
z Operating Voltage
z 1.62V – 3.63V
Atmel | SMART SAM D11 [DATASHEET]
Atmel-42363H-SAM-D11-Datasheet_09/2016
2
1.
Configuration Summary
Table 1-1.
Configuration Summary
SAM D11D – 24-pin QFN
SAM D11D – 20-pin SOIC /
WLCSP
SAM D11C – 14-pin SOIC
Pins
24
20
14
General Purpose I/O-pins (GPIOs)
22
18
12
Flash
16KB
16KB
16KB
SRAM
4KB
4KB
4KB
Timer Counter (TC)
2
2
2(3)
Waveform output channels for TC
2
2
2
Timer Counter for Control (TCC)
1
1
1
Waveform output channels per TCC
8
8
8
DMA channels
6
6
6
USB interface
1
1
1
Serial Communication Interface
(SERCOM)
3
3
2
Analog-to-Digital Converter (ADC)
channels
10
8
5
Analog Comparators (AC)
2
2
2
Digital-to-Analog Converter (DAC)
channels
1
1
1
Yes
Yes
Yes
1
1
1
Real-Time Counter (RTC)
RTC alarms
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Atmel-42363H-SAM-D11-Datasheet_09/2016
3
Table 1-1.
Configuration Summary (Continued)
SAM D11D – 24-pin QFN
SAM D11D – 20-pin SOIC /
WLCSP
SAM D11C – 14-pin SOIC
1 32-bit value or
2 16-bit values
1 32-bit value or
2 16-bit values
1 32-bit value or
2 16-bit values
8
8
8
Peripheral Touch Controller (PTC)
channels (X- x Y-lines) for mutual
capacitance(1)
72 (9x8)
42 (7x6)
12 (4x3)
Peripheral Touch Controller (PTC)
channels for self capacitance (Ylines only)(2)
16
13
7
48MHz
48MHz
48MHz
QFN
SOIC / WLCSP
SOIC
RTC compare values
External Interrupt lines
Maximum CPU frequency
Packages
32.768kHz crystal oscillator (XOSC32K)
0.4-32MHz crystal oscillator (XOSC)
32.768kHzinternal oscillator (OSC32K)
32kHz ultra-low-power internal oscillator (OSCULP32K)
8MHz high-accuracy internal oscillator (OSC8M)
48MHz Digital Frequency Locked Loop (DFLL48M)
96MHz Fractional Digital Phased Locked Loop (FDPLL96M)
Oscillators
Event System channels
6
6
6
SW Debug Interface
Yes
Yes
Yes
Watchdog Timer (WDT)
Yes
Yes
Yes
Notes:
1.
2.
3.
The number of X- and Y-lines depends on the configuration of the device, as some I/O lines can be configured as either X-lines or Y-lines.
Refer to “I/O Multiplexing and Considerations” on page 13 for details. The number in the “Configuration Summary” on page 3 is the maximum
number of channels that can be obtained.
The number of Y-lines depends on the configuration of the device, as some I/O lines can be configured as either X-lines or Y-lines. The number
given here is the maximum number of Y-lines that can be obtained.
The signals for TC2 are not routed out on the 14-pin package.
Atmel | SMART SAM D11 [DATASHEET]
Atmel-42363H-SAM-D11-Datasheet_09/2016
4
2.
Ordering Information
SAMD 11 C 14 A - M U T
Product Family
Package Carrier
SAMD = General Purpose Microcontroller
No character = Tray (Default)
T = Tape and Reel
Product Series
11 = Cortex M0+ DMA, USB
Package Grade
O
Pin Count
U = -40 - 85 C Matte Sn Plating
N = -40 - 105 C Matte Sn Plating
O
C = 14 pins
D = 20/24 pins
Package Type
Flash Memory Density
M = QFN
SS = SOIC
U = WLCSP
14 = 16KB
Device Variant
A = Default Variant
2.1
SAM D11C – 14-pin SOIC
Ordering Code
FLASH (bytes)
SRAM (bytes)
Package
Carrier Type
ATSAMD11C14A-SSUT
16K
4K
SOIC14
Tape & Reel
ATSAMD11C14A-SSNT
16K
4K
SOIC14
Tape & Reel
FLASH (bytes)
SRAM (bytes)
Package
Carrier Type
ATSAMD11D14A-SSUT
16K
4K
SOIC20
Tape & Reel
ATSAMD11D14A-SSNT
16K
4K
SOIC20
Tape & Reel
FLASH (bytes)
SRAM (bytes)
Package
Carrier Type
16K
4K
WLCSP20
Tape & Reel
2.2
SAM D11D – 20-pin SOIC
Ordering Code
2.3
SAM D11D – 20-ball WLCSP
Ordering Code
ATSAMD11D14A-UUT
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2.4
SAM D11D – 24-pin QFN
Ordering Code
FLASH (bytes)
SRAM (bytes)
Package
Carrier Type
ATSAMD11D14A-MUT
16K
4K
QFN24
Tape & Reel
ATSAMD11D14A-MNT
16K
4K
QFN24
Tape & Reel
2.5
Device Identification
The DSU - Device Service Unit peripheral provides the Device Selection bits in the Device Identification register
(DID.DEVSEL) in order to identify the device by software. The device variants have a reset value of DID=0x1001drxx,
with the LSB identifying the die number ('d'), the die revision ('r') and the device selection ('xx').
Table 2-1.
Device Identification Values
Device Variant
DID.DEVSEL
Device ID (DID)
SAMD11D14AM
0x00
0x10030r00
Reserved
0x01 - 0x02
SAMD11D14ASS
0x03
Reserved
0x04 - 0x05
SAMD11C14A
0x06
Reserved
0x07 - 0x08
SAMD11D14AU
0x09
0x10030r03
0x10030r06
0x10030r09
Note: The device variant (last letter of the ordering number) is independent of the die revision (DSU.DID.REVISION): The device variant denotes functional
differences, whereas the die revision marks evolution of the die. The device variant denotes functional differences, whereas the die revision marks
evolution of the die
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6
3.
Block Diagram
SWCLK
CORTEX-M0+
PROCESSOR
Fmax 48 MHz
SERIAL
WIRE
SWDIO
MICRO
TRACE BUFFER
IOBUS
DEVICE
SERVICE
UNIT
M
16 KB
NVM
4 KB
RAM
NVM
CONTROLLER
Cache
SRAM
CONTROLLER
M
M
S
M
HIGH SPEED
BUS MATRIX
PERIPHERAL
ACCESS CONTROLLER
S
S
S
DMA
DP
USB FS
DEVICE
S
DM
SOF 1KHZ
AHB-APB
BRIDGE B
AHB-APB
BRIDGE A
AHB-APB
BRIDGE C
PERIPHERAL
ACCESS CONTROLLER
PERIPHERAL
ACCESS CONTROLLER
PORT
SYSTEM CONTROLLER
DMA
36xxSERCOM
SERCOM
VREF
BOD33
PAD0
PAD1
PAD2
PAD3
OSCULP32K
XIN32
XOUT32
OSC32K
XOSC32K
DMA
OSC8M
XIN
XOUT
XOSC
2 x TIMER / COUNTER
8 x Timer Counter
WO0
WO1
DFLL48M
POWER MANAGER
CLOCK
CONTROLLER
RESETN
RESET
CONTROLLER
GCLK_IO[5..0]
SLEEP
CONTROLLER
WATCHDOG
TIMER
Notes:
1.
2.
1 x TIMER / COUNTER
FOR CONTROL
EXTERNAL INTERRUPT
CONTROLLER
WO0
WO1
(2)
WOn
AIN[9..0]
DMA
10-CHANNEL
12-bit ADC 350KSPS
GENERIC CLOCK
CONTROLLER
REAL TIME
COUNTER
EXTINT[7..0]
NMI
EVENT SYSTEM
DMA
PORT
FDPLL96M
2 ANALOG
COMPARATORS
DMA
VREFA
VREFB
AIN[3..0]
VOUT
10-bit DAC
VREFA
X[10]
PERIPHERAL
TOUCH
CONTROLLER
Y[5..0]
X[9..0] / Y[15..6]
(3)
Some products have different number of SERCOM instances, PTC signals and ADC signals.
The number of PTC X- and Y-lines depend on the configuration of the device, as some I/O lines can be configured as either X-lines or Y-lines. Refer to “I/O Multiplexing and Considerations” on page 13 for details.
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4.
Pinout
4.1
SAM D11C 14-pin SOIC
PA05
1
14
PA04
PA08
2
13
PA02
PA09
3
12
VDDIO/IN/ANA
PA14
4
11
GND
PA15
5
10
PA25
6
9
PA24
7
8
PA31
PA28/RST
PA30
DIGITAL PIN
ANALOG PIN
OSCILLATOR
GROUND
INPUT SUPPLY
RESET/GPIO PIN
4.2
SAM D11D 20-pin SOIC
PA05
1
20
PA04
PA06
2
19
PA03
PA07
3
18
PA02
PA08
4
17
VDDIO/IN/ANA
PA09
5
16
GND
PA14
6
15
PA25
PA15
7
14
PA24
PA16
8
13
PA31
PA22
9
12
PA30
PA23
10
11
PA28/RST
DIGITAL PIN
ANALOG PIN
OSCILLATOR
GROUND
INPUT SUPPLY
RESET/GPIO PIN
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4.3
SAM D11D 20-ball WLCSP
A
1
02
PA
3
A0
2
P
3
PA
4
PA
04
06
B
D
VD/IN/ANA
IO
5
A0
P
07
PA
08
PA
C
25
PA
ND
G
16
PA
09
PA
D
24
PA
0
A3
P
23
PA
14
PA
E
31
PA
/
28
A
P ST
R
22
PA
15
PA
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9
GND
PA25
PA24
PA31
PA30
24
23
22
21
20
19
VDDIO/IN/ANA
SAM D11D 24-pin QFN
1
2
3
4
5
6
18
17
16
15
14
13
PA28/RST
PA27
PA23
PA22
PA17
PA16
7
8
9
10
11
12
PA02
PA03
PA04
PA05
PA06
PA07
DIGITAL PIN
ANALOG PIN
OSCILLATOR
GROUND
INPUT SUPPLY
RESET/GPIO PIN
PA08
PA09
PA10
PA11
PA14
PA15
4.4
Atmel | SMART SAM D11 [DATASHEET]
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5.
Signal Descriptions List
The following table gives details on signal names classified by peripheral.
Table 5-1.
Signal Descriptions List
Signal Name
Function
Type
Active Level
Analog Comparators - AC
AIN[3:0]
AC Analog Inputs
Analog
CMP[1:0]
AC Comparator Outputs
Digital
Analog Digital Converter - ADC
AIN[19:0]
ADC Analog Inputs
Analog
VREFA
ADC Voltage External Reference A
Analog
VREFB
ADC Voltage External Reference B
Analog
Digital Analog Converter - DAC
VOUT
DAC Voltage output
Analog
VREFA
DAC Voltage External Reference A
Analog
External Interrupt Controller
EXTINT[7:0]
External Interrupts
Input
NMI
External Non-Maskable Interrupt
Input
Generic Clock Generator - GCLK
GCLK_IO[5:0]
Generic Clock (source clock or generic clock generator output)
I/O
Power Manager - PM
RESET
Reset
Input
Low
Serial Communication Interface - SERCOMx
PAD[3:0]
SERCOM I/O Pads
I/O
System Control - SYSCTRL
XIN
Crystal Input
Analog/ Digital
XIN32
32kHz Crystal Input
Analog/ Digital
XOUT
Crystal Output
Analog
XOUT32
32kHz Crystal Output
Analog
Waveform Outputs
Output
Waveform Outputs
Output
Timer Counter - TCx
WO[1:0]
Timer Counter - TCCx
WO[1:0]
Peripheral Touch Controller - PTC
X[15:0]
PTC Input
Analog
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Table 5-1.
Signal Descriptions List (Continued)
Signal Name
Function
Type
Y[15:0]
PTC Input
Analog
Active Level
General Purpose I/O - PORT
PA25 - PA00
Parallel I/O Controller I/O Port A
I/O
PA28 - PA27
Parallel I/O Controller I/O Port A
I/O
PA31 - PA30
Parallel I/O Controller I/O Port A
I/O
PB17 - PB00
Parallel I/O Controller I/O Port B
I/O
PB23 - PB22
Parallel I/O Controller I/O Port B
I/O
PB31 - PB30
Parallel I/O Controller I/O Port B
I/O
Universal Serial Bus - USB
DP
DP for USB
I/O
DM
DM for USB
I/O
SOF 1kHz
USB Start of Frame
I/O
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6.
I/O Multiplexing and Considerations
6.1
Multiplexed Signals
Atmel | SMART SAM D11 [DATASHEET]
Atmel-42363H-SAM-D11-Datasheet_09/2016
Each pin is by default controlled by the PORT as a general purpose I/O and alternatively it can be assigned to one of the peripheral functions A, B, C,
D, E, F, G or H. To enable a peripheral function on a pin, the Peripheral Multiplexer Enable bit in the Pin Configuration register corresponding to that pin
(PINCFGn.PMUXEN, n = 0-31) in the PORT must be written to one. The selection of peripheral function A to H is done by writing to the Peripheral
Multiplexing Odd and Even bits in the Peripheral Multiplexing register (PMUXn.PMUXE/O) in the PORT.
Table 5-1 on page 11 describes the peripheral signals multiplexed to the PORT I/O pins.
Table 6-1.
PORT Function Multiplexing
Pin
A
SAMD11D
SAMD11C 20-pin SAMD11D
SOIC/
14-pin
24-pin
WLCSP
SOIC
QFN
I/O Pin Supply
13
18 / A1
1
PA02
Type
VDD
EIC
B
REF
EXTINT[2]
ADC
AC
PTC
DAC
VOUT
C
D
E
F
G
H
SERCOM(1)
SERCOMALT
TC/TCC
TCC
COM
GCLK
AIN[0]
Y[0]
AIN[1]
Y[1]
AIN[2]
AIN[0]
Y[2]
SERCOM0/
PAD[2]
SERCOM0/
PAD[0]
TC1/WO[0]
TCC0/
WO[0]
19 / A2
2
PA03
VDD
EXTINT[3]
ADC/VREFA
DAC/VREFA
14
20 / A3
3
PA04
VDD
EXTINT[4]
ADC/VREFB
1
1 / B2
4
PA05
VDD
EXTINT[5]
AIN[3]
AIN[1]
Y[3]
SERCOM0/
PAD[3]
SERCOM0/
PAD[1]
TC1/WO[1]
TCC0/
WO[1]
2 / A4
5
PA06
VDD
EXTINT[6]
AIN[4]
AIN[2]
Y[4]
SERCOM0/
PAD[0]
SERCOM0/
PAD[2]
TC2/WO[0]
TCC0/
WO[2]
3 / B3
6
PA07
VDD
EXTINT[7]
AIN[5]
AIN[3]
Y[5]
SERCOM0/
PAD[1]
SERCOM0/
PAD[3]
TC2/WO[1]
TCC0/
WO[3]
2
4 / B4
7
PA08
VDD
EXTINT[6]
SERCOM1/
PAD[2]
SERCOM0/
PAD[2]
TCC0/WO[2]
TCC0/
WO[4]
GCLK_IO[0]
3
5 / C4
8
PA09
VDD
EXTINT[7]
SERCOM1/
PAD[3]
SERCOM0/
PAD[3]
TCC0/WO[3]
TCC0/
WO[5]
GCLK_IO[1]
9
PA10
VDD
EXTINT[2]
AIN[8]
CMP[0] X[2]/Y[8]
SERCOM0/
PAD[2]
SERCOM2/
PAD[2]
TC2/WO[0]
TCC0/
WO[2]
GCLK_IO[4]
10
PA11
VDD
EXTINT[3]
AIN[9]
CMP[1] X[3]/Y[9]
SERCOM0/
PAD[3]
SERCOM2/
PAD[3]
TC2/WO[1]
TCC0/
WO[3]
GCLK_IO[5]
4
6 / D4
11
PA14
VDD
I2C
NMI
AIN[6]
CMP[0] X[0]/Y[6]
SERCOM0/
PAD[0]
SERCOM2/
PAD[0]
TC1/WO[0]
TCC0/
WO[0]
GCLK_IO[4]
5
7 / E4
12
PA15
VDD
I2C
EXTINT[1]
AIN[7]
CMP[1] X[1]/Y[7]
SERCOM0/
PAD[1]
SERCOM2/
PAD[1]
TC1/WO[1]
TCC0/
WO[1]
GCLK_IO[5]
8 / C3
13
PA16
VDD
EXTINT[0]
X[4]/Y[10]
SERCOM1/
PAD[2]
SERCOM2/
PAD[2]
TC1/WO[0]
TCC0/
WO[6]
GCLK_IO[2]
14
PA17
VDD
EXTINT[1]
X[5]/Y[11]
SERCOM1/
PAD[3]
SERCOM2/
PAD[3]
TC1/WO[1]
TCC0/
WO[7]
GCLK_IO[3]
15
PA22
VDD
EXTINT[6]
X[6]/Y[12]
SERCOM1/
PAD[0]
SERCOM2/
PAD[0]
TC1/WO[0]
TCC0/
WO[4]
GCLK_IO[1]
9 / E3
I2C
13
Table 6-1.
PORT Function Multiplexing (Continued)
Pin
A
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Atmel-42363H-SAM-D11-Datasheet_09/2016
SAMD11D
SAMD11C 20-pin SAMD11D
SOIC/
14-pin
24-pin
WLCSP
SOIC
QFN
I/O Pin Supply
10 / D3
16
PA23
VDD
B
Type
EIC
REF
ADC
AC
PTC
I2C
EXTINT[7]
X[7]/Y[13]
EXTINT[7]
X[10]
DAC
C
D
E
F
G
H
SERCOM(1)
SERCOMALT
TC/TCC
TCC
COM
GCLK
SERCOM1/
PAD[1]
SERCOM2/
PAD[1]
TC1/WO[1]
TCC0/
WO[5]
USB/SOF
GCLK_IO[2]
1kHz
17
PA27
VDD
6
11 / E2
18
PA28
VDD
7
12 / D2
19
PA30
VDD
EXTINT[2]
SERCOM1/
PAD[0]
SERCOM1/
PAD[2]
TC2/WO[0]
TCC0/
WO[2]
CORTEX_
GCLK_IO[0]
M0P/
SWCLK
8
13 / E1
20
PA31
VDD
EXTINT[3]
SERCOM1/
PAD[1]
SERCOM1/
PAD[3]
TC2/WO[1]
TCC0/
WO[3]
SWDIO(2)
9
14 / D1
21
PA24(3)
VDD
EXTINT[4]
X[8]/Y[14]
SERCOM1/
PAD[2]
SERCOM2/
PAD[2]
TCC0/WO[2]
TCC0/
WO[4]
USB/DM
10
15 / C1
22
PA25(3)
VDD
EXTINT[5]
X[9]/Y[15]
SERCOM1/
PAD[3]
SERCOM2/
PAD[3]
TCC0/WO[3]
Notes:
1.
2.
3.
GCLK_IO[0]
USB/DP
GCLK_IO[0]
GCLK_IO[0]
GCLK_IO[0]
Refer to “Electrical Characteristics” on page 858 for details on the I2C pin characteristics.Only some pins can be used in SERCOM I2C mode. See the Type column for using a SERCOM pin in I2C mode
This function is only activated in the presence of a debugger.
If the PA24 and PA25 pins are not connected, it is recommended to enable a pull-up on PA24 and PA25 through input GPIO mode. The aim is to avoid an eventually extract power consumption (
