CL88030/31
Sequential Linear LED Driver with Four or Six Taps
Features
Description
• Suitable for 120VAC/230VAC/277VAC Nominal
Input Voltage
- ± 15% input voltage tolerance recommended
• Targeted for 2W and Greater Output Power
• Programmable Overtemperature Protection
- Provides gradual reduction in light output with
increasing temperature
• Active Line Regulation
- Provides fairly constant output power over
variations in AC line voltage
- Adjustable “knee” of regulation
• 4 Taps(CL88030) or 6 Taps(CL88031) with Two
Current Set Resistors
- Allows optimization of THD
• Optional Reduced Flicker Index
- Provides near-continuous power to the LEDs
- Reduces strobing
- Uses an external capacitor
• Compatible with Phase-cut Dimming, both Leading-edge and Trailing-edge
• Uses a Thermally Enhanced DFN-10 Package
with Bottom Heatslug
- No high voltage Pins
- Shunt regulator input
- Power dissipation is in the external FETs and
LEDs, not in the IC
The CL88030T and CL88031T LED Driver Integrated
Circuits (ICs) are intended offline sequential linear LED
drivers designed to provide LED power from a utility
voltage input.
The CL88030/31 devices are designed to drive a long
string of inexpensive, low-current LEDs directly from
the AC mains. A basic driver circuit consists of Microchip’s CL88030/31 LED driver IC, four power FETs (six
if using the CL88031), four resistors, two capacitors,
and a bridge rectifier. Additional components are
optional for various levels of transient protection. Adding an inexpensive NTC-thermistor assures over temperature protection (OTP). No EMI filters or power
factor correction circuits are needed (unless the
optional flicker-reduction feature is desired).
A string of series/parallel LEDs is tapped at four (or six)
locations, called “taps”. Linear current regulators sink
current at each tap through a single control point and
are sequentially turned on and off. High efficiency is
achieved by shutting off upstream regulators when
downstream regulators achieve regulation. This makes
controlling overall input current easier than trying to
control multiple current paths by tracking the input sine
wave voltage.
The CL88030/31 uses a self-commutation technique
using only the tap currents themselves; this technique
inherently provides smooth transitions from one
regulator to the next, without relying on tap voltages or
the rectified AC to coordinate the transitions.
Applications
• LED lamps
• LED lighting fixtures
Pin Diagram
CL88030T
3 x 3 DFN*
GT1 1
GT2 2
GT3 3
GT4 4
NC 5
EP
11
CL88031T
3 x 3 DFN*
10 ALR
GT1 1
9 BIAS
GT2 2
8 OTP
7 CS
GT3 3
6 NC
GT4 4
GT5 5
10 ALR
EP
11
9 BIAS
8 OTP
7 CS
6 GT6
* Includes Exposed Thermal Pad (EP); see Table 2-1
2018 Microchip Technology Inc.
DS20006049A-page 1
CL88030/31
TYPICAL CL88030T APPLICATION CIRCUIT
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2018 Microchip Technology Inc.
CL88030/31
TYPICAL CL88031T APPLICATION CIRCUIT AND BLOCK DIAGRAM (Note)
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With optional ripple reduction circuit.
2018 Microchip Technology Inc.
DS20006049A-page 3
CL88030/31
1.0
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
GT1-4 (and GT5-6 on CL88031T)...................–0.5V to
(BIAS + 0.5V)
OTP, ALR, CS......................................... –0.3V to 5.5V
BIAS ....................................................... –0.3V to 13V
Maximum Current into BIAS pin .........................10 mA
Operating Junction Temperature ....... –40°C to +125°C
Lead Soldering Temperature for 10s ...................... 300
Storage Temperature......................... –65°C to +150°C
ESD Voltage in any pin ........................... 2000V(HBM)
1.1
Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at those or any other conditions, above those indicated in the operational listings
of this specification, is not intended. Exposure to
maximum rating conditions for extended periods may
affect device reliability.
ELECTRICAL SPECIFICATIONS
TABLE 1-1:
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all specifications are for TA = TJ = +25°C. IBIAS = 1.5 mA.
ALR pin open, OTP = 5V unless otherwise noted. Boldface specifications apply over the full temperature range
TA = TJ = –15°C to +95°C.
Parameters
Gate Output Low (all GTx), VCS = 2.0V
Gate Output High (all GTx), VCS =0V
Sym.
Min.
Typ.
Max.
Units
0.100
V
V
12
V
Conditions
VGT,low
VGT,high
VBIAS- 1.0
VBIAS
10
IGT,high
10
Quiescent Current Consumption
IBIAS,Q
—
Reference Voltage for Tap 4
GT3 to GT4 Current Ratio
VGT4
KTAP3
1.210
0.883
1.275
0.929
1.339
0.975
V
CL88030, (Note 2)
CL88030, (Note 2)
GT2 to GT4 Current Ratio
GT1 to GT4 Current Ratio
KTAP2
KTAP1
0.747
0.542
0.786
0.571
0.825
0.600
ratio
CL88030, (Note 2)
CL88030, (Note 2)
Reference Voltage for Tap 6
GT5 to GT6 Current Ratio
VGT6
KTAP5
1.210
0.912
1.275
0.960
1.339
1.008
V
ratio
CL88031, (Note 2)
CL88031, (Note 2)
GT4 to GT6 Current Ratio
GT3 to GT6 Current Ratio
KTAP4
KTAP3
0.893
0.846
0.940
0.890
0.987
0.935
CL88031, (Note 2)
CL88031, (Note 2)
GT2 to GT6 Current Ratio
GT1 to GT6 Current Ratio
KTAP2
KTAP1
0.741
0.494
0.780
0.520
0.819
0.546
CL88031, (Note 2)
CL88031, (Note 2)
Limiting Voltage from OTP, VALR= 0V,100 pF
CS to GND, GT4/GT6 to CS
VLIM
1.296
1.525
1.754
Voltage at BIAS pin
IBIAS = 0.8,5 mA,VCS= 0V, CL88030
Voltage at BIAS pin
IBIAS = 1.0,5 mA,VCS= 0V, CL88031
Gate Output High Current (all GTx)
100k GTx to GND, VCS = 0V
Nominal ALR Voltage Reference, ALR pin open, VALR,nom
GT4/GT6 to CS, 100 pF CS to GND
ALR Voltage Ratio at GT4/GT6
ALR Voltage Ratio at GT4/GT6
KALR,HI
KALR,LO
11
μA
900
1300
1.275
0.801
1.073
0.843
1.129
μA
Characterization
Only, Note 1
V
V
0.885
1.186
ratio
ratio
Note 3
Note 4
OTP Response Voltage
OTP
0.90
1.10
1.32
V
Note 5
Note 1: Does not include GATE current, or current into ALR or OTP divider. 900μA=CL88030, 1300μA=CL88031
2: GTx connected to CS, with 100pF from CS to GND.
3: VALR = 1.776V, GT4/GT6 to CS, 100 pf CS to GND.
4: VALR = 0.863V, GT4/GT6 to CS, 100 pf CS to GND.
5: GT4/GT6 to CS (unity gain), OTP=1.658V, 100pF CS to GND measure CS/GTx, see Equation 3-3.
DS20006049A-page 4
2018 Microchip Technology Inc.
CL88030/31
TABLE 1-2:
TEMPERATURE SPECIFICATIONS
Parameters
Sym
Min.
Typ.
Max.
Units
Operating Temperature Range
TJ
-40°C
—
+125°C
°C
Storage Temperature Range
TA
-65°C
—
+150°C
°C
JC
—
+8°C
—
°C/W
Conditions
Temperature Ranges
Note 1
Package Thermal Resistances
Thermal Resistance, 10LD-DFN
Note 1:
2:
Note 2
The Operating Temperature Range is specified at the junction. The junction temperature must be
computed using the thermal resistance (TR) from junction-to-case, and the case-to-ambient TR of the
PCB design.
Thermal resistance is measured from junction to bottom metal slug.
2018 Microchip Technology Inc.
DS20006049A-page 5
CL88030/31
2.0
PIN DESCRIPTION
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN DESCRIPTION
CL88030T
CL88031T
Pin Name
1
1
GT1
Drives the FET for the most upstream LED string
2
2
GT2
Drives the FET for the top 2 LED strings
3
3
GT3
Drives the FET for the top 3 LED strings
4
4
GT4
Drives the FET for the top 4 LED strings
5
—
NC
Not Connected. To be left floating.
6
—
NC
Not Connected. To be left floating.
7
7
CS
Used to set the currents in the taps
8
8
OTP
Provides remote Overtemperature Protection.
2.1
Description
9
9
BIAS
Provides power to the IC using an internal shunt regulator. It is recommended to be bypassed with a low ESR ceramic capacitor (at least 1 μF)
10
10
ALR
An external resistive voltage divider and capacitor provide line regulation
for the tap currents
11
11
GND
Circuit common electrical connection (ground)
—
5
GT5
Drives the FET for the top 5 LED strings
—
6
GT6
Drives the FET for the top 6 LED strings
GT1 Pin
Gate drive voltage connection for external power FET
for the first/top LED string.
2.2
GT2 Pin
2.8
Overtemperature Protection Pin
(OTP)
This input is connected to a resistor/NTC-thermistor
combination to reduce the LED current when the
temperature becomes too high.
Gate drive voltage connection for external power FET
for the second LED string.
2.9
2.3
An input pin to provide voltage to the chip. The BIAS pin
is the input to a shunt regulator and must be fed by a
current source, not a fixed voltage.
GT3 Pin
Gate drive voltage connection for external power FET
for the third LED string.
2.4
GT4 Pin
Gate drive voltage connection for external power FET
for the fourth LED string.
2.5
GT5 Pin
Gate drive voltage connection for external power FET
for the fifth LED string.
2.6
2.10
BIAS Pin
Active Line Regulation Pin (ALR)
This input pin is connected to an RC network to sense
the input main voltage and regulate the LED string
current against variations in AC input voltage.
2.11
Ground Terminal (GND)
Reference ground for all input voltages.
GT6 Pin
Gate drive voltage connection for external power FET
for the sixth LED string.
2.7
Current Set Pin (CS)
A resistor from this pin to ground sets the LED string
current.
DS20006049A-page 6
2018 Microchip Technology Inc.
CL88030/31
3.0
FUNCTIONAL DESCRIPTION
3.1
Introduction
The CL88030/31 LED driver ICs are designed to drive
a long string of inexpensive, low-current LEDs directly
from the AC mains. A string of series/parallel LEDs is
tapped at four (or six) locations. Linear current
regulators sink current at each tap through a single
control point and are sequentially turned on and off.
This IC is targeted to drive a string of LEDs from a
nominal utility mains input voltage and provide >2W of
output power. It has an internal line regulation circuit to
regulate the output power as the line voltage changes
from minimum to maximum. It also includes a remote
Overtemperature Protection which allows thermal
de-rating of the output power using a remote NTC to
sense the LED or lamp temperature.
3.2
Principle of Operation
The CL88030 employs a very simple method of implementing single-point control and self-commutation, as
shown in Figure 3-1. The single current sense resistor
to ground (RCS) comprises single-point control. Each
tap’s error amplifier shares this single control point,
although only one err amp is active at any one time.
Initially, VCS is at 0V, causing all the current regulators
to be turned on but not conducting. Once the rectified
AC rises high enough to forward bias the first LED
string segment, the first current regulator begins conducting. Eventually it achieves regulation. At this point
VREF1 and VCS are in equilibrium. As the rectified AC
continues to rise, the next LED segment becomes
forward biased. Since the second regulator’s reference
voltage (VREF2) is higher than VCS, the second regulator is already on and begins conducting (although not
regulating), injecting current (ITAP2) into the single control point, raising the VCS voltage. The first regulator
responds to the increase in VCS by reducing ITAP1 such
that VCS remains equal to VREF1.
EQUATION 3-1:
V REF1
I TAP1 = --------------- – ITAP2
RCS
ITAP1 continues to decrease as ITAP2 increases. When
the rectified AC rises sufficiently for the second regulator to achieve regulation, VCS increases to be equal
with VREF2. With VCS now greater than VREF1, the first
regulator is effectively shut off and the second regulator takes over. This repeats for the other taps and also
works in reverse as the rectified AC passes the peak
and begins decreasing.
This simple self-commutating mechanism and
single-point control automatically sequences the
current regulators and assures smooth tap-to-tap
transitions.
3.2.1
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FIGURE 3-1:
ACTIVE LINE REGULATION (ALR)
Without compensating for line voltage variations, as
the AC voltage increases, downstream LED segments
become active. In addition, the dwell time at the higher
tap currents increases as AC voltage goes up. This
causes brightness to increase with AC voltage,
resulting in poor line regulation.
The ALR circuit maintains fairly constant output power
over variations in AC line voltage. It is not a closed
loop system that directly monitors and corrects output
power. Instead, it monitors the voltage applied to the
LED string and uses it to adjust the reference voltage
provided by the OTP circuit. The circuit used for
achieving the active line regulation is shown in
Figure 3-2.
Tap Commutation.
Each current regulator has its own reference voltage,
derived from a resistive voltage divider such that:
VREF4 > VREF3 > VREF2 > VREF1
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DS20006049A-page 7
CL88030/31
Under normal operation (OTP not activated) the OTP
limiting voltage is essentially the reference voltage
used to set the tap currents. The ALR circuit adjusts
this voltage up or down to compensate for variations in
the AC line voltage as represented by the voltage at
the ALR pin.
EQUATION 3-2:
V REF4
VALR – 1.275V
= 1.275V – ------------------------------------ 120k
300k
The external resistor divider at the ALR pin is usually
chosen such that the average voltage at the pin is
1.275V at nominal 120 VAC input. The ALR divider is
connected after the first LED segment to increase its
sensitivity to changes in the AC line voltage.
The function of the limiter circuit is three-fold. Except
during OTP, the limiting voltage is fixed. First, during
the initial application of power, the ALR filter capacitor
(CALR) is at 0V. This would result in high LED current
until CALR charges up. Without a limiter, this would
cause a bright flash at turn-on. The second purpose of
the limiter is during dimming, where the average ALR
voltage will be low, causing the LED drive current to be
high. This defeats the dimmer and could result in
excessive currents. Lastly, during an overtemperature
condition, the OTP circuit gradually lowers the limiting
voltage from its fixed value. This reduces the power
applied to the LEDs, lowering their temperature until an
equilibrium is established.
3.2.2
OVERTEMPERATURE
PROTECTION (OTP)
OTP uses an inexpensive, external NTC thermistor to
remotely sense LED temperature. The thermistor can
be located in close proximity to the LEDs, providing
near-direct LED temperature monitoring. The OTP
temperature is adjustable via selection of NTC resistance. It is essential that OTP operate linearly, gradually reducing output power as temperature increases.
The thermistor is arranged in a full-bridge configuration
with the active arm consisting of the NTC and a discrete resistor to VBIAS (Figure 3-3). The passive arm
consists of internal resistors. The thermistors’ resistance versus temperature curve asymptotically
approaches 0 as temperature rises. To provide a
well-defined window between the threshold temperature and the extinguishing temperature, a small
segment of the thermistors’ resistance-temperature
curve must be used.
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ROF and the parallel combination of ROU and ROL
determine OTP gain and set the width of the OTP window — the higher the gain, the narrower the window.
Offset is determined by the passive arm of the bridge
and sets the location of the OTP window along the
temperature axis.
If OTP is unused, the OTP pin should be connected to
5V, by making a resistor divider through the BIAS pin.
The output of the OTP amplifier (which is used as a
limit for the ALR amplifier) can be expressed as:
EQUATION 3-3:
V BIAS
1
1
1
V REF4 = ROF VOTP ---------- + ----------- + ---------- – ------------- R OF ROU R OL ROU
= 2.993 VOTP – 0.3521 VBIAS
Note that in the above equation, it is assumed that the
input voltage is at nominal value and there is no adjustment to the reference due to the ALR circuit.
The output of the OTP amplifier is internally clamped to
1.575V, which corresponds to a voltage of 1.77V at the
OTP pin. As the voltage at the OTP pin decreases to
1.686V, the output of the OTP amplifier falls to 1.275V.
It is at this point, the OTP circuit starts modifying the tap
currents and causes thermal derating.
Using two fixed resistors and one NTC, both the breakpoint and the slope of the derating curve can be set
independently.
For example, consider a case with a breakpoint of 85°C
with a derating curve such that the LED driver is at 20%
of full power at 110°C. The NTC thermistor used is a
470 kΩ, with a Bvalue of 4500K. The NTC resistance at
a given temperature (TC, expressed in °C) can be
expressed as:
EQUATION 3-4:
R NTC Tc = R NTC 25C e
DS20006049A-page 8
1
1
– B ------------- – ----------------------
298K Tc + 273
2018 Microchip Technology Inc.
CL88030/31
Using Equation 3-4, the corresponding NTC resistances at 85°C and 110°C are 33.4 kΩ and 14.2 kΩ.
Using these NTC resistance values, ROW and ROT can
then be computed assuming 11 volts VBIAS. The final
set of values are provided in the Table 3-1.
TABLE 3-1:
OVERTEMPERATURE
PROTECTION
Parameter
25°C
85°C
110°C
ROT
511 kΩ
511 kΩ
511 kΩ
ROW
57.6 kΩ
57.6 kΩ
57.6 kΩ
RNTC
470 kΩ
33.4 kΩ
14.2 kΩ
VOTP
5.580V*
1.661V
VOTPAMP
1.575V
1.102V
*Refer to Application Notes, Section 3.2.5
FIGURE 3-4:
1.135V
3.2.3
RIPPLE REDUCTION (OPTIONAL)
Low output ripple is achieved using a capacitor and
four diodes. The capacitor may be one or more
paralleled ceramic capacitors or a single electrolytic.
Multiple ceramic capacitors may be needed due to
their poor voltage coefficient. The four diodes may be
obtained in a single small package.The LED and
rectifier arrangement is shown in Figure 3-4.
With this method, all currents, including ripple capacitor charging and discharging currents, are controlled,
passing through the same single control point. This
allows the input current wave-shape to be maintained
and avoids peak-charging the ripple-reduction
capacitor.
0.183V
Ripple Reduction Circuit.
2018 Microchip Technology Inc.
DS20006049A-page 9
CL88030/31
The CL88030/31 with the ripple reduction circuit operates in four phases: recharge, hold-up, direct and
under certain conditions, idle. Note that all active current paths include Segment 1, assuring uninterrupted
light output during all phases of operation, excluding
the idle phase.
When the rectified AC falls below VCRPL, the capacitor
takes over, supplying the LEDs. The discharge path
flows through RSET1 only. Since this is lesser sense
resistance than for the other current paths, the current
for the hold-up phase will be higher. This allows for
normal currents to be drawn from the AC line to better
track the input voltage sine wave while allowing a
higher current during the hold-up interval.
Complicating the voltage requirements are lightning
induced transients on the AC line. Depending on where
the lamp is used, transient survivability requirements
can range from 500V for protected indoor locations up
to 10 kV for unprotected outdoor locations. Since
high-brightness lamps will be mainly used outdoors,
transient survivability requirements will be on the high
end of the range. Transient protection can absorb the
transients, but there is a rather large gap between the
normal peak line voltage and the clamping voltage provided by the protection circuits, which can be hundreds
of volts. The low-voltage controller will be powered by
a shunt regulator. This avoids any high voltage on the
controller, enabling it to be a strictly low voltage (~11V)
chip. Due to the LED voltage drops, each tap has, theoretically, a different voltage requirement. And FET 1
sees higher current than FET 4. However, in practice
one common FET is used to handle all taps. And from
a BOM perspective, using a common FET can keep
costs lower. For these be a strictly low voltage (~11V)
chip. Due to the LED voltage drops, each tap has, theoretically, a different voltage requirement. And FET 1
sees higher current than FET 4. However, in practice
one common FET is used to handle all taps. And from
a BOM perspective, using a common FET can keep
costs lower. For these reasons, a common FET is mentioned for every tap. Light output is estimated at
100 lm/watt.
Direct (purple paths)
3.2.5
When VCRPL< VRAC < (VCRPL + VSEG1), the LEDs are
supplied directly from the AC line. The window when
the direct phase is active is determined by VSEG1.
To prevent the OTP pin from going too high in voltage
at cold temperatures, a 5.1 volt zener clamp to GND
may be needed.
Idle (no path)
Because FET gate capacitance can vary considerably,
it may be necessary to add a small GTx to GND capacitor for stability.
Recharge (red path)
Recharging of the ripple capacitor (CRPL) occurs when
(VRAC – VSEG1) > VCRPL. The maximum voltage that
CRPL can be charged to is:
VCRP(max) = VSEG2 + VSEG3 + VSEG4
The numbers of LEDs for each segment must be chosen carefully so as not to exceed CRPL’s voltage rating
while at the same time allowing CRPL to charge up to a
voltage sufficient to drive at least SEG1. To provide
continuous light output, the recharge path must
include LEDs.
Hold-Up (green path)
At low AC line voltages, there is not enough voltage to
charge CRPL sufficiently to power SEG1 and strobing
will occur. Also, strobing will occur if CRPL is too small.
3.2.4
APPLICATION NOTES
FET SELECTION
The advantage of external FETs is three-fold. First,
external FETs allow the LED driver to be scaled in both
power and voltage. This allows us to produce one chip
that can meet the needs of many different markets.
Secondly, the heat can be spread over multiple
devices, allowing for cooler overall operation. Thirdly,
without the high real estate used by integrated FETs,
nor the high voltage requirements, the die can be made
very small. The scalability plus small die results in a low
cost chip that can address a multitude of high-brightness markets.
Common AC line voltages used in lighting are 90VAC,
120VAC, 208VAC, 230VAC, 277VAC, 347VAC, and
480VAC. A sequential linear driver can only be
designed to handle one of these voltages – no
multi-range, universal inputs can be realized.
DS20006049A-page 10
2018 Microchip Technology Inc.
CL88030/31
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
10-Lead DFN (3x3x0.9 mm)
Example
XXXX
YYWW
NNN
3011
1824
256
PIN 1
PIN 1
Part Number
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Code
CL88030T-E/MF
3011
CL88031T-E/MF
3111
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
may not include the corporate logo.
2018 Microchip Technology Inc.
DS20006049A-page 11
CL88030/31
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20006049A-page 12
2018 Microchip Technology Inc.
CL88030/31
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2018 Microchip Technology Inc.
DS20006049A-page 13
CL88030/31
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20006049A-page 14
2018 Microchip Technology Inc.
CL88030/31
APPENDIX A:
REVISION HISTORY
Revision A (July 2018)
• Original Release of this Document.
2018 Microchip Technology Inc.
DS20006049A-page 15
CL88030/31
NOTES:
DS20006049A-page 16
2018 Microchip Technology Inc.
CL88030/31
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
Device:
X (1)
-
X
-
Tape and Temperature
Range
Reel
XX
Package
CL88030= Sequential Linear LED Driver with 4 Taps
Examples:
a)
CL88030T-E/MF:
Sequential Linear LED
Driver with 4 Taps;
Tape and Reel;
10LD DFN package
b)
CL88031T-E/MF:
Sequential Linear LED
Driver with 6 Taps;
Tape and Reel;
10LD DFN package
CL88031= Sequential Linear LED Driver with 6 Taps
Tape and Reel
Option
T
=
Tape and Reel
Temperature
Range
E
=
-40C to +125C (Extended)
Package:
MF
=
Plastic Dual Flat, No Lead Package (DFN), 8-lead
Note 1:
2018 Microchip Technology Inc.
Tape and Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering purposes and
is not printed on the device package. Check
with your Microchip Sales Office for package
availability with the Tape and Reel option.
DS20006049A-page 17
CL88030/31
NOTES:
page 18
2018 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BitCloud, chipKIT, chipKIT logo,
CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo,
JukeBlox, KeeLoq, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, SAM-BA, SpyNIC, SST, SST Logo,
SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard,
CryptoAuthentication, CryptoAutomotive, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity,
JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation,
PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon,
QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O,
SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2018, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-3354-5
== ISO/TS 16949 ==
2018 Microchip Technology Inc.
DS20006049A-page 19
Worldwide Sales and Service
AMERICAS
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Corporate Office
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Web Address:
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DS20006049A-page 20
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2018 Microchip Technology Inc.
10/25/17
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