DN3545
N-Channel Depletion-Mode Vertical DMOS FET
Features
General Description
•
•
•
•
•
•
The DN3545 Depletion-mode normally-on transistor
uses an advanced vertical Diffusion Metal Oxide Semiconductor (DMOS) structure and a well-proven silicongate manufacturing process. This combination produces a device with the power-handling capabilities of
bipolar transistors and the high-input impedance and
positive-temperature coefficient inherent in MetalOxide Semiconductor (MOS) devices. Characteristic of
all MOS structures, this device is free from thermal
runaway and thermally induced secondary breakdown.
High Input Impedance
Low Input Capacitance
Fast Switching Speeds
Low On-Resistance
Free from Secondary Breakdown
Low Input and Output Leakage
Applications
•
•
•
•
•
•
•
Normally-On Switches
Solid-State Relays
Converters
Linear Amplifiers
Constant-Current Sources
Power Supply Circuits
Telecommunications
Vertical DMOS Field-Effect Transistors (FETs) are ideally suited to a wide range of switching and amplifying
applications where very low threshold voltage, high
breakdown voltage, high input impedance, low input
capacitance and fast switching speeds are desired.
Package Types
3-lead TO-92
(Top view)
3-lead SOT-89
(Top view)
DRAIN
DRAIN
SOURCE
DRAIN
GATE
SOURCE
GATE
See Table 3-1 and Table 3-2 for pin information.
2018 Microchip Technology Inc.
DS20005438A-page 1
DN3545
1.0
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS†
Drain-to-Source Voltage ....................................................................................................................................... BVDSX
Drain-to-Gate Voltage........................................................................................................................................... BVDGX
Gate-to-Source Voltage.......................................................................................................................................... ±20V
Operating Ambient Temperature, TA .................................................................................................. –55°C to +150°C
Storage Temperature, TS .................................................................................................................... –55°C to +150°C
† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in the
operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C unless
otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle.
Parameter
Sym.
Min. Typ.
Max.
Unit
BVDSX
450
—
—
V
VGS = –5V, ID = 100 µA
VGS(OFF)
–1.5
—
–3.5
V
VDS = 25V, ID = 10 µA
∆VGS(OFF)
—
—
–4.5
IGSS
—
—
100
nA
VGS = ±20V, VDS = 0V
—
—
1
µA
VDS = Maximum rating,
VGS = –5V
—
—
1
mA
VDS = 0.8 Maximum rating,
VGS = –5V, TA = 125°C (Note 1)
IDSS
200
—
—
mA
VGS = 0V, VDS = 15V
RDS(ON)
—
—
20
Ω
∆RDS(ON)
—
—
1.1
%/°C
Drain-to-Source Breakdown Voltage
Gate-to-Source Off Voltage
VGS(OFF) Change with Temperature
Gate Body Leakage Current
Drain-to-Source Leakage Current
Static Drain-to-Source On-State
Resistance
Change in RDS(ON) with Temperature
Note 1:
mV/°C VDS = 25V, ID = 10 µA (Note 1)
ID(OFF)
Saturated Drain-to-Source Current
Conditions
VGS = 0V, ID = 150 mA
VGS = 0V, ID = 150 mA (Note 1)
Specification is obtained by characterization and is not 100% tested.
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, for all specifications TA = 25°C. Specification is obtained by
characterization and is not 100% tested.
Sym.
Min.
Forward Transconductance
Parameter
GFS
150
—
—
Input Capacitance
CISS
—
—
360
pF
Common Source Output Capacitance
COSS
—
—
40
pF
Reverse Transfer Capacitance
CRSS
—
—
15
pF
Turn-On Delay Time
td(ON)
—
—
20
ns
tr
—
—
30
ns
td(OFF)
—
—
30
ns
tf
—
—
40
ns
VDD = 25V,
ID = 150 mA,
RGEN = 25Ω,
VGS = 0V to –10V
VSD
—
—
1.8
V
VGS = –5V, ISD = 150 mA (Note 1)
trr
—
800
—
ns
VGS = –5V, ISD = 150 mA
Rise Time
Turn-Off Delay Time
Fall Time
Typ. Max.
Unit
Conditions
mmho VDS = 10V, ID = 100 mA
VGS = –5V,
VDS = 25V,
f = 1 MHz
DIODE PARAMETER
Diode Forward Voltage Drop
Reverse Recovery Time
Note 1:
All DC parameters are 100% tested at 25°C unless otherwise stated. Pulse test: 300 µs pulse, 2% duty
cycle.
DS20005438A-page 2
2018 Microchip Technology Inc.
DN3545
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise specified, for all specifications TA = TJ = +25°C.
Parameter
Sym.
Min.
Typ.
Max.
Unit
Conditions
Operating Ambient Temperature
TA
–55
—
150
°C
Storage Temperature
TS
–55
—
150
°C
3-lead TO-92
θJA
—
132
—
°C/W
3-lead SOT-89
θJA
—
133
—
°C/W
TEMPERATURE RANGE
PACKAGE THERMAL RESISTANCE
THERMAL CHARACTERISTICS
Package
3-lead TO-92
ID (Note 1)
Continuous
(mA)
ID
Pulsed
(mA)
136
1600
3-lead SOT-89
200
300
Note 1: ID continuous is limited by the maximum rated TJ.
2: Mounted on an FR4 board, 25 mm x 25 mm x 1.57 mm
2018 Microchip Technology Inc.
Power
Dissipation
at TC = 25°C
(W)
IDR (Note 1)
(mA)
IDRM
(mA)
0.74
136
1600
1.6 (Note 2)
200
300
DS20005438A-page 3
DN3545
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g. outside specified power supply range) and therefore outside the warranted range.
0.7
1.0V
0V
0.6
VGS = +2V
0.6
VGS = +2.0V
+1.0V
0V
0.5
-0.5V
-0.5V
0.4
-0.8V
0.3
-1.0V
0.2
0.4
ID (amperes)
ID (amperes)
0.5
-0.8V
0.3
-1.0V
0.2
0.1
0.1
-1.5V
0
0
50
100
150
200
250
300
350
400
-1.5V
0
450
0
2
4
VDS (volts)
FIGURE 2-1:
6
8
10
VDS (volts)
OutputCharacteristics.
FIGURE 2-4:
Saturation Characteristics.
2.0
0.8
VDS = 10V
SOT-89
TA = -55OC
1.5
O
TA = 25 C
PD (watts)
GFS (siemens)
0.6
0.4
1.0
TO-92
TA = 125OC
0.2
0.5
0
0
0.1
0.2
0.3
0
0.4
0
25
50
ID (amperes)
FIGURE 2-2:
Current.
Transconductance vs. Drain
Thermal Resistance (normalized)
SOT-89 (Pulsed)
SOT-89 (DC)
ID (amperes)
TO-92 (DC)
0.01
10
100
1000
VDS (volts)
FIGURE 2-3:
Operating Area.
DS20005438A-page 4
150
SOT-89
TA = 25 O C
PD = 1.6W
0.8
0.6
0.4
0.2
TO-92
T C = 25 O C
P D = 1.0W
T A = 25 O C
1
125
1.0
TO-92 (Pulsed)
0.001
100
FIGURE 2-5:
Power Dissipation vs.
Ambient Temperature.
1.0
0.1
75
TA (OC)
Maximum Rated Safe
0
0.001
0.01
0.1
1
10
tP (seconds)
FIGURE 2-6:
Characteristics.
Thermal Response
2018 Microchip Technology Inc.
DN3545
50
1.2
VGS = 0V
ID = 100µA
VGS = -5.0V
40
RDS(ON) (ohms)
BVDSS (Normalized)
1.1
1.0
30
20
0.9
10
0.8
-50
0
50
100
0
150
0
0.2
0.4
Tj (OC)
FIGURE 2-7:
Temperature.
0.6
0.8
ID (Amperes)
BVDSS Variation with
On-Resistance vs. Drain
FIGURE 2-10:
Current.
1.0
1.5
2.4
1.3
2.0
VDS = 10V
O
VGS(OFF) (normalized)
ID (Amperes)
0.6
TA = 25OC
0.4
TA = 125OC
1.1
1.6
VGS(OFF) @ 10µA
0.9
1.2
0.7
0.2
RDS(ON) (normalized)
TA = -55 C
0.8
0.8
RDS(ON) @ 0V, 150mA
0.5
0
-3
-2
-1
0
1
2
0.4
-50
0
50
150
TJ ( C)
VGS (Volts)
FIGURE 2-8:
100
O
Transfer Characteristics.
FIGURE 2-11:
VGS(th) and RDS(ON)
Variation with Temperature.
3
300
VGS = -5.0V
ID = 150mA
VDS = 30V
2
250
200
VGS (volts)
C (picofarads)
1
150
0
-1
-2
CISS
100
-3
50
-4
COSS
CRSS
-5
0
0
10
20
30
40
0
FIGURE 2-9:
Source Voltage.
Capacitance vs. Drain-to-
2018 Microchip Technology Inc.
1
2
3
4
5
6
QG (nanocoulombs)
VDS (Volts)
FIGURE 2-12:
Characteristics.
Gate Drive Dynamic
DS20005438A-page 5
DN3545
3.0
PIN DESCRIPTION
The details on the pins of 3-lead TO-92 and 3-lead
SOT-89 packages are listed on Table 3-1
and Table 3-2, respectively. The locations of pins are
indicated in Package Types.
TABLE 3-1:
3-LEAD TO-92 PIN FUNCTION TABLE
Pin Number
Pin Name
Description
1
Source
Source
2
Gate
Gate
3
Drain
Drain
TABLE 3-2:
3-LEAD SOT-89 PIN FUNCTION TABLE
Pin Number
Pin Name
Description
1
Gate
Gate
2, 4
Drain
Drain
3
Source
Source
DS20005438A-page 6
2018 Microchip Technology Inc.
DN3545
4.0
FUNCTIONAL DESCRIPTION
Figure 4-1 illustrates the switching waveforms and test
circuit for DN3545.
0V
VDD
90%
INPUT
Pulse
Generator
10%
-10V
t(ON)
t(OFF)
tr
td(ON)
VDD
td(OFF)
RGEN
10%
90%
0V
INPUT
D.U.T.
90%
Switching Waveforms and Test Circuit.
FIGURE 4-1:
TABLE 4-1:
OUTPUT
tf
10%
OUTPUT
RL
PRODUCT SUMMARY
BVDSX/BVDGX
(V)
RDS(ON)
(Maximum)
(Ω)
IDSS
(Minimum)
(mA)
450
20
200
2018 Microchip Technology Inc.
DS20005438A-page 7
DN3545
5.0
5.1
PACKAGING INFORMATION
Package Marking Information
3-lead TO-92
Example
XXXXXX
XX e3
YWWNNN
DN3545
N3 e3
814687
3-lead TO-243AA
XXXXYWW
NNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS20005438A-page 8
Example
DN5M813
343
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
2018 Microchip Technology Inc.
DN3545
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
2018 Microchip Technology Inc.
DS20005438A-page 9
DN3545
3-Lead TO-243AA (SOT-89) Package Outline (N8)
D
D1
C
E H
L
1
2
E1
3
b
b1
e
A
e1
Side View
Top View
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Symbol
Dimensions
(mm)
A
b
b1
C
D
D1
E
E1
MIN
1.40
0.44
0.36
0.35
4.40
1.62
2.29
2.00†
NOM
-
-
-
-
-
-
-
-
MAX
1.60
0.56
0.48
0.44
4.60
1.83
2.60
2.29
e
e1
1.50
BSC
3.00
BSC
H
L
3.94
0.73†
-
-
4.25
1.20
JEDEC Registration TO-243, Variation AA, Issue C, July 1986.
† This dimension differs from the JEDEC drawing
Drawings not to scale.
DS20005438A-page 10
2018 Microchip Technology Inc.
DN3545
APPENDIX A:
REVISION HISTORY
Revision A (April 2018)
• Converted Supertex doc #DSFP-DN3545 to
Microchip DS20005438A
• Added sections to comply with the standard
Microchip format
• Changed the package marking format
• Removed the 3-lead TO-92 N3 P002, P003,
P005, P013 and P014 media types
• Made minor text changes throughout the document
2018 Microchip Technology Inc.
DS20005438A-page 11
DN3545
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
PART NO.
Packages:
DN3545
X
-
Environmental
N3
=
3-lead TO-92
=
3-lead SOT-89
Media Type
Examples:
a) DN3545N3-G:
N-Channel Depletion-Mode
Vertical DMOS FET, 3-lead
TO-92, 1000/Bag
b) DN3545N8-G:
N-Channel Depletion-Mode
Vertical DMOS FET, 3-lead
SOT-89, 2000/Reel
= Lead (Pb)-free/RoHS-compliant Package
(blank)
= 1000/Bag for an N3 Package
(blank)
= 2000/Reel for an N8 Package
DS20005438A-page 12
X
= N-Channel Depletion-Mode Vertical DMOS FET
N8
Environmental: G
Media Types:
-
Package
Options
Device
Device:
XX
2018 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
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and may be superseded by updates. It is your responsibility to
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© 2018, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-2936-4
== ISO/TS 16949 ==
2018 Microchip Technology Inc.
DS20005438A-page 13
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DS20005438A-page 14
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Fax: 34-91-708-08-91
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Tel: 46-31-704-60-40
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Tel: 46-8-5090-4654
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Tel: 44-118-921-5800
Fax: 44-118-921-5820
2018 Microchip Technology Inc.
10/25/17
