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DSC6331JI2GA-027.0000T

DSC6331JI2GA-027.0000T

  • 厂商:

    ACTEL(微芯科技)

  • 封装:

    XO-4P_2520(METRIC)

  • 描述:

    MEMS OSC XO 27.0000MHZ LVCMOS

  • 数据手册
  • 价格&库存
DSC6331JI2GA-027.0000T 数据手册
DSC63XX Ultra-Small, Ultra-Low Power MEMS Oscillator with Spread Spectrum Features General Description • Output Frequency: 1 MHz to 100 MHz LVCMOS • Spread Spectrum Options: - Center Spread: ±0.25%, ±0.5%, ±1.0%, ±1.5%, ±2.0%, ±2.5% - Down Spread: –0.5%, –1.0%, –1.5%, –2.0%, –2.5%, –3.0% • Ultra-Low Power Consumption: 3 mA (Active), 12 A (Standby) • Wide Supply Voltage Range: 1.71V ~ 3.63V VDD • Ultra-Small Package Sizes: - 1.6 mm  1.2 mm - 2.0 mm  1.6 mm - 2.5 mm  2.0 mm - 3.2 mm  2.5 mm • Industrial Temperature Range: –40°C to 85°C • Excellent Shock and Vibration Immunity • High Reliability • Lead Free and RoHS Compliant The DSC63xx family of devices is the industry’s smallest and lowest-power spread-spectrum MEMS oscillators. Available in four different package sizes with operation as low as 3 mA, the smallest 4-pin package is a mere 1.6 mm x 1.2 mm in size. The devices support up to ±2.5% or –3% spread spectrum that can achieve up to 15 dB electromagnetic interference (EMI) reduction. Because of industry standard package and pin options, customers can solve last minute EMI problems simply by putting the new DSC63xx on their current board layout with no redesign required. The DSC63xx family is available in ultra-small 1.6 mm x 1.2 mm and 2.0 mm x 1.6 mm packages. Other package sizes include: 2.5 mm x 2.0 mm and 3.2 mm x 2.5 mm. These packages are “drop-in” replacements for standard 4-pin CMOS quartz crystal oscillators. Applications • • • • Flat Panel Display/Monitor Multi-Function Printer Digital Signage Consumer Electronics  2017 Microchip Technology Inc. DS20005808A-page 1 DSC63XX Package Types DSC63XX 3.2 mm x 2.5 mm DFN 2.5 mm x 2.0 mm LGA 2.0 mm x 1.6 mm LGA 1.6 mm x 1.2 mm LGA (Top View) OE/STDBY/SSEN 1 4 VDD GND 2 3 OUT Block Diagram DSC63XX DIGITAL CONTROL SUPPLY REGULATION VDD PIN 4 OE/STBY/SSEN PIN 1 SST MEMS RESONATOR GND PIN 2 DS20005808A-page 2 TEMP SENSOR CONTROL & COMPENSATION PLL VCO OUTPUT DIVIDER DRIVER OUTPUT PIN 3  2017 Microchip Technology Inc. DSC63XX 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Supply Voltage .......................................................................................................................................... –0.3V to +4.0V Input Voltage (VIN) ..............................................................................................................................–0.3V to VDD+0.3V ESD Protection ............................................................................................................ 4 kV HBM, 400V MM, 2 kV CDM DSC63XX ELECTRICAL CHARACTERISTICS Electrical Characteristics: Unless otherwise indicated, VDD = 1.8V –5% to 3.3V +10%, TA = –40°C to 85°C. Parameters Sym. Min. Typ. Max. Units Conditions Supply Voltage, Note 1 VDD 1.71 — 3.63 V — Power Supply Ramp tPU 0.1 — 100 ms Note 8 Active Supply Current IDD — 3.0 — mA FOUT = 27 MHz, VDD = 1.8V, No Load — 12 — — 80 — — — ±25 ±50 — — ±5 — — ±1 Standby Supply Current Note 2 ISTBY µA VDD = 3.3V Frequency Stability Note 3 ∆f Aging ∆f Startup Time tSU — — 1.3 ms From 90% VDD to valid clock output, T = 25°C VIH 0.7 x VDD — — V Input Logic High VIL — — 0.3 x VDD V Input Logic Low Output Disable Time Note 5 tDA — — 200+Period ns — Output Enable Time Note 6 tEN — — 1 µs — OE/STDBY/SSEN Pull-up Resistor Note 7 — — 300 — kΩ If configured Input Logic Levels Note 4 VOH 0.8 x VDD — — ppm VDD = 1.8/2.5V ppm V Output Logic Levels VOL Note 1: 2: 3: 4: 5: 6: 7: 8: — — 0.2 x VDD V All temp ranges 1st year @25°C Per year after first year Output Logic High, I = 3 mA, Std. Drive Output Logic High, I = 6 mA, High Drive Output Logic Low, I = –3 mA, Std. Drive Output Logic Low, I = –6 mA, High Drive Pin 4 VDD should be filtered with 0.1 µf capacitor. Not including current through pull-up resistor on EN pin (if configured). Higher standby current seen at >3.3V VDD. Includes frequency variations due to initial tolerance, temperature, and power supply voltage. Input waveform must be monotonic with rise/fall time < 10 ms Output Disable time takes up to one period of the output waveform + 200 ns. For parts configured with OE, not Standby. Output is enabled if pad is floated or not connected. Time to reach 90% of target VDD. Power ramp rise must be monotonic.  2017 Microchip Technology Inc. DS20005808A-page 3 DSC63XX DSC63XX ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, VDD = 1.8V –5% to 3.3V +10%, TA = –40°C to 85°C. Parameters Sym. Min. Typ. Max. Units Conditions — 1 1.5 ns — 0.5 1.0 ns DSC63x2 VDD = 1.8V High Drive, 20% to 80% CL = 15 pF VDD = 2.5V/3.3V — 1.2 2.0 ns — 1 1.6 ns DSC63x1 VDD = 1.8V Std Drive, 20% to 80% CL = 10 pF VDD = 2.5V/3.3V f0 1 — 100 MHz — Output Duty Cycle SYM 45 — 55 % — Period Jitter, RMS JPER — 14 — — 11 — — 75 — — 53 — — 33 — — ±0.25 — — ±0.5 — — ±1 — — ±1.5 — — ±2 — — ±2.5 — — –0.25 — — –0.5 — — –1 — — –1.5 — — –2 — — –3 — tRX/tFX Output Transition Time Rise Time/Fall Time tRY/tFY Frequency Cycle-to-Cycle Jitter (peak) Spread Spectrum Modulation Frequency Spread Spectrum Modulation and Type Note 1: 2: 3: 4: 5: 6: 7: 8: JCy–Cy fSS — psRMS FOUT = 27 MHz ps FOUT = 27 MHz VDD = 1.8V VDD = 2.5V/3.3V VDD = 1.8V VDD = 2.5V/3.3V kHz — % Center Spread % Down Spread Pin 4 VDD should be filtered with 0.1 µf capacitor. Not including current through pull-up resistor on EN pin (if configured). Higher standby current seen at >3.3V VDD. Includes frequency variations due to initial tolerance, temperature, and power supply voltage. Input waveform must be monotonic with rise/fall time < 10 ms Output Disable time takes up to one period of the output waveform + 200 ns. For parts configured with OE, not Standby. Output is enabled if pad is floated or not connected. Time to reach 90% of target VDD. Power ramp rise must be monotonic. DS20005808A-page 4  2017 Microchip Technology Inc. DSC63XX TEMPERATURE SPECIFICATIONS (Note 1) Parameters Sym. Min. Typ. Max. Units Conditions TJ — — +150 °C Ambient Operating Temperature TA –40 — +85 °C Industrial Ambient Operating Temperature TA –20 — +70 °C Extended Commercial Storage Ambient Temperature Range TA –55 — +150 °C — Soldering Temperature TS — +260 — °C 40 sec. max. Temperature Ranges Junction Operating Temperature Note 1: — The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, θJA). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability.  2017 Microchip Technology Inc. DS20005808A-page 5 DSC63XX 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: DSC63XX PIN FUNCTION TABLE (OUTPUT FREQUENCY ≥1 MHZ) Pin Number Pin Name Pin Type Output Enable: H = Specified Frequency Output, Note 1, Note 2 L = Output is high impedance OE 1 STDBY I 2 GND Power Power supply ground 3 Output O Oscillator clock output VDD Power Power supply, Note 3 4 2: 3: 2.1 Standby: H = Specified Frequency Output, Note 1, Note 2 L = Output is high impedance. Device is in low power mode, supply current is at ISTBY Spread Spectrum Enable: H = Enabled L = Disabled, Note 1 SSEN Note 1: Description DSC630x/1x/3x has 300 kΩ internal pull-up resistor on pin 1. DSC634x/5x/7x has no internal pull-up resistor on pin 1 and needs an external pull-up or to be driven by other chip. If pin 1 is configured as either OE or STDBY, then the Spread Spectrum is enabled by default. Bypass with 0.1 µF capacitor placed as close to VDD pin as possible. Output Buffer Options The DSC63xx family is available in multiple output driver configurations. The standard-drive (63x1) and high-drive (63x2) deliver respective output currents of greater than 3 mA and 6 mA at 20%/80% of the supply voltage. For heavy loads of 15 pF or higher, the high-drive option is recommended. DS20005808A-page 6  2017 Microchip Technology Inc. DSC63XX 3.0 DIAGRAMS tR tF VOH OUTPUT VOL tEN 1/fo tDA VIH ENABLE FIGURE 3-1: VIL Output Waveform. IDD VDD 0.1μF 4 3 1 2 CL VDA FIGURE 3-2: Test Circuit. Via to GND Layer C1 VDD Enable FIGURE 3-3: Output GND Via to GND Layer Recommended Board Layout.  2017 Microchip Technology Inc. DS20005808A-page 7 DSC63XX 4.0 SPREAD SPECTRUM Spread spectrum is a slow modulation of the clock frequency over time. The PLL inside the MEMS oscillator is modulated with a triangular wave at 33 kHz. With such a slow modulation, the peak spectral energy of both the fundamental and all the harmonics is spread over a wider frequency range and such an energy is significantly reduced, thus providing an EMI reduction. The triangular wave is chosen because of its flat spectral density. The DSC63xx MEMS oscillator family offers several modulation options: the spreading is either center spread or down spread with respect to the clock frequency. Center spreading ranges from ±0.25% to ±2.5%, while down spreading ranges from –0.25% to – 3%. FIGURE 4-2: DSC6331 Spectrum at 33.333 MHz with Modulation Turned On. If the clock frequency is 100 MHz and center spreading with ±1% is chosen, the output clock will range from 99 MHz to 101 MHz. If down spreading with –2% is chosen, the output clock will range from 98 MHz to 100 MHz. It is noticeable that the spread spectrum provides a reduction of about 10 dB from the peak power. Such a reduction may also be estimated by the following equation: Figure 4-1 and Figure 4-2 show a spectrum example of the DSC6331 with a 33.333 MHz clock, modulated with central spread of ±1%. EQUATION 4-1: EMI Reduction = 10  Log10  S  fc  RBW  Where: S Peak-to-peak spread percentage (0.01, this example). fc Carrier frequency (33.333 Mhz, this example). RBW Resolution bandwidth of the spectrum analyzer (30 kHz, this example). The theoretical calculation for this example provides 10.45 dB, which is consistent with the measurement. FIGURE 4-1: DSC6331 Spectrum at 33.333 MHz with Modulation Turned Off. DS20005808A-page 8 Similarly to the fundamental frequency, all the harmonics are spread and attenuated in similar fashion. Figure 4-3 shows how the DSC6331 fundamental at 33.333 MHz and its odd harmonics are attenuated when various types of modulations are selected. For picture clarity, only the center spread options are shown. However, down spread with corresponding percentage provides the same level of harmonic attenuation (e.g. central spread of ±1% provides the same harmonics attenuation of down spread with –2%).  2017 Microchip Technology Inc. DSC63XX FIGURE 4-3: DSC6331 Harmonic Levels with Various Spread Spectrum Options.  2017 Microchip Technology Inc. DS20005808A-page 9 DSC63XX SOLDER REFLOW . 5.0 ax cm se ax cm se 3° C/ Reflow Pre-Heat 8 minutes max. FIGURE 5-1: ax. 25°C 60-180 Seconds cm 150°C 60-150 Seconds /se . 3° C/ 217°C 200°C 6°C Temperature (°C) 260°C 20-40 Seconds Cool Time Solder Reflow Profile. MSL 1 @ 260°C refer to JSTD-020C Ramp-Up Rate (200°C to Peak Temp) 3°C/sec max. Pre-heat Time 150°C to 200°C 60 to 180 sec. Time maintained above 217°C 60 to 150 sec. Peak Temperature 255°C to 260°C Time within 5°C of actual Peak 20 to 40 sec. Ramp-Down Rate 6°C/sec. max. Time 25°C to Peak Temperature 8 minutes max. DS20005808A-page 10  2017 Microchip Technology Inc. DSC63XX 6.0 PACKAGING INFORMATION 6.1 Package Marking Information 4-Lead DFN* XXXXXXX DCPYYWW SSS 4-Lead VFLGA* XXXW SSS Legend: XX...X Y YY WW NNN e3 * Example 0333333 DCP1734 943 Example 0069 SSS Product code, customer-specific information, or frequency in MHz without printed decimal point Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code e3 Pb-free JEDEC® designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. ●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle mark). Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo. Underbar (_) and/or Overbar (⎯) symbol may not be to scale.  2017 Microchip Technology Inc. DS20005808A-page 11 DSC63XX 4-Lead VFLGA 1.6 mm x 1.2 mm Package Outline 4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) (DATUM B) NOTE 1 E 2X 0.05 C 1 2X 2 TOP VIEW 0.05 C 0.10 C A1 A C SEATING PLANE 4X (A3) 0.08 C SIDE VIEW b2 3X b1 CH 1 2 CH NOTE 1 0.07 0.03 C A B C e1 e1 2 4X L N e BOTTOM VIEW Microchip Technology Drawing C04-1199A Sheet 1 of 2 DS20005808A-page 12  2017 Microchip Technology Inc. DSC63XX 4-Lead VFLGA 1.6 mm x 1.2 mm Package Outline 4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Terminals N e Terminal Pitch Terminal Pitch e1 A Overall Height Standoff A1 Substrate Thickness (with Terminals) A3 Overall Length D E Overall Width b1 Terminal Width b2 Terminal Width L Terminal Length Terminal 1 Index Chamfer CH MILLIMETERS NOM MAX 4 1.20 BSC 0.75 BSC 0.79 0.89 0.84 0.00 0.05 0.02 0.20 REF 1.60 BSC 1.20 BSC 0.25 0.30 0.35 0.325 0.425 0.375 0.30 0.40 0.35 0.125 MIN Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-1199A Sheet 2 of 2  2017 Microchip Technology Inc. DS20005808A-page 13 DSC63XX 4-Lead VFLGA 1.6 mm x 1.2 mm Recommended Land Pattern 4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E1 X1 G1 4 Y C G2 1 2 (CH) SILK SCREEN X2 E2 RECOMMENDED LAND PATTERN Units Dimension Limits Contact Pitch E1 Contact Pitch E2 Contact Spacing C Contact Width (X3) X1 Contact Width X2 Contact Pad Length (X6) Y Space Between Contacts (X4) G1 Space Between Contacts (X3) G2 Contact 1 Index Chamfer CH MIN MILLIMETERS NOM 1.20 BSC 1.16 BSC 0.75 MAX 0.35 0.43 0.50 0.85 0.25 0.13 X 45° REF Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-3199A DS20005808A-page 14  2017 Microchip Technology Inc. DSC63XX 4-Lead VLGA 2.0 mm x 1.6 mm Package Outline 4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) (DATUM B) NOTE 1 E 2X 0.05 C 1 2X 2 TOP VIEW 0.05 C 0.10 C C A1 A SEATING PLANE 4X (A3) SIDE VIEW b2 3X b1 0.07 0.03 CH 1 0.08 C 2 CH NOTE 1 C A B C e1 e1 2 4X L N e BOTTOM VIEW Microchip Technology Drawing C04-1200A Sheet 1 of 2  2017 Microchip Technology Inc. DS20005808A-page 15 DSC63XX 4-Lead VLGA 2.0 mm x 1.6 mm Package Outline (Continued) 4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Terminals N e Terminal Pitch Terminal Pitch e1 Overall Height A Standoff A1 Substrate Thickness (with Terminals) A3 Overall Length D Overall Width E b1 Terminal Width Terminal Width b2 Terminal Length L Terminal 1 Index Chamfer CH MIN 0.79 0.00 0.30 0.40 0.50 - MILLIMETERS NOM 6 1.55 BSC 0.95 BSC 0.84 0.02 0.20 REF 2.00 BSC 1.60 BSC 0.35 0.45 0.55 0.15 MAX 0.89 0.05 0.40 0.50 0.60 - Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-1200A Sheet 2 of 2 DS20005808A-page 16  2017 Microchip Technology Inc. DSC63XX 4-Lead VFLGA 2.0 mm x 1.6 mm Package Outline 4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging X1 4 Y G2 C 1 2 (CH) G1 SILK SCREEN E RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Contact Spacing C Contact Width (X4) X1 Contact Width (X2) X2 Contact Pad Length (X6) Y Space Between Contacts (X4) G1 Space Between Contacts (X3) G2 Contact 1 Index Chamfer CH MIN MILLIMETERS NOM 1.55 BSC 0.95 MAX 0.50 0.40 0.70 1.05 0.25 0.13 X 45° REF Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-3200A  2017 Microchip Technology Inc. DS20005808A-page 17 DSC63XX 4-Lead VLGA 2.5 mm x 2.0 mm Package Outline 4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) (DATUM B) NOTE 1 E 2X 0.05 C 1 2X 0.05 C 2 TOP VIEW 0.10 C A1 C A SEATING PLANE (A3) 4X SIDE VIEW 0.08 C 4X b1 CH 1 2 CH NOTE 1 0.07 0.03 C A B C e1 e1 2 4X L N e BOTTOM VIEW Microchip Technology Drawing C04-1202A Sheet 1 of 2 DS20005808A-page 18  2017 Microchip Technology Inc. DSC63XX 4-Lead VLGA 2.5 mm x 2.0 mm Package Outline (Continued) 4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Terminals N e Terminal Pitch e1 Terminal Pitch Overall Height A Standoff A1 Substrate Thickness (with Terminals) A3 Overall Length D Overall Width E Terminal Width b1 Terminal Length L Terminal 1 Index Chamfer CH MIN 0.79 0.00 0.60 0.60 - MILLIMETERS NOM 4 1.65 BSC 1.25 BSC 0.84 0.02 0.20 REF 2.50 BSC 2.00 BSC 0.65 0.65 0.225 MAX 0.89 0.05 0.70 0.70 - Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-1202A Sheet 2 of 2  2017 Microchip Technology Inc. DS20005808A-page 19 DSC63XX 4-Lead VLGA 2.5 mm x 2.0 mm Recommended Land Pattern 4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging X 4 Y C G2 1 2 (CH) G1 SILK SCREEN E RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Contact Spacing C Contact Width (X4) X Contact Pad Length (X6) Y Space Between Contacts (X4) G1 Space Between Contacts (X3) G2 Contact 1 Index Chamfer CH MIN MILLIMETERS NOM 1.65 BSC 1.25 MAX 0.70 0.80 0.95 0.45 0.13 X 45° REF Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-3202A DS20005808A-page 20  2017 Microchip Technology Inc. DSC63XX 4-Lead CDFN 3.2 mm x 2.5 mm Package Outline and Recommended Land Pattern Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging TITLE 4 LEAD CDFN 3.2x2.5mm COL PACKAGE OUTLINE & RECOMMENDED LAND PATTERN DRAWING # CDFN3225-4LD-PL-1 UNIT MM NOTE: 1. Green shaded rectangles in Recommended Land Pattern are solder stencil opening.  2017 Microchip Technology Inc. DS20005808A-page 21 DSC63XX NOTES: DS20005808A-page 22  2017 Microchip Technology Inc. DSC63XX APPENDIX A: REVISION HISTORY Revision A (September 2017) • Initial release of DSC63xx Microchip data sheet DS20005808A.  2017 Microchip Technology Inc. DS20005808A-page 23 DSC63XX NOTES: DS20005808A-page 24  2017 Microchip Technology Inc. DSC63XX PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. PART NO. X Examples: X X X X X X – XXX.XXXX X Device Pin 1 Output Package Temp. Freq. Spread Revision Frequency Tape Definition Drive and Range Stability Spectrum Strength Reel Device: DSC63xx: Pin Definition: Ultra-Low Power MEMS Oscillator Selection Pin 1 Internal Pull Register 0 OE Pull-up 1 STDBY Pull-up 3 SSEN Pull-up 4 OE None 5 STDBY None 7 SSEN None a) DSC6332JI2AA-100.0000: Ultra–Low Power MEMS Oscillator, Pin1 = Spread Spectrum Enable with Internal Pull-Up, High Drive Strength, 4-Lead 2.5 mm x 2.0 mm VFLGA, Industrial Temperature, ±25 ppm Stability, ±0.25% Spread Spectrum, Revision A, 100 MHz Frequency, 110/Tube b) DSC6301HE1HA-016.0000T: Ultra–Low Power MEMS Oscillator, Pin1 = OE with Internal Pull–Up, Standard Drive Strength, 4-Lead 1.6 mm x 1.2 mm VFLGA, Extended Commercial Temp., ±50 ppm Stability, –0.5% Spread Spectrum Revision A, 16 MHz Frequency, 1,000/Reel Note 1: Output Drive Strength: 1 2 Packages: C J M H = = = = 4-Lead 3.2 mm x 2.5 mm DFN 4-Lead 2.5 mm x 2.0 mm VFLGA 4-Lead 2.0 mm x 1.6 mm VFLGA 4-Lead 1.6 mm x 1.2 mm VFLGA Temperature Range: E I = = –20C to +70C (Extended Commercial) –40C to +85C (Industrial) Frequency Stability: 1 2 = = ± 50 ppm ± 25 ppm Spread Spectrum: A B C D E F G H I J K L M = = = = = = = = = = = = = ±0.25% ±0.5% ±1.0% ±1.5% ±2.0% ±2.5% –0.25% –0.5% –1.0% –1.5% –2.0% –3.0% Custom Revision: A = Revision A Frequency: xxx.xxxx = User-Defined Frequency between 001.0000 MHz and 100.0000 MHz Tape and Reel: = T = Note 1: Standard High Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. 110/Tube 1,000/Reel Please visit Microchip ClockWorks® Configurator Website to configure the part number for customized frequency. http://clockworks.microchip.com/timing/.  2017 Microchip Technology Inc. DS20005808A-page 25 DSC63XX NOTES: DS20005808A-page 26  2017 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV Trademarks The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2017, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-2146-7 == ISO/TS 16949 ==  2017 Microchip Technology Inc. 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