EMC1824T-2E/9R

Multi-Channel Low-Voltage Temp Sensors with Shutdown EMC1822/23/24/25/43 Features • • • • • • • • • • Measures Temperature Rate of Change Calculation with Preemptive Alert(s) Limits Up to Four External Temperature Monitors: – 8-Lead Devices: ±1°C maximum accuracy (-20°C to +105°C TA, -40°C to +125°C TD) – ±1.5°C maximum accuracy (-40°C to +125°C TA, -40°C to +125°C TD) – 10-Lead Devices: ±1°C maximum accuracy (-20°C to +125°C TA, -40°C to +125°C TD) – ±1.5°C maximum accuracy (-40°C to +125°C TA, -40°C to +125°C TD) Internal Temperature Sensor: – ±1°C maximum accuracy, -40°C to +125°C Temperature Sensor Resolution (Internal/External): 0.125°C Resistor Programmable System Shutdown Temperature Configurable Alert Pins Operating Voltage: 1.62V to 3.6V Temperature Range: -40°C to +125°C Other Features: Auto-Beta Compensation, Configurable Ideality Factor, Hottest Diode Compare, Resistance Error Correction Available in 8-Lead 2x2 mm WDFN, 10-Lead 2.5x2.0 mm VDFN and 10-Lead MSOP Packages Typical Applications • • • • • • • Temperature Sensitive Storage Industrial IoT for Low System Voltage Portable Electronics Handheld Gaming Computing Food Storage © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 1 Multi-Channel Low-Voltage Temp Sens... Description The EMC1822/23/24/25/43 devices are high-accuracy, two-wire (I2C) temperature sensors with resistor programmable system shutdown. The devices monitor up to five temperature channels. Advanced features, such as Resistance Error Correction (REC), Beta Compensation (to support CPU diodes requiring the BJT/Transistor model) and rate of temperature change measurement combine to provide a robust solution for complex environmental monitoring applications. This device family introduces Rate of Change (ROC) temperature measurement with associated alerts. This provides a preemptive system alert and another protective measurement layer to catch and manage variable system temperatures. The Resistance Error Correction feature automatically eliminates the temperature error caused by series resistance, allowing for greater flexibility in routing thermal diodes. Beta compensation eliminates temperature errors caused by low, variable beta transistors common in current fine geometry processors. The automatic beta detection feature determines the optimal sensor external diode/transistor settings. This frees up the user from providing unique sensor configurations for each temperature monitoring application. These advanced features plus ±1°C measurement accuracy for both external and internal diode temperatures provide a low-cost, highly flexible and accurate solution for critical temperature monitoring applications. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 2 Multi-Channel Low-Voltage Temp Sens... Table of Contents Features......................................................................................................................................................... 1 Typical Applications........................................................................................................................................1 Description..................................................................................................................................................... 2 1. Package Types........................................................................................................................................5 2. Functional Block Diagram....................................................................................................................... 6 3. Electrical Characteristics.........................................................................................................................7 3.1. Absolute Maximum Ratings..........................................................................................................7 4. Typical Operating Curves...................................................................................................................... 11 5. Pin Descriptions.................................................................................................................................... 12 5.1. 5.2. 5.3. 5.4. 5.5. 5.6. 5.7. 5.8. 5.9. 5.10. 5.11. 5.12. 5.13. 5.14. 5.15. 6. 7. Power Supply (VDD)................................................................................................................... 13 Diode 1 Pair (DN1/DP1)............................................................................................................. 13 System Shutdown...................................................................................................................... 13 Ground (GND)............................................................................................................................ 13 Maskable ALERT (ALERT/THERM2).........................................................................................13 SMBus/I2C Data (SDA).............................................................................................................. 13 DP/DP1...................................................................................................................................... 13 DN/DN1...................................................................................................................................... 13 DP2............................................................................................................................................ 13 DN2............................................................................................................................................ 14 Anti-Parallel Diode Pair (DP2/DN3 and DN2/DP3).................................................................... 14 Anti-Parallel Diode Pair (DP1/DN2 and DN1/DP2).................................................................... 14 Anti-Parallel Diode Pair (DP3/DN4 and DN3/DP4).................................................................... 14 SMBus Clock (SCL)................................................................................................................... 14 Exposed Thermal Pad (EP)........................................................................................................14 Detailed Description.............................................................................................................................. 15 System Block Diagram..........................................................................................................................16 7.1. 7.2. 7.3. 7.4. 7.5. 7.6. 7.7. 7.8. 7.9. 7.10. 7.11. 7.12. 7.13. 7.14. Temperature Measurement........................................................................................................ 16 Temperature Measurement Results and Data............................................................................16 Limit Registers............................................................................................................................17 Limit Register Interaction............................................................................................................17 ALERT/THERM2 Output............................................................................................................ 18 System Shutdown...................................................................................................................... 19 External Diode Connections.......................................................................................................20 Power States.............................................................................................................................. 21 Conversion Rates.......................................................................................................................21 Dynamic Averaging.................................................................................................................... 22 Digital Filter................................................................................................................................ 23 Beta Compensation....................................................................................................................24 Resistance Error Correction (REC)............................................................................................ 25 Programmable External Diode Ideality Factor............................................................................25 © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 3 Multi-Channel Low-Voltage Temp Sens... 7.15. 7.16. 7.17. 7.18. 8. System Management Bus Protocol.......................................................................................................31 8.1. 8.2. 8.3. 8.4. 8.5. 8.6. 8.7. 8.8. 8.9. 8.10. 8.11. 9. Diode Faults............................................................................................................................... 26 Consecutive Alerts..................................................................................................................... 26 “Hottest Of” Comparison............................................................................................................ 28 Rate of Change.......................................................................................................................... 28 SMBus Start Bit.......................................................................................................................... 31 SMBus Address and RD/WR Bit................................................................................................ 31 SMBus Data Bytes..................................................................................................................... 31 SMBus ACK and NACK Bits...................................................................................................... 31 SMBus Stop Bit.......................................................................................................................... 31 SMBus Time-out.........................................................................................................................31 SMBus and I2C Compliance.......................................................................................................31 SMBus Protocols........................................................................................................................32 THERM Pin Considerations....................................................................................................... 33 Register Summary......................................................................................................................35 Data Read Interlock....................................................................................................................37 Packaging Information.......................................................................................................................... 88 9.1. Package Marking Information.....................................................................................................88 10. Revision History.................................................................................................................................... 95 The Microchip Website.................................................................................................................................96 Product Change Notification Service............................................................................................................96 Customer Support........................................................................................................................................ 96 Product Identification System.......................................................................................................................97 Microchip Devices Code Protection Feature................................................................................................ 97 Legal Notice................................................................................................................................................. 98 Trademarks.................................................................................................................................................. 98 Quality Management System....................................................................................................................... 98 Worldwide Sales and Service.......................................................................................................................99 © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 4 Multi-Channel Low-Voltage Temp Sens... Package Types 1. Package Types EMC1822 2x2 WDFN* EMC1823 2.5x2.0 VDFN* VDD 1 8 SCL VDD 1 10 SCL DP 2 7 SDA DP1 2 9 SDA DN 3 6 ALERT/THERM2 DN1 3 8 ALERT/THERM2 SYS_SHDN 4 5 GND DP2 4 7 SYS_SHDN DN2 5 6 GND EMC1824 2.5x2.0 VDFN* VDD 1 10 SCL DP1 2 9 SDA DN1 3 8 ALERT/THERM2 DP2/DN3 4 7 SYS_SHDN DN2/DP3 5 6 GND EMC1825 2.5x2.0 WDFN* EMC1843 2x2 WDFN* VDD 1 10 SCL DP1/DN2 2 9 SDA DN1/DP2 3 8 ALERT/THERM2 DP3/DN4 4 7 SYS_SHDN DN3/DP4 5 6 GND VDD 1 8 SCL DP1/DN2 2 7 SDA DN1/DP2 3 6 ALERT/THERM2 SYS_SHDN 4 5 GND Note:  * Includes Exposed Thermal Pad (EP); see 5. Pin Descriptions © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 5 Multi-Channel Low-Voltage Temp Sens... Functional Block Diagram 2. Functional Block Diagram VDD EMC1822/23/24 EMC1823/EMC1824 only SYS_SHDN Limit * EMC1824 only Switching Current Conversion Rate Register DP1** DN1** Analog Mux DP2/DN3* �� ADC External Temperature Register(s) SDA DN2/DP3* ALERT / THERM Digital MUX Internal Temperature Register Internal Temp Diode SCL Limit Comp Digital MUX Low Limit Registers SM Bus High Limit Registers Configuration Register Interupt Masking Status Registers SYS_SHDN GND VDD EMC1825 SYS_SHDN Limit Switching Current Conversion Rate Register DP1/DN2 DN1/DP2 Analog Mux DP3/DN4 �� ADC External Temperature Register(s) SDA DN3/DP4 Internal Temp Diode ALERT / THERM SCL Digital MUX Internal Temperature Register Limit Comp Digital MUX Low Limit Registers High Limit Registers SM Bus Configuration Register Interupt Masking Status Registers SYS_SHDN GND © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 6 Multi-Channel Low-Voltage Temp Sens... Electrical Characteristics 3. Electrical Characteristics 3.1 Absolute Maximum Ratings VDD 4.0V Voltage at all Input/Output Pins GND – 0.3V to 4.0V Storage Temperature -65°C to +150°C Ambient Temperature with Power Applied -40°C to +125°C Junction Temperature (TJ) +150°C ESD Protection on All Pins (HBM:MM) (8 kV:400V) Latch-up Current at Each Pin (+25°C) ±200 mA Note:  Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure above maximum rating conditions for extended periods may affect device reliability. Table 3-1. DC Characteristics Electrical Specifications: Unless otherwise specified, all limits apply for typical values at ambient temperature 1.62V ≤ VDD ≤ +3.6V at –40°C ≤ TA ≤ +125°C Parameters Sym. Min. Typ. Max. Units Conditions Supply Voltage VDD 1.62 — 3.6 V Supply Current IDD — 20 80 µA 0.03125 conversion/second, dynamic averaging disabled — 25 164 µA 1 conversion/second, dynamic averaging disabled — 205 432 µA 4 conversions/second, dynamic averaging disabled — 800 — µA > 16 conversions/second, dynamic averaging enabled Standby Supply Current IDD_OS — 15 75 µA Device in One-Shot state, no active I2C communications, ALERT and THERM pins not asserted Power-on Reset Release Voltage PORR — 1.45 — V Rising VDD Power-up Timer tPWRT — 15 — ms VDD Rise Rate VDD_RISE 0.05 — V/ms 0 to 2.75V in ~ 60 ms Internal Temperature Monitor Temperature Accuracy — — ±0.25 ±1 °C External Temperature Monitor © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 7 Multi-Channel Low-Voltage Temp Sens... Electrical Characteristics ...........continued Parameters Min. Typ. Max. Units — ±0.25 ±1 °C -20°C < TA < 105°C, -40°C < TD < +125°C, 2N3904 — ±0.25 ±1.5 °C -40°C < TA < +125°C, -40°C < TD < +125°C, 2N3904 — ±0.25 ±1 °C -20°C < TA < 125°C, -40°C < TD < +125°C, 2N3904 — ±0.25 ±1.5 °C -40°C < TA < +125°C, -40°C < TD < +125°C, 2N3904 — — 0.125 Time to First Communications tINT_T — 15 20 ms Time after power-up before ready to begin communications and measurement Conversion Time per Channel tCONV — 25 — ms Default settings — 5 — ms Temperature Accuracy – 8-Lead Temperature Accuracy – 10-Lead Temperature Resolution Sym. — — Conditions °C Timing and Capacitive Filter Time to First Conversion from One-Shot Time to First Conversion from Standby tCONV1 — 220 — ms Default settings Capacitive Filter CFILTER — 2.2 2.7 nF Connected across external diode Output Low Voltage VOL 0.4 — — V ISINK = 8 mA Leakage Current ILEAK — — ±5 µA ALERT and THERM pins, ALERT and THERM Pins device powered, pull-up voltage < 3.6V SCL and SDA Input High-Level Voltage VIH 0.7 VDD — — V Low-Level Voltage VIL — — 0.3 VDD V Input Current IIN — — ±5 µA SDA and SCL only Low-Level Voltage VOL — — 0.4 V IO = 20 mA, VDD = 1.7V to 3.6V High-Level Current (leakage) IOH — — 1 µA VOH = VDD Low-Level Current IOL — — 20 mA VOL = 0.4V, VDD = 1.62V to 3.6V Capacitance CIN — 5 — pF VHYST — 0.05 VDD — V Output (SDA only) SDA and SCL Inputs Hysteresis © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 8 Multi-Channel Low-Voltage Temp Sens... Electrical Characteristics Table 3-2. Thermal Specifications Electrical Characteristics: Unless otherwise specified, 1.62V ≤ VDD ≤ 3.6V at -40°C ≤ TA ≤ +125°C Parameters Sym. Min. Typ. Max. Units Test Conditions Temperature Ranges Specified Temperature Range TA -40 — +125 °C Operating Temperature Range TA -40 — +125 °C Storage Temperature Range TA -65 — +125 °C Thermal Resistance, 8-Lead WDFN, 2x2 mm θJA — 141.3 — °C/W JEDEC 2s2p, Thermal Resistance, 10-Lead VDFN, 2.5x2.0 mm θJA — 78 — °C/W board size 76.2 x 114.3 x 1.6 mm, Thermal Resistance, 10-Lead MSOP, 3x3 mm θJA Thermal Package Resistances one thermal via, airflow = 0 m/s — 132.2 — °C/W Table 3-3. SMBus Module Specifications Operating Conditions: Unless otherwise indicated, 1.62V ≤ VDD ≤ 3.6V at -40°C ≤ TA ≤ +85°C Characteristic Sym. Min. Typ. Max. Units Conditions SMBus Timing Clock Frequency fSMB 10 — 400 kHz Spike Suppression tSP — — 50 ns Bus Free Time Stop to Start tBUF 1.3 — — µs Hold Time: Start tHD:STA 0.6 — — µs Setup Time: Start tSU:STA 0.6 — — µs Setup Time: Stop tSU:STO 0.6 — — µs Data Hold Time tHD:DAT 0 — — µs When transmitting to the master Data Hold Time tHD:DAT 0 — — µs When receiving from the master Data Setup Time tSU:DAT 100 — — ns Clock Low Period tLOW 1.3 — — µs Clock High Period tHIGH 0.6 — — µs Clock/Data Fall Time tFALL — — 300 ns Min = 20 + 0.1 CLOAD ns Clock/Data Rise Time tRISE — — 300 ns Min = 20 + 0.1 CLOAD ns Capacitive Load CLOAD — — 400 pF Per bus line Time-out tTIMEOUT 25 — 35 ms Disabled by default © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 9 Multi-Channel Low-Voltage Temp Sens... Electrical Characteristics Figure 3-1. SMBus Timing Diagram T HIGH T LOW T HD:STA T SU:STO T FALL SCL T RISE T HD:STA T HD:DAT T SU:DAT T SU:STA SDA TBUF P S © 2018-2020 Microchip Technology Inc. S S - Start Condition Datasheet P - Stop Condition P DS20006048B-page 10 Multi-Channel Low-Voltage Temp Sens... Typical Operating Curves Typical Operating Curves Note:  The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (for example, outside specified power supply range) and therefore outside the warranted range. Figure 4-1. Internal Temperature Error vs. Ambient Temperature (VDD = 2.5V, TD = +25°C, 2N3904) Figure 4-2. Temperature Accuracy vs. Remote Diode Temperature, VDD = 1.8V External Diode Temp Acc 2 2 2 2 22222222 1.5 TA @ -40 Temperature Accuracy (oC) 1 11111111 1 1 0.5 0.5 0.5 0.5 0.5 0.5 0.5 0.5 0.5 0.5 0.5 0 00000000 0 0 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 TA @0 TA @25 0.5 TA @85 TA @105 TA @125 0 -0.5 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1.5 -1.5 -1.5 -1.5 -1.5 -1.5 -1.5 -1.5 -1.5 -1.5 -1.5 -1.5 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -40 -25 -10 5 -40 -25 -10 -40 -40 -40 -40 -40 -40 -40 -40 -25 -25 -25 -25 -25 -25 -25 -25 -10 -10 -10 -10 -10 -10 -10 -10 -10 5 5 -40 -25 55555555 TA @-20 1 -40 -20 0 25 45 65 85 105 125 Ambient Temperature Remote Diode (oC) 20 35 50 65 80 95 110 125 20 35 50 65 80 95 110 125 20 20 20 20 20 20 20 20 35 35 35 35 35 35 35 35 50 50 50 50 50 50 50 50 65 65 65 65 65 65 65 65 80 80 80 80 80 80 80 80 95 95 95 95 95 95 95 95 110 110 110 110 110 110 110 110 110 125 125 125 125 125 125 125 125 125 20 35 50 65 80 95 o o Ambient Temperature C) ooC) o(C) o(C) o(C) o(((C) oC) oC) Ambient Temperature C) Ambient Ambient Ambient Ambient Ambient Ambient Ambient Ambient Temperature Temperature Temperature Temperature Temperature Temperature Temperature Temperature C) Ambient Temperature (((o((C) Figure 4-3. Temperature Error vs. Filter Capacitor (VDD = 2.5V, TA = TD = +25°C, 2N3904) Figure 4-4. Temperature Error vs. Series Resistance (TA = +25°C, VDD = 1.8V) 1 0.4 0.9 0.3 0.8 Temperature Error (oC) REC Enabled 0.5 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 110.5 88.4 0.7 0.6 66.3 0.5 REC Enabled 0.4 RES Disabled 44.2 0.3 0.2 Temperature Error (oC) REC Disabled TT m A C) Tee em mpp pee errrrraa atttttuu urrrrree eA Acc ccc cuu urrrrraa acc cyy y (((((ooooC) C) T e m p e a u e A c c u a c y C) T e m p e a u e A c c u a c y C) T p re c TTTe eeem m pppe eeerrrrra araatttttu u ereeA A cccc cccu uuurrrrra araac cccy yyy(((((ooo(oC) C) oC) T e m p e a u e A c c u a c y C) T e m m mp e a u tuurrrre A A Ac c u a c y C) C) 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 Temperature Accuracy (oC) 22.1 0.1 -0.5 0 500 1000 1500 2000 2500 3000 3500 4000 0 4500 Capacitance (pF) 0 50 100 150 200 0 Series Resistance (Ω) Figure 4-5. IDD vs. VDD Across Temperature 1600 1600 1600 1600 1600 Figure 4-6. Supply Current vs. Conversion Rate (TA = +25°C, VDD = 1.8V) 1400 1400 1400 1400 1400 1200 1200 1200 1200 1200 S u p p y C u e n µ A S SSu uup ppp ppllllly yy C CCu uurrrrrrrrrre een nnttttt (((((µ µµA AA))))) S u p p y C u e n µ A 4. 1000 1000 1000 1000 1000 800 800 800 800 800 Temp=-40 Temp=-40 Temp=-40 Temp=-40 Temp=-40 Temp=0 Temp=0 Temp=0 Temp=0 Temp=0 600 600 600 600 600 Temp=25 Temp=25 Temp=25 Temp=25 Temp=25 Temp=85 Temp=85 Temp=85 Temp=85 Temp=85 Temp=125 Temp=125 Temp=125 Temp=125 Temp=125 400 400 400 400 400 200 200 200 200 200 0000 0 1.6 1.6 1.6 1.6 1.6 2.1 2.1 2.1 2.1 2.1 2.6 2.6 2.6 2.6 2.6 Supply Voltage (V) Supply Supply Supply SupplyVoltage Voltage Voltage Voltage(V) (V) (V) (V) 3.1 3.1 3.1 3.1 3.1 © 2018-2020 Microchip Technology Inc. 3.6 3.6 3.6 3.6 3.6 Datasheet DS20006048B-page 11 Multi-Channel Low-Voltage Temp Sens... Pin Descriptions 5. Pin Descriptions The EMC1822/23/24/25/43 has five variants that include features unique to each device. Refer to the table to determine applicability of the pin descriptions. The description of the pins is listed in the following table. Table 5-1. Pin Function Table EMC1822 EMC1823 EMC1824 EMC1825 EMC1843 Pin Type VDD 1 1 1 1 1 P Power GND 5 6 6 6 5 P Ground ALERT/ THERM2 6 8 8 8 6 OD I2C alert pin SYS_SHDN 4 7 7 7 4 OD System shutdown SDA 7 9 9 9 7 OD I2C data SCL 8 10 10 10 8 OD I2C clock DP1 2 2 2 — — A Diode 1 connection DN1 3 3 3 — — A Diode 1 connection DP2 — 4 — — — A Diode 2 connection DN2 — 5 — — — A Diode 2 connection DP2/DN3 — — 4 — — A Diode 2/3 connection DN2/DP3 — — 5 — — A Diode 2/3 connection DP1/DN2 — — — 2 2 A Diode 1/2 connection DN1/DP2 — — — 3 3 A Diode 1/2 connection DP3/DN4 — — — 4 — A Diode 3/4 connection DN3/DP4 — — — 5 — A Diode 3/4 connection Pin Name Description Legend: P = Power pin; A = Analog pin; OD = Open-Drain pin © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 12 Multi-Channel Low-Voltage Temp Sens... Pin Descriptions 5.1 Power Supply (VDD) This pin is used to supply power to the device. 5.2 Diode 1 Pair (DN1/DP1) Remote Diode 1 anode (DP1) and cathode (DN1) pins. 5.3 System Shutdown The EMC1822/23/24/25/43 devices contain a hardware configured temperature limit circuit that controls the SYS_SHDN pin. The threshold temperature is determined by the pull-up resistors on both the SYS_SHDN and ALERT pins. Note, Standby and One-Shot modes cannot be enabled in device configurations including system shutdown functionality . The final temperature decode is the responsibility of the digital block. The overall decode is shown in Table 7-3. The hardware shutdown circuitry measures the External Diode 1 channel and compares it against the hardware thermal shutdown limit. The THERM pin consecutive alert counter (default 4 for the SYS_SHDN pin) applies to this comparison. If the temperature meets or exceeds the limit for the number of consecutive measurements, the SYS_SHDN pin is asserted. The SYS_SHDN pin remains asserted until the temperature drops below the limit minus 10°C. As well, all of the measurement channels (including the External Diode 1 channel) can be configured to assert the SYS_SHDN pin. If a channel is configured to assert the SYS_SHDN pin, the temperature on the measured channel must exceed the programmed therm limit value. This is treated in the same way as the THERM output. 5.4 Ground (GND) This pin is used to ground the device. 5.5 Maskable ALERT (ALERT/THERM2) This pin asserts when a diode temperature exceeds the ALERT threshold. This pin may be masked by register settings. 5.6 SMBus/I2C Data (SDA) This is the open-drain, bidirectional data pin for SMBus communication. 5.7 DP/DP1 • 5.8 DN/DN1 • 5.9 DP/DP1: DP and DP1 anode DN/DN1: DN and DN1 cathode DP2 • DP2: DP2 anode © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 13 Multi-Channel Low-Voltage Temp Sens... Pin Descriptions 5.10 DN2 • 5.11 Anti-Parallel Diode Pair (DP2/DN3 and DN2/DP3) • • 5.12 DP1/DN2: DP1 anode and DN2 cathode DN1/DP2: DN1 cathode and DP2 anode Anti-Parallel Diode Pair (DP3/DN4 and DN3/DP4) • • 5.14 DP2/DN3: DP2 anode and DN3 cathode DN2/DP3: DN2 cathode and DP3 anode Anti-Parallel Diode Pair (DP1/DN2 and DN1/DP2) • • 5.13 DN2: DN2 cathode DP3/DN4: DP3 anode and DN4 cathode DN3/DP4: DN3 cathode and DP4 anode SMBus Clock (SCL) This is the SMBus/I2C input clock pin for SMBus communication. 5.15 Exposed Thermal Pad (EP) There is no internal connection between the Exposed Thermal Pad (EP) and the GND pin. They must be connected to the same electric potential on the Printed Circuit Board (PCB). Grounding is recommended for mechanical support. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 14 Multi-Channel Low-Voltage Temp Sens... Detailed Description 6. Detailed Description The EMC1822/23/24/25/43 devices monitor one internal diode and up to four externally connected temperature diodes. Thermal management is performed in cooperation with a host device. This consists of the host reading the temperature data of both the external and internal temperature diodes of the EMC1822/23/24/25/43 and using that data to manage thermal events or to control the speed of one or more fans. This device family introduces Rate of Change temperature measurement with associated alerts. This provides a preemptive system alert and another protective measurement layer to catch and manage variable system temperatures. Resistance Error Correction automatically eliminates the temperature error caused by series resistance. This feature allows for routing long traces and off-board connections with wires, if desired. Automatic beta compensation eliminates the need for substrate diode and transistor configurations. The EMC1822/23/24/25/43 family has two levels of monitoring. The first provides a maskable ALERT signal to the host when the measured temperatures exceed user-programmable limits. This allows the EMC1822/23/24/25/43 to be used as an independent thermal watchdog to warn the host of temperature hot spots without direct control by the host. The second level of monitoring provides a nonmaskable interrupt on the THERM pin if the measured temperatures meet or exceed a second programmable limit. The EMC1822 is a single channel remote temperature sensor, while the EMC1823 is a dual channel remote temperature sensor. The remote channels for this selection of devices can support substrate diodes, discrete diode connected transistors or CPU/GPU thermal diodes. The EMC1824 supports Anti-Parallel Diode (APD) only on one channel. For the channel that does not support APD functionality, substrate diodes, discrete diode connected transistors or CPU/GPU thermal diodes are supported. For the channel that supports APD, only discrete diode connected transistors may be implemented. However, if APD is disabled on the EMC1824, then the channel that supports APD will be functional with substrate diodes, discrete diode connected transistors and CPU/GPU thermal diodes. The EMC1825 and EMC1843 support APD on all channels. When APD is enabled, the channels support only diode connected transistors. If APD is disabled, then the channels will support substrate transistors, discrete diode connected transistors and CPU/GPU thermal diodes. Note:  Disabling APD functionality to implement substrate diodes on devices that support APD eliminates the benefit of APD (two diodes on one channel). © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 15 Multi-Channel Low-Voltage Temp Sens... System Block Diagram 7. System Block Diagram The figure below shows a system-level block diagram of the EMC1822/23/24/25/43 . Figure 7-1. EMC1822/23/24/25/43 System Diagram VDD = 1.62V-3.6V 1.8V-2.75V VDD CPU/GPU Host DP Thermal Junction SCL DN EMC18XX SDA ALERT/THERM SMBus Interface DP2/DN3 SYS_SHDN Power Control DN2/DP3 GND 7.1 Temperature Measurement The EMC1822/23/24/25/43 device family can monitor the temperature of up to four externally connected diodes. Each external diode channel is configured with Resistance Error Correction and Beta Compensation based on user settings and system requirements. The devices contain programmable high, low and therm limits for all measured temperature channels. If the measured temperature goes below the low limit or above the high limit, the ALERT pin can be asserted (based on user settings). If the measured temperature meets or exceeds the therm limit, the THERM pin is asserted unconditionally, providing two tiers of temperature detection. 7.2 Temperature Measurement Results and Data The temperature measurement results are stored in the internal and external temperature registers. These are then compared with the values stored in the High and Low Limit registers. Both external and internal temperature measurements are stored in 11-bit format with the eight Most Significant bits (MSbs) stored in a high-byte register and the three Least Significant bits (LSbs) stored in the three MSB positions of the low-byte register. All other bits of the low-byte register are set to zero. The EMC1822/23/24/25/43 family has two selectable temperature ranges. The default range is from 0°C to +127°C and the temperature is represented as a binary number able to report a temperature from 0°C to +127.875°C in 0.125°C steps. The extended range is an extended temperature range, from -64°C to +191°C. The data format is a binary number offset by 64°C. The extended range is used to measure temperature diodes with a large known offset (such as CPU/GPU processor diodes) where the diode temperature plus the offset would be equivalent to a temperature higher than +127°C. The following table shows the default and extended range formats. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 16 Multi-Channel Low-Voltage Temp Sens... System Block Diagram Table 7-1. Temperature Data Format Temperature (°C) Default Range 0°C to 127°C Extended Range -64°C to +191°C Diode Fault 000 0000 0000 000 0000 0000 -64 000 0000 0000 000 0000 0000 (Note 1) -1 000 0000 0000 001 1111 1000 0 000 0000 0000 (Note 2) 010 0000 0000 0.125 000 0000 0001 010 0000 0001 1 000 0000 1000 010 0000 1000 64 010 0000 0000 100 0000 0000 65 010 0000 1000 100 0000 1000 127 011 1111 1000 101 1111 1000 127.875 011 1111 1111 101 1111 1111 128 011 1111 1111 (Note 3) 110 0000 0000 190 011 1111 1111 111 1111 0000 191 011 1111 1111 111 1111 1000 ≥ 191.875 011 1111 1111 111 1111 1111 (Note 4) Notes:  1. In the extended range, all temperatures below -64°C are reported as -64°C. 2. In Default mode, all temperatures below 0°C are reported as 0°C. 3. For the default range, all temperatures above +127.875°C are reported as +127.875°C. 4. For the extended range, all temperatures above +191.875°C are reported as +191.875°C. 7.3 Limit Registers The device contains both high and low limits for all temperature channels. If the measured temperature exceeds the high limit, then the corresponding status bit is set and the ALERT pin is asserted. Likewise, if the measured temperature is less than or equal to the low limit, the corresponding status bit is set and the ALERT pin is asserted. The data format for the limits must match the selected data format for the temperature, so that if the extended temperature range is used, the limits must be programmed in the extended data format. The Limit registers with multiple addresses are fully accessible at either address. When the device is in the Standby state, updating the Limit registers will have no effect until the next conversion cycle occurs. This can be initiated via a write to the ONE SHOT Register (Address 0Fh; ONE SHOT) or by clearing the RUN/STANDBY bit (see CONFIG, Address 03h). 7.4 Limit Register Interaction The various Limit registers in the device interact based on both external conditions present on the diode pins, as well as changes in register bits in the I2C interface. 7.4.1 High Limit Register The High Limit Status register contains the status bits that are set when a temperature channel high limit is exceeded. If any of these bits are set, then the HIGH Status bit in the Status register is set. Reading from the High Limit Status register clears all bits. Reading from the register will also clear the HIGH Status bit in the Status register. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 17 Multi-Channel Low-Voltage Temp Sens... System Block Diagram The ALERT pin will be set if the programmed number of consecutive alert counts has been met and any of these status bits are set. The status bits remain set until a read is performed unless the ALERT pin is configured as a comparator output (see 7.5.2 ALERT/THERM2 Pin in Therm Mode). 7.4.2 Low Limit Register The Low Limit Status register contains the status bits that are set when a temperature channel drops below the low limit. If any of these bits are set, then the LOW Status bit in the Status register is set. Reading from the Low Limit Status register clears all bits. The ALERT pin will be set if the programmed number of consecutive alert counts has been met and any of these status bits are set. The status bits will remain set until a read is performed, unless the ALERT pin is configured as a comparator output (see 7.5.2 ALERT/THERM2 Pin in Therm Mode). 7.4.3 Therm Limit Register The Therm Limit registers are used to determine whether a critical thermal event has occurred. If the measured temperature exceeds the therm limit, the THERM pin is asserted. The limit setting must match the chosen data format of the temperature reading registers. Unlike the ALERT pin, the THERM pin cannot be masked. Additionally, the THERM pin is released once the temperature drops below the corresponding threshold, minus the Therm Hysteresis. 7.5 ALERT/THERM2 Output The ALERT/THERM2 pin is an open-drain output and requires a pull-up resistor to VDD, and has two modes of operation: Interrupt mode and Comparator mode. The mode of the ALERT/THERM2 output is selected through the ALERT/THERM2 bit (see CONFIG, Address 03h). 7.5.1 ALERT/THERM2 Pin Interrupt Mode When configured to operate in Interrupt mode, the ALERT/THERM2 pin asserts low when an out-of-limit measurement (less than or equal to the low limit or greater than the high limit) is detected on any diode or when a Diode Fault is detected. The ALERT/THERM2 pin will remain asserted as long as an out-of-limit condition remains. Once the out-of-limit condition has been removed, the ALERT/THERM2 pin remains asserted until the appropriate status bits are cleared. The ALERT/THERM2 pin can be masked by setting the MASK_ALL bit. Once the ALERT/THERM2 pin has been masked, it is deasserted and remains as such until the MASK_ALL bit is cleared by the user. Any interrupt conditions that occur while the ALERT/THERM2 pin is masked causes the STATUS register to be updated normally. There are also individual channel masks (see 8.11.22 DIODE FAULT MASK.) The ALERT/THERM2 pin is used as an interrupt signal or as an I2C Alert signal that allows an SMBus/I2C slave to communicate an error condition to the master. One or more ALERT/THERM2 outputs can be hard-wired together. 7.5.2 ALERT/THERM2 Pin in Therm Mode When the ALERT/THERM2 pin is configured to operate in Therm mode, it becomes asserted if any of the measured temperatures exceed the respective high limit. The ALERT/THERM2 pin remains asserted until all temperatures drop below the corresponding high limit, minus the Therm Hysteresis value. When the ALERT/THERM2 pin is asserted in Therm mode, the corresponding High Limit Status bits are set. Reading these bits does not clear them until the ALERT/THERM2 pin is deasserted. Once the ALERT/THERM2 pin is deasserted, the status bits are automatically cleared. The MASK_ALL bit does not block the ALERT/THERM2 pin in this mode; however, the individual channel masks prevent the respective channel from asserting the ALERT/THERM2 pin. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 18 Multi-Channel Low-Voltage Temp Sens... System Block Diagram 7.6 System Shutdown The EMC1822/23/24/25/43 devices contain a hardware configured temperature limit circuit that controls the SYS_SHDN pin. The threshold temperature is determined by the pull-up resistors on both the SYS_SHDN and ALERT pins. Note, Standby and One-shot modes cannot be enabled in device configurations, including system shutdown functionality . Table 7-2. Pull-Up Resistor Values Pull-up Resistor Bit 2 Bit 1 Bit 0 4.7k 0 0 0 6.8k 0 0 1 10k 0 1 0 15k 0 1 1 20k 1 0 0 33k 1 0 1 The final temperature decode is the responsibility of the digital block. The overall decode is shown in Table 7-3. Table 7-3. Temperature Select Encoding SYS_SHDN Pull-up Decode ALERT Pull-up Decode Combined Decode (HEX) Threshold Temperature 2 1 0 2 1 0 0 0 0 0 0 0 00h 77°C 0 0 0 0 0 1 01h 78°C 0 0 0 0 1 0 02h 79°C 0 0 0 0 1 1 03h 80°C 0 0 0 1 0 0 04h 81°C 0 0 0 1 0 1 05h 82°C 0 0 1 0 0 0 08h 83°C 0 0 1 0 0 1 09h 84°C 0 0 1 0 1 0 0Ah 85°C 0 0 1 0 1 1 0Bh 86°C 0 0 1 1 0 0 0Ch 87°C 0 0 1 1 0 1 0Dh 88°C 0 1 0 0 0 0 10h 89°C 0 1 0 0 0 1 11h 90°C 0 1 0 0 1 0 12h 91°C 0 1 0 0 1 1 13h 92°C 0 1 0 1 0 0 14h 93°C 0 1 0 1 0 1 15h 94°C © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 19 Multi-Channel Low-Voltage Temp Sens... System Block Diagram ...........continued SYS_SHDN Pull-up Decode ALERT Pull-up Decode Combined Decode (HEX) Threshold Temperature 0 1 1 0 0 0 18h 95°C 0 1 1 0 0 1 19h 96°C 0 1 1 0 1 0 1Ah 97°C 0 1 1 0 1 1 1Bh 98°C 0 1 1 1 0 0 1Ch 99°C 0 1 1 1 0 1 1Dh 100°C 1 0 0 0 0 0 20h 101°C 1 0 0 0 0 1 21h 102°C 1 0 0 0 1 0 22h 103°C 1 0 0 0 1 1 23h 104°C 1 0 0 1 0 0 24h 105°C 1 0 0 1 0 1 25h 106°C 0 1 0 0 0 28h 107°C 1 0 1 0 0 1 29h 108°C 1 0 1 0 1 0 2Ah 109°C 1 0 1 0 1 1 2Bh 110°C 1 0 1 1 0 0 2Ch 111°C 1 0 1 1 0 1 2Dh 112°C The hardware shutdown circuitry measures the External Diode 1 channel and compares it against the hardware thermal shutdown limit. The THERM pin consecutive alert counter (Default 4 for the SYS_SHDN pin) applies to this comparison. If the temperature meets or exceeds the limit for the number of consecutive measurements, the SYS_SHDN pin is asserted. The SYS_SHDN pin remains asserted until the temperature drops below the limit minus 10°C. As well, all of the measurement channels (including the External Diode 1 channel) can be configured to assert the SYS_SHDN pin. If a channel is configured to assert the SYS_SHDN pin, the temperature on the measured channel must exceed the programmed therm limit value. This is treated in the same way as the THERM output. For additional information, see 8.11.17 HARDWARE THERMAL SHUTDOWN LIMIT. 7.7 External Diode Connections The EMC1822 can be configured to measure a CPU substrate transistor, a discrete 2N3904 thermal diode or a CPU/GPU processor diode. The diodes can be connected as indicated in the figure below. The EMC1823 can be configured to measure a CPU substrate transistor, a discrete 2N3904 thermal diode or a CPU/GPU processor diode on the External Diode 1 or External Diode 2 channels. For the EMC1824, External Diode 2 and External Diode 3 channels are configured to measure a pair of discrete anti-parallel diodes (shared on pins DP2 and DN2). The supported configurations for the external diode channels are shown in the following figure. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 20 Multi-Channel Low-Voltage Temp Sens... System Block Diagram Figure 7-2. Diode Configurations to DP1 to DP1 to DN1 to DN1 Local Ground Typical remote substrate transistor e.g. CPU substrate PNP Typical remote discrete NPN transistor e.g. 2N3904 to DP2/DN3 to DN2/DP3 Anti-parallel connected discrete NPN transistors e.g. 2N3904 7.8 Power States The EMC1822/23/24/25/43 devices have two power states: Active and Standby. • • 7.9 Active (Run) – In this state, the ADC is converting on all temperature channels at the programmed conversion rate. The temperature data is updated at the end of every conversion and the limits are checked. In the Active state, writing to the One-Shot register has no effects. Standby (One-Shot) – While the device is in Standby, the host can initiate a conversion cycle on demand. After the conversion cycle is complete, the device returns to the Standby state. Conversion Rates The EMC1822/23/24/25/43 devices may be configured for different conversion rates based on the system requirements. The default conversion rate is four conversions per second. Other available conversion rates are shown in the Conversion Rate table. Table 7-4. Conversion Rate CONV Conversions/ Second HEX 3 2 1 0 0h 0 0 0 0 1/16 1h 0 0 0 1 1/8 2h 0 0 1 0 1/4 3h 0 0 1 1 1/2 4h 0 1 0 0 1 5h 0 1 0 1 2 © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 21 Multi-Channel Low-Voltage Temp Sens... System Block Diagram ...........continued CONV 3 2 1 0 6h 0 1 1 0 4 (default) 7h 0 1 1 1 8 8h 1 0 0 0 16 9h 1 0 0 1 32 Ah 1 0 1 0 64 Bh-Fh 7.10 Conversions/ Second HEX All Others 1 Dynamic Averaging Dynamic averaging causes the EMC1822/23/24/25/43 devices to measure the external diode channels for an extended time based on the selected conversion rate. This functionality can be disabled for increased power savings at the lower conversion rates. When dynamic averaging is enabled, the devices automatically adjust the sampling and measurement time for the external diode channels. This allows the devices to average 2x to 16x longer than the normal 11-bit operation (nominally 21 ms per channel) while still maintaining the selected conversion rate. The benefits of dynamic averaging are improved noise rejection due to the longer integration time as well as less random variation of the temperature measurement. When enabled, the dynamic averaging applies when a one-shot command is issued. The devices perform the desired averaging during the one-shot operation according to the selected conversion rate. When enabled, the dynamic averaging affects the average supply current based on the chosen conversion rate as shown in the following table. Table 7-5. Supply Current vs. Conversion Rate for EMC1825 Average Supply Current Conversion Rate Averaging Factor (based on 11-bit operation) Dynamic Averaging State Enabled (default) Disabled Enabled (default) Disabled 1/16s 144 µA 80 µA 16x 1x 1/8s 213 µA 86 µA 16x 1x 1/4s 351 µA 97 µA 16x 1x 1/2s 627 µA 120 µA 16x 1x 1/s 637 µA 164 µA 16x 1x 2/s 659 µA 253 µA 16x 1x 4/s (default) 703 µA 432 µA 8x 1x 8/s 790 µA 790 µA 4x 1x 16/s 830 µA 830 µA 2x 1x 32/s 830 µA 830 µA 1x 1x 64/s 1065 µA 1065 µA 0.5x 0.5x © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 22 Multi-Channel Low-Voltage Temp Sens... System Block Diagram Digital Filter To reduce the effect of noise and temperature spikes on the reported temperature, the external diode channel uses a programmable digital filter. This filter can be configured as Level 1, Level 2 or disabled (default). The typical filter performance is shown in the figures below. The Filter Configuration register controls the digital filter on the External Diode 1 channel. To reduce complexity, the digital filter only applies to the External Diode Channels 1 and 2. Furthermore, this is only the case when APD is not enabled for a given channel. It applies after the digital block has taken the appropriate 11 bits based on the dynamic averaging. Table 7-6. Filter Settings FILTER Averaging 1 0 0 0 Disabled (default) 0 1 Level 1 (Note 1) 1 0 Level 1 (Note 1) 1 1 Level 2 (Note 2) Notes:  1. Filtering Level 1 corresponds to 4x attenuation of a temperature spike. 2. Filtering Level 2 corresponds to 8x attenuation of a temperature spike. Figure 7-3. Temperature Filter Step Response 90 Disabled Temperature (°C) 80 Level 1 70 Level 2 60 50 40 30 20 10 0 0 2 4 6 8 Samples 10 12 14 12 14 Figure 7-4. Temperature Filter Impulse Response 90 80 Disabled 70 Temperature (°C) 7.11 60 50 Level 1 40 Level 2 30 20 10 0 0 2 4 6 8 Samples 10 The filter consists of a running average on the external diode channel. The Level 1 filter is a running average of 4x while the Level 2 filter is a running average of 8x. For the first measurement immediately after power-up, the filter will be filled with the results of the first measurement. After this, the filter is operated normally. Any temperature comparisons are done with the filtered results that are stored in the user register. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 23 Multi-Channel Low-Voltage Temp Sens... System Block Diagram 7.12 Beta Compensation The EMC1822/23/24/25/43 devices are configured to monitor the temperature of basic diodes (for example 2N3904) or CPU thermal diodes. They automatically detect the type of external diode (CPU diode or diode connected transistor) and determine the optimal setting to reduce temperature errors introduced by beta variation. Compensating for this error is also known as implementing the transistor or BJT model for temperature measurement. For discrete transistors configured with the collector and base shorted together, the beta is generally sufficiently high, such that the percent change in beta variation is very small. For example, a 10% variation in beta for two forced emitter currents with a transistor whose ideal beta is 50 would contribute approximately 0.25°C error at +100°C. However, for substrate transistors where the base-emitter junction is used for temperature measurement and the collector is tied to the substrate, the proportional beta variation will cause large errors. For example, a 10% variation in beta for two forced emitter currents with a transistor whose ideal beta is 0.5, would contribute approximately +8.25°C error at +100°C. For the EMC1824 and EMC1825 devices, the External Diode Channels 2/3 (EMC1824) and External Diode Channels 3/4 (EMC1825) do not support beta compensation. At the beginning of every conversion, the optimal beta compensation factor setting is determined and applied. The BETA(N)[2:0] bits are automatically updated to indicate the current setting. This is the default for EMC1823. This is the default for EMC1824 for External Diode 1 only and it is disabled and cannot be enabled for External Diode 2 or 3. If the auto-detection circuitry is disabled, these bits will determine the beta configuration setting that is used for their respective channels. It is recommended to be cautious when setting the BETA(N)[2:0] bits when the auto-detection circuitry is disabled. If the beta compensation factor is set at a beta value that is higher than the transistor beta, the circuit may generate measurement errors. When measuring a discrete thermal diode (such as 2N3904) or a CPU diode that functions like a discrete thermal diode (such as a CPU/GPU processor diode), the BETA(N)[2:0] bits should be set to ‘111b’. Table 7-7. CPU Beta Values DI_BETA Minimum Beta 3 2 1 0 0 0 0 0 0.050 0 0 0 1 0.066 0 0 1 0 0.087 0 0 1 1 0.114 0 1 0 0 0.150 0 1 0 1 0.197 0 1 1 0 0.260 0 1 1 1 0.342 1 0 0 0 0.449 1 0 0 1 0.591 1 0 1 0 0.778 1 0 1 1 1.024 1 1 0 0 1.348 1 1 0 1 1.773 1 1 1 0 2.333 1 1 1 1 Diode Mode © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 24 Multi-Channel Low-Voltage Temp Sens... System Block Diagram 7.13 Resistance Error Correction (REC) Parasitic resistance, in series with the external diodes, limits the accuracy obtainable from temperature measurement devices. The voltage developed across this resistance by the switching diode currents causes the temperature measurement to read higher than the true temperature. Contributors to series resistance are PCB trace resistance, on die (i.e., on the processor) metal resistance, bulk resistance in the base and emitter of the temperature transistor. Typically, the error caused by series resistance is +0.7°C/Ω. The EMC1822/23/24/25/43 devices automatically correct up to 100Ω of series resistance. 7.14 Programmable External Diode Ideality Factor The EMC1822/23/24/25/43 device family is designed for external diodes with an ideality factor of 1.008. Not all external diodes, processor or discrete, will have this exact value. This variation of the ideality factor introduces errors in the temperature measurement which must be corrected for. This correction is typically done using programmable offset registers. Since an ideality factor mismatch introduces an error that is a function of temperature, this correction is only accurate within a small range of temperatures. To provide maximum flexibility to the user, the EMC1822/23/24/25/43 devices provide a 6-bit register for each external diode where the ideality factor of the diode used is programmed to eliminate errors across all temperatures. When monitoring a substrate transistor or CPU diode and beta compensation is enabled, the ideality factor should not be adjusted. Beta compensation automatically corrects for most ideality errors. ® When measuring a 65 nm Intel CPU, the ideality setting should be the default 12h. When measuring a 45 nm Intel CPU, the ideality setting should be 15h. These registers store the ideality factors that are applied to the external diodes. The following table defines each setting and the corresponding ideality factor. Since beta compensation and Resistance Error Correction automatically correct for most diode ideality errors, it is not recommended that these settings be updated without consulting Microchip Technology. Table 7-8. Ideality Factor Look-up Table (Diode Model) Setting Factor Setting Factor Setting Factor 08h 0.9949 18h 1.0159 28h 1.0371 09h 0.9962 19h 1.0172 29h 1.0384 0Ah 0.9975 1Ah 1.0185 2Ah 1.0397 0Bh 0.9988 1Bh 1.0200 2Bh 1.0410 0Ch 1.0001 1Ch 1.0212 2Ch 1.0423 0Dh 1.0014 1Dh 1.0226 2Dh 1.0436 0Eh 1.0027 1Eh 1.0239 2Eh 1.0449 0Fh 1.0040 1Fh 1.0253 2Fh 1.0462 10h 1.0053 20h 1.0267 30h 1.0475 11h 1.0066 21h 1.0280 31h 1.0488 12h 1.0080 22h 1.0293 32h 1.0501 13h 1.0093 23h 1.0306 33h 1.0514 14h 1.0106 24h 1.0319 34h 1.0527 15h 1.0119 25h 1.0332 35h 1.0540 16h 1.0133 26h 1.0345 36h 1.0553 17h 1.0146 27h 1.0358 37h 1.0566 © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 25 Multi-Channel Low-Voltage Temp Sens... System Block Diagram For CPU substrate transistors that require the BJT transistor model, the ideality factor behaves slightly differently than for discrete diode connected transistors. Refer to the following when using a CPU substrate transistor. Table 7-9. Substrate Diode Ideality Factor Look-up Table (BJT Model) 7.15 Setting Factor Setting Factor Setting Factor 08h 0.9869 18h 1.0079 28h 1.0291 09h 0.9882 19h 1.0092 29h 1.0304 0Ah 0.9895 1Ah 1.0105 2Ah 1.0317 0Bh 0.9908 1Bh 1.0120 2Bh 1.0330 0Ch 0.9921 1Ch 1.0132 2Ch 1.0343 0Dh 0.9934 1Dh 1.0146 2Dh 1.0356 0Eh 0.9947 1Eh 1.0159 2Eh 1.0369 0Fh 0.9960 1Fh 1.0173 2Fh 1.0382 10h 0.9973 20h 1.0187 30h 1.0395 11h 0.9986 21h 1.0200 31h 1.0408 12h 1.0000 22h 1.0213 32h 1.0421 13h 1.0013 23h 1.0226 33h 1.0434 14h 1.0026 24h 1.0239 34h 1.0447 15h 1.0039 25h 1.0252 35h 1.0460 16h 1.0053 26h 1.0265 36h 1.0473 17h 1.0066 27h 1.0278 37h 1.0486 Diode Faults The EMC1822/23/24/25/43 devices detect an open on the DP and DN pins, and a short across the DP and DN pins. For each temperature measurement made, the device checks for a Diode Fault on the external diode channel(s). When a Diode Fault is detected, the ALERT pin asserts (unless masked) and the temperature data reads 00h in the MSB and LSB registers (note that the low limit is not be checked). A Diode Fault is defined as one of the following: an open between DP and DN, a short from VDD to DP or a short from VDD to DN. If a short occurs across DP and DN or a short occurs from DP to GND, the Low Limit Status bit is not set and the ALERT pin does not assert. This condition is indistinguishable from a temperature measurement of 0.000°C (-64°C in extended range) resulting in temperature data of 00h in the MSB and LSB registers. If a short from DN to GND occurs (with a diode connected), temperature measurements will continue as normal with no alerts. 7.16 Consecutive Alerts The EMC1822/23/24/25/43 device family contains multiple consecutive alert counters. One set of counters applies to the ALERT pin and the second set of counters applies to the THERM pin. Each temperature measurement channel has a separate consecutive alert counter for each of the ALERT and THERM pins. All counters are user programmable and determine the number of consecutive measurements that a temperature channel(s) must be outof-limit or reporting a Diode Fault before the corresponding pin is asserted. The Consecutive Alert register determines how many times an out-of-limit error or Diode Fault must be detected in consecutive measurements before the ALERT or THERM pin is asserted. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 26 Multi-Channel Low-Voltage Temp Sens... System Block Diagram An out-of-limit condition (for example, HIGH, LOW or FAULT) occurring on the same temperature channel in consecutive measurements will increment the consecutive alert counter. The counters will also be reset if no out-oflimit condition or Diode Fault condition occurs in a consecutive reading. When the ALERT pin is configured as an interrupt and when the consecutive alert counter reaches its programmed value, the following occurs: the status bit(s) for that channel and the last error condition(s) (for example, E1HIGH, or E2LOW and/or E2FAULT) are set to ‘1’, the ALERT pin is asserted, the consecutive alert counter is cleared and measurements continue to be performed. When the ALERT pin is configured as a comparator, the consecutive alert counter will ignore Diode Fault and low limit errors, and only increment if the measured temperature exceeds the high limit. Additionally, once the consecutive alert counter reaches the programmed limit, the ALERT pin is asserted, but the counter does not reset. It remains set until the temperature drops below the high limit minus the Therm Hysteresis value. Channels that are not enabled are not included in the consecutive alert checking. The signal logic chain is: Limit → Counter → Status → Mask → Pin (THERM and ALERT). For example, if the CALRT[2:0] bits are set for four consecutive alerts on an EMC1822/23/24/25/43 device, the high limits are set at +70°C and none of the channels are masked, then the ALERT pin is asserted after the following five measurements: • • • • • Internal Diode reads +71°C and both the external diodes read +69°C. Consecutive alert counter for INT is incremented to 1. Both the Internal Diode and the External Diode 1 read +71°C and External Diode 2 reads +68°C. Consecutive alert counter for INT is incremented to 2 and EXT1 is set to 1. The External Diode 1 reads +71°C and both Internal Diode and External Diode 2 read +69°C. Consecutive alert counters for INT and EXT2 are cleared and EXT1 is incremented to 2. The Internal Diode reads +71°C and both external diodes read +71°C. Consecutive alert counter for INT is set to 1, EXT2 is set to 1 and EXT1 is incremented to 3. The Internal Diode reads +71°C and both external diodes read +71°C. Consecutive alert counter for INT is incremented to 2, EXT2 is set to 2 and EXT1 is incremented to 4. The appropriate status bits are set for EXT and the ALERT pin is asserted. EXT1 counter is reset to 0 and all other counters hold the last value until the next temperature measurement. All temperature channels use this value to set the respective counters. The consecutive Therm counter is incremented whenever any measurement exceeds the corresponding Therm limit. If the temperature drops below the Therm limit, the counter is reset. If a number of consecutive measurements above the Therm limit occurs, the THERM pin is asserted low. Once the THERM pin has been asserted, the consecutive Therm counter will not reset until the corresponding temperature drops below the Therm limit minus the Therm Hysteresis value. The bits are decoded as shown in the table below. The default setting is four consecutive out-of-limit conversions. All temperature channels use this value to set the respective counters. The bits are decoded as shown in the table below. The default setting is 1 consecutive out-of-limit conversion. When the ALERT pin is in Comparator mode, the low limit and Diode Fault will bypass the consecutive alert counter and set the appropriate status bits, but will NOT assert the ALERT pin. When a value is written to 8.11.23 CONSEC ALERT (Address 22h) that is not defined below, the command is ignored and the last valid value is maintained. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 27 Multi-Channel Low-Voltage Temp Sens... System Block Diagram Table 7-10. Consecutive ALERT/ THERM Settings 7.17 2 1 0 Number of Consecutive Out-of-Limit Measurements 0 0 0 1 (default for CALRT[2:0]) 0 0 1 2 0 1 1 3 1 1 1 4 (default for CTHRM[2:0]) “Hottest Of” Comparison At the end of every measurement cycle, the EMC1822/23/24/25/43 devices compare all of the user-selectable internal and external diode channels to determine which of these channels is reporting the hottest temperature. The hottest temperature is stored in the Hottest Temperature registers and the appropriate status bit is set in the Hottest Status register. If multiple temperature channels measure the same temperature and are equal to the hottest temperature, the hottest status will be displayed for all selected temperature channels with the hottest temperature measurement. As an optional feature, the EMC1822/23/24/25/43 devices can also flag an event if the hottest temperature channel changes by enabling the REMHOT (Remember Hottest) bit (see 8.11.45 HOTTEST CONFIG). For example, suppose that External Diode Channels 1, 3 and 4 are programmed to be compared in the “Hottest Of” comparison. If the External Diode 1 channel reports the hottest temperature of the three, its temperature is copied into the Hottest Temperature registers (in addition to the External Diode 1 Temperature registers) and it is flagged in the Hottest Status bit. If, on the next measurement, the External Diode 3 channel temperature has increased, such that it is now the hottest temperature, the EMC1822/23/24/25/43 devices can flag this event as an interrupt condition and assert the ALERT pin. 7.18 Rate of Change The Rate of Change (ROC) function approximates the derivative of the temperature using a difference equation. The equation below is the basis for calculation. The ROC can be enabled for the first two standard diode connections. If Diode 2 is an anti-parallel connected diode, the ROC feature is applied to Diode 3. For the EMC1843, the ROC only applies to External Diode 1. Equation: Rate of Change � �max − � �0 × ���� ▵� = ������ − 1 ▵� Where: T(tmax) = Temperature at the end of the interval T(t0) = Temperature at the beginning of the interval The ROC period (T0 to Tmax) can be approximated by the combination of conversion rate (see Table 7-4) and ROC samples (Address 43h, 48h). The table below shows the samples defined by the bit settings. For example, setting the conversion rate to 1 conversion per second and the number of ROC samples to 65 samples would give an approximate ROC period of 65 seconds or approximately 1 minute. The gain applied to the result is stored in 8.11.29 ROC GAIN (Address 3Dh). The effective gains are shown in the register definition. Since this is sampled over time, there is a bit for each channel that indicates a change in slope has occurred. These bits (one for each channel) assert when the result of two consecutive sample differences exceeds the threshold limit © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 28 Multi-Channel Low-Voltage Temp Sens... System Block Diagram as defined by the hysteresis value defined in 8.11.30 ROC CONFIG (Address 3Eh). The ROC calculations are not affected. The Limit registers (8.11.34 R LIMH and 8.11.35 R LIML) and Results registers (8.11.32 R RESH and 8.11.33 R2/3 RESL) are signed, two’s complement numbers stored in two consecutive registers. If the Rate of Change result stored in registers 40h and 44h exceeds the programmed limit, the appropriate Status register bits will be set in 8.11.31 ROC STATUS (Address 3Fh). The ALERT pin may be asserted or masked, as set by 8.11.30 ROC CONFIG (Address 3Eh). The MASK bit does not prevent the status bits from updating, but if set, it prevents the ALERT pin from asserting. In addition to the functions described above, two additional temperature values are stored in registers for retrieval. The maximum temperature for a given sample period is stored in a register (4Ah) that updates every sample period and in a second register (4Dh, 4Fh) that stores a “global value”, and cleared only when read. The purpose of this register is to determine a maximum or minimum temperature, independent of the sample period. Below is an example of setting up the Rate of Change feature and interpreting the results. 1. 2. 3. 4. 5. Enable Standby mode: Write a value of 40h into register 03h. Set ROC gain: Write a value of 09h in register 3Dh. This sets the gain value of two for both Ext1 and Ext2/3. Set ROC samples Ext1, Ext2/3: Write a value of 02h/02h in registers 43h/48h. This sets the ROC samples to five for both EXT1 and Ext2/3. Set ROC Alert Limit Ext1/Ext2: Write a value of 01h/01h in registers 41h/46h. This sets the ROC limit to two for both Ext1 and Ext2/3. Enable ROC and Hysteresis: Write a value of 20h in register 3Eh. This enables the ROC and sets the hysteresis value to zero. ROC example: 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. Stabilize ambient temperature of device to +25°C. Initiate one-shot conversion: Write a value of FFh in register 0Fh. Read ROC Status register: For the first conversion, the ROC Status register (3Fh) reads 00h. Note that the initial slope of the sample period is determined using the first and second samples of the sample period. Stabilize ambient temperature of device to +35°C. Initiate one-shot conversion: Write a value of FFh in register 0Fh. Read ROC Status register: For the second conversion, the ROC Status register (3Fh) should read 00h. Again, the initial slope of the sample period is determined using the first and second samples of the sample period. Stabilize ambient temperature of device to +30°C. Initiate one-shot conversion: Write a value of FFh in register 0Fh. Read ROC Status register: For the third conversion, the ROC Status register (3Fh) reads F0h. The initial slope of the sample period is positive, going from +25°C to +35°C. A change in temperature from +35°C to +30°C causes a slope change, the number of slope changes is now 1 (odd). See ROC Status register (3Fh) bit descriptions for more clarification. Stabilize ambient temperature of device to +45°C. Initiate one-shot conversion: Write a value of FFh in register 0Fh. Read ROC Status register: For the fourth conversion, the ROC Status register (3Fh) should read C0h. The previous slope was negative, going from +35°C to +30°C. A change in temperature from +30°C to +45°C causes a slope change, the number of slope changes is now two (even). Stabilize ambient temperature of device to +35°C. Initiate one-shot conversion: Write a value of FFh in register 0Fh. Read ROC Status register: For the fifth conversion, the ROC Status register (3Fh) should read FCh. The previous slope was positive, going from +30°C to +45°C. A change in temperature from +45°C to +35°C causes a slope change, the number of slope changes is now three (odd). Once the final conversion of the sample period is completed, the ROC result is calculated using the equation below and compared to the ROC HB/LB Limit registers. In this scenario, the ROC limit was exceeded and the appropriate bits were set in the ROC Status register. Read ROC Result HB/LB ROC Result register: Once the final conversion of the sample period is completed, the ROC result is calculated using the following equation. This value is loaded into the ROC HB/LB Result register. Based on the equation, the result is 5: © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 29 Multi-Channel Low-Voltage Temp Sens... System Block Diagram ROC Results = 35 − 25 �2 = 5: 4 The ROCx high byte and low byte are in 9-bit signed two’s complement format. The MSB of the low byte is the LSB of the corresponding high byte. For this example the ROC HB and LB would be as follows: Table 7-11. ROC1,2/3 High-Byte (40h, 44h) Sign 7 6 5 4 3 2 1 0 0 0 0 0 0 1 0 Table 7-12. ROC Low-Byte (45h) LSB 2 1 0 LSB 3 2 1 HB2 — — — HB1 — — — 1 0 0 0 1 0 (Note) 0 (Note) 0 (Note) Note:  Fractional value. 17. Read Global Max register (4Dh): The Global Max value is 2Dh or +45°C. The Global Max register contains a history of the highest temperature value. This value is reset only at POR and it is updated at the end of each ROC sample period. 18. Read Sample Period Max register (49h): The Sample Period Max value should be 2Dh or +45°C. This register contains the highest temperature value for a given sample period and is updated after each temperature conversion. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 30 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8. System Management Bus Protocol The EMC1822/23/24/25/43 devices communicate with a host controller through the SMBus/I2C. The SMBus/I2C is a two-wire serial communication protocol between a computer host and its peripheral devices. A detailed timing diagram is shown in Figure 3-1. Stretching of the SMCLK signal is supported; however, the EMC1822/23/24/25/43 devices do not stretch the clock signal. 8.1 SMBus Start Bit The SMBus Start bit is defined as a transition of the SMBus/I2C data line from a logic ‘1’ state to a logic ‘0’ state while the SMBus/I2C clock line is in a logic ‘1’ state. 8.2 SMBus Address and RD/WR Bit The SMBus address byte consists of the 7-bit client address followed by the RD/WR indicator bit. If this RD/WR bit is a logic ‘0’, the SMBus host is writing data to the client device. If this RD/WR bit is a logic ‘1’, the SMBus Host is reading data from the client device. The response to the slave address 1001_100xb for -1 parts and 1001_101xb for -2 parts. 8.3 SMBus Data Bytes All SMBus data bytes are sent Most Significant bit first and are composed of eight bits of information. 8.4 SMBus ACK and NACK Bits The SMBus client Acknowledges all data bytes that it receives. This is done by the client device pulling the SMBus data line low after the 8th bit of each byte that is transmitted. This applies to both the Write Byte and Block Write protocols. The Host will NACK (not Acknowledge) the last data byte to be received from the client by holding the SMBus data line high after the 8th data bit has been sent. For the Block Read protocol, the Host will ACK (Acknowledge) each data byte that it receives, except the last data byte. 8.5 SMBus Stop Bit The SMBus Stop bit is defined as a transition of the SMBus Data line from a logic ‘0’ state to a logic ‘1’ state while the SMBus clock line is in a logic ‘1’ state. When a EMC1822/23/24/25/43 device detects an SMBus Stop bit and it has been communicating with the SMBus protocol, it will reset its client interface and prepare to receive further communications. 8.6 SMBus Time-out The EMC1822/23/24/25/43 device family includes an SMBus time-out feature. Following a 30 ms period of inactivity on the SMBus, where the SMCLK pin is held low, the device will time-out and reset the SMBus interface. The time-out function defaults to disabled. It can be enabled by setting the TIMEOUT bit in the Consecutive Alert register (see Consecutive Alert Register (address 22h)). 8.7 SMBus and I2C Compliance The major differences between SMBus and I2C devices include the following: © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 31 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol • • • • Minimum frequency for SMBus communications is 10 kHz The client protocol resets if the clock is held low for longer than 30 ms Except when operating in the Standby mode, the client protocol resets if both the clock and the data line are high for longer than 150 µs (Idle condition) I2C devices do not support the Alert Response Address functionality (which is optional for SMBus) For complete compliance information, refer to “AN14.0, Microchip Dedicated Slave Devices in I2C™ Systems” (DS00001853). 8.8 SMBus Protocols The EMC1822/23/24/25/43 devices are SMBus 2.0 compatible and support send byte, read byte, block read, receive byte as valid protocols, as shown below. They also support the I2C Block Read and Block Write protocols. The device supports write byte, read byte and block read/block write. All of the protocols below use the convention in the SMBus Protocol table. Table 8-1. SMBus Protocol Data Sent to Device Data Sent to the Host # of bits sent 8.8.1 # of bits sent SMBus Write Byte The Write Byte is used to write one byte of data to a specific register, as shown in the following table. Table 8-2. SMBus Write Byte Protocol 8.8.2 START Slave Address WR ACK Register Address ACK Register Data ACK STOP 1→0 YYYY_YYY 0 0 XXh 0 XXh 0 0→1 Block Write The Block Write is used to write multiple data bytes to a group of contiguous registers, as shown below. It is an extension of the Write Byte protocol. Table 8-3. Block Write Protocol START Slave Address WR ACK Register Address ACK 1→0 YYYY_YYY 0 0 XXh 0 Repeat N Times Register Data ACK XXh 0 STOP 0→1 Note:  When using the Block Write protocol, the internal Address Pointer will be automatically incremented after every data byte is received; it will wrap from FFh to 00h. Note:  The Block Write and Block Read protocols require that the Address Pointer be automatically incremented. For a write command, the Address Pointer will be automatically incremented when the ACK is sent to the host. There is no over or under bound limit checking and the Address Pointer will wrap around from FFh to 00h if necessary. 8.8.3 SMBus Read Byte The Read Byte protocol is used to read one byte of data from the registers, as shown below. Table 8-4. Read Byte Protocol START Slave Address WRITE ACK Register Data ACK 1→0 YYYY_YYY 0 0 XXh 0 © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 32 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.8.4 START Slave Address READ ACK Register Data NACK STOP 1→0 0101_000 1 0 XXh 1 0→1 Block Read The Block Read is used to read multiple data bytes from a group of contiguous registers, as shown below. It is an extension of the Read Byte protocol. Note:  When using the Block Read protocol, the internal Address Pointer will be automatically incremented after every data byte is received; it will wrap from FFh to 00h. Table 8-5. Block Read Protocol START Slave Address Write ACK Register Address ACK 1→0 YYYY_YYY 0 0 XXh 0 START Slave Address Read ACK Register Data ACK Register Data NACK STOP 1→0 YYYY_YYY 1 0 XXh 0 XXh 1 0→1 Note:  The Block Write and Block Read protocols require that the Address Pointer be automatically incremented. For a read command, the Address Pointer will be automatically incremented when the ACK is sent by the host. There is no over or under bound limit checking and the Address Pointer will wrap around from FFh to 00h if necessary. 8.8.5 SMBus Send Byte The Send Byte protocol is used to set the internal Address Register Pointer to the correct address location. No data is transferred during the Send Byte protocol, as shown below. Table 8-6. Send Byte Protocol 8.8.6 START Slave Address WR ACK Register Data ACK STOP 1→0 YYYY_YYY 0 0 XXh 0 0→1 SMBus Receive Byte The Receive Byte protocol is used to read data from a register when the internal register Address Pointer is known to be at the right location (e.g., set via Send Byte). This is used for consecutive reads of the same register as shown in the following table. Table 8-7. Receive Byte Protocol 8.9 START Slave Address RD ACK Register Data NACK STOP 1→0 YYYY_YYY 1 0 XXh 1 0→1 THERM Pin Considerations Because of the decode method used to determine the system shutdown temperature value, it is important that the pull-up resistance on the THERM pin be within the tolerances shown in Table 7-2. For tINT_T after power-up, the THERM pin must not be pulled low or the I2C address will not be decoded properly. If the system requirements do not permit these conditions, the THERM pin must be isolated from its hard-wired OR’d bus during this time. One method of isolating this pin is shown in the following figure. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 33 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol Figure 8-1. THERM Pin Isolation +3.3V +2.5-5V 22K 4.7K-33K 1 VDD 2 DP 3 DN 4 THERM/ ADDR Shared THERM © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 34 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.10 Register Summary Offset Name Bit Pos. 0x00 0x01 0x02 0x03 0x04 INT HIGH BYTE EXT1 HIGH BYTE STATUS CONFIG CONVERT INT DIODE HIGH LIMIT INT DIODE LOW LIMIT EXT1 HIGH LIMIT HIGH BYTE EXT1 LOW LIMIT HIGH BYTE CONFIG CONVERT INT DIODE HIGH LIMIT INT DIODE LOW LIMIT EXT1 HIGH LIMIT HIGH BYTE EXT1 LOW LIMIT HIGH BYTE ONE SHOT EXT1 LOW BYTE SCRTCHPD1 SCRTCHPD2 EXT1 HIGH LIMIT LOW BYTE EXT1 LOW LIMIT LOW BYTE EXT2 HIGH LIMIT HIGH BYTE EXT2 LOW LIMIT HIGH BYTE EXT2 HIGH LIMIT LOW BYTE EXT2 LOW LIMIT LOW BYTE EXT1 THERM LIMIT EXT2 THERM LIMIT EXTERNAL DIODE FAULT STATUS Reserved SW THERMAL SHUTDOWN CONFIG HARDWARE THERMAL SHUTDOWN LIMIT DIODE FAULT MASK INT DIODE THERM LIMIT THRM HYS CONSEC ALERT EXT2 HIGH BYTE 7:0 7:0 7:0 7:0 7:0 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F 0x20 0x21 0x22 0x23 7 ROCF MSKAL 6 5 HOTCHG R/S 4 3 IHB[7:0] EXT(N)HB[7:0] HIGH LOW RECD1/2 RECD3/4 BUSY AT/THM 7:0 IDHL[7:0] 7:0 IDLL[7:0] 7:0 EXT(N)HLHB[7:0] 7:0 EXT(N)LLHB[7:0] 7:0 7:0 MSKAL R/S AT/THM RECD1/2 RECD3/4 7:0 IDHL[7:0] 7:0 IDLL[7:0] 7:0 EXT(N)HLHB[7:0] 7:0 EXT(N)LLHB[7:0] 7:0 7:0 7:0 7:0 2 1 0 FAULT ETHRM RANGE DA_ENA CONV[3:0] ITHRM APDD RANGE DA_ENA CONV[3:0] APDD ONSH[7:0] EXT(N)LB[2:0] SPD(N)[7:0] SPD(N)[7:0] 7:0 EXT(N)HLLB[2:0] 7:0 EXT(N)LLLB[2:0] 7:0 EXT(N)HLHB[7:0] 7:0 EXT(N)LLHB[7:0] 7:0 EXT(N)HLLB[2:0] 7:0 EXT(N)LLLB[2:0] 7:0 7:0 EXT(N)THL[7:0] EXT(N)THL[7:0] 7:0 E4FLT E3FLT E2FLT E1FLT 7:0 E4SYS E3SYS E2SYS E1SYS INTSYS E2MASK E1MASK INTMASK 7:0 SSDNL[7:0] 7:0 E4MASK 7:0 7:0 7:0 7:0 E3MASK IDTHL[7:0] THRMH[7:0] TMOUT © 2018-2020 Microchip Technology Inc. CTHRM[2:0] CALRT[2:0] EXT(N)HB[7:0] Datasheet DS20006048B-page 35 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol ...........continued Offset Name Bit Pos. 0x24 EXT2 LOW BYTE EXT1 BETA CONFIG EXT2 BETA CONFIG EXT1 IDEALITY FACTOR EXT2 IDEALITY FACTOR INT LOW BYTE EXT3 HIGH BYTE EXT3 LOW BYTE EXT3 HIGH LIMIT HIGH BYTE EXT3 LOW LIMIT HIGH BYTE EXT3 HIGH LIMIT LOW BYTE EXT3 LOW LIMIT LOW BYTE EXT3 THERM LIMIT EXT3 IDEALITY FACTOR EXT4 HIGH BYTE EXT4 LOW BYTE EXT4 HIGH LIMIT HIGH BYTE EXT4 LOW LIMIT HIGH BYTE EXT4 HIGH LIMIT LOW BYTE EXT4 LOW LIMIT LOW BYTE EXT4 THERM LIMIT EXT4 IDEALITY FACTOR HIGH LIMIT STATUS LOW LIMIT STATUS THERM LIMIT STATUS ROC GAIN ROC CONFIG ROC STATUS R1 RESH R1 LIMH R1 LIML R1 SMPL R2 RESH R2/3 RESL R2 LIMH R2 LIML R2 SMPL PER MAXTH PER MAXT1L PER MAXTH PER MAXT2/3L GBL MAXT1H GBL MAXT1L 7:0 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 7 6 5 4 3 2 1 0 EXT(N)LB[2:0] 7:0 ENBL(N) BETA(N)[3:0] 7:0 ENBL(N) BETA(N)[3:0] 7:0 IDEAL(N)[5:0] 7:0 IDEAL(N)[5:0] 7:0 7:0 7:0 ILB[2:0] EXT(N)HB[7:0] EXT(N)LB[2:0] 7:0 EXT(N)HLHB[7:0] 7:0 EXT(N)LLHB[7:0] 7:0 EXT(N)HLLB[2:0] 7:0 EXT(N)LLLB[2:0] 7:0 EXT(N)THL[7:0] 7:0 IDEAL(N)[5:0] 7:0 7:0 EXT(N)HB[7:0] EXT(N)LB[2:0] 7:0 EXT(N)HLHB[7:0] 7:0 EXT(N)LLHB[7:0] 7:0 EXT(N)HLLB[2:0] 7:0 EXT(N)LLLB[2:0] 7:0 EXT(N)THL[7:0] 7:0 IDEAL(N)[5:0] 7:0 E4HIGH E3HIGH E2HIGH E1HIGH IHIGH 7:0 E4LOW E3LOW E2LOW E1LOW ILOW 7:0 E4THERM E3THERM E2THERM E1THERM ITHERM RC1HI RCHY[2:0] RC2/3LO RC1LO 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 SLCG2/3 © 2018-2020 Microchip Technology Inc. SLCG1 EN_ROC R2/3ODD RC1G[7:0] MASK2/3 MASK1 R1ODD RC2/3HI R(N)RH[7:0] R(N)LIMH[7:0] R(N)LIML[3:0] R(N)SH[3:0] R(N)RH[7:0] R2/3_RL[3:0] R1_RL[3:0] R(N)LIMH[7:0] R(N)LIML[3:0] R(N)SH[3:0] GM(N)HB[7:0] PM(N)L[2:0] GM(N)HB[7:0] PM(N)L[2:0] GM(N)HB[7:0] GM(N)LB[2:0] Datasheet DS20006048B-page 36 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol ...........continued Offset Name Bit Pos. 0x4F 0x50 GBL MAXT2H GBL MAXT2L 7:0 7:0 0x51 0x52 ... 0x5F 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 FILTER SEL 7:0 0x6A 0x6B 0x6C 0x6D 0x6E ... 0xFC 0xFD 0xFE 0xFF 8.11 7 6 5 4 3 2 1 0 GM(N)HB[7:0] GM(N)LB[2:0] FILTER[1:0] Reserved INT HIGH BYTE INT LOW BYTE EXT1 HIGH BYTE EXT1 LOW BYTE EXT2 HIGH BYTE EXT2 LOW BYTE EXT3 HIGH BYTE EXT3 LOW BYTE EXT4 HIGH BYTE EXT4 LOW BYTE HOTTEST DIODE HIGH BYTE HOTTEST DIODE LOW BYTE HOTTEST STATUS HOTTEST CONFIG 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 IHB[7:0] ILB[2:0] EXT(N)HB[7:0] EXT(N)LB[2:0] EXT(N)HB[7:0] EXT(N)LB[2:0] EXT(N)HB[7:0] EXT(N)LB[2:0] EXT(N)HB[7:0] EXT(N)LB[2:0] 7:0 7:0 7:0 7:0 HDHB[7:0] HDLB[2:0] REMHOT E4HOT E4ENB E3HOT E3ENB E2HOT E2ENB E1HOT E1ENB IHOT IENB Reserved PRODUCT ID MANUFACTURER ID REVISION 7:0 PRODUCT_ID[7:0] 7:0 MCHP_ID[7:0] 7:0 REV[7:0] Data Read Interlock When any temperature channel high byte register is read, the corresponding low byte is copied into an internal ‘shadow’ register. The user is free to read the low byte at any time and be ensured that it corresponds to the previously read high byte. Regardless if the low byte is read or not, reading from the same high byte register again automatically refreshes this stored low byte data. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 37 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.1 Internal Diode High Byte Data Register (Addresses 00h, 60h) Name:  Offset:  Bit 7 INT HIGH BYTE 0x00, 0x60 6 5 4 3 2 1 0 RO 0 RO 0 RO 0 RO 0 IHB[7:0] Access Reset RO 0 RO 0 RO 0 RO 0 Bits 7:0 – IHB[7:0] Unsigned or unsigned offset depending on the RANGE bit. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 38 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.2 Internal Diode Low Byte Data Register (Addresses 29h, 61h) Name:  Offset:  Bit Access Reset 7 RW 0 INT LOW BYTE 0x29, 0x61 6 ILB[2:0] RW 0 5 4 3 2 1 0 RW 0 Bits 7:5 – ILB[2:0] Fractional portion of the internal diode temperature to be added to the value at register 00h. Value Description 111 0.875°C 110 0.750°C 101 0.625°C 100 0.500°C 011 0.375°C 010 0.250°C 001 0.125°C 000 0.000°C © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 39 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.3 External Diode High Byte Data Register (Addresses 01h, 23h, 2Ah, 32h, 62h, 64h, 66h and 68h) Name:  Offset:  Bit Access Reset EXTn HIGH BYTE 0x01, 0x23, 0x2A, 0x32, 0x62, 0x64, 0x66, 0x68 7 6 5 RO 0 RO 0 RO 0 4 3 EXT(N)HB[7:0] RO RO 0 0 2 1 0 RO 0 RO 0 RO 0 Bits 7:0 – EXT(N)HB[7:0] Unsigned or unsigned offset depending on the RANGE bit. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 40 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.4 External Diode Low Byte Data Register (Addresses 10h, 24h, 2Bh, 33h, 63h, 65h, 67h and 69h) Name:  Offset:  Bit Access Reset 7 RO 0 EXTn LOW BYTE 0x10, 0x24, 0x2B, 0x33, 0x63, 0x65, 0x67, 0x69 6 EXT(N)LB[2:0] RO 0 5 4 3 2 1 0 RO 0 Bits 7:5 – EXT(N)LB[2:0] Fractional portion of internal diode temperature to be added to the value at register 00h. Value Description 111 0.875°C 110 0.750°C 101 0.625°C 100 0.500°C 011 0.375°C 010 0.250°C 001 0.125°C 000 0.000°C © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 41 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.5 Diode Status Register (Address 02h) Name:  Offset:  STATUS 0x02 The Status register reports the operating status of the internal diode and external diode channels. Bit Access Reset 7 ROCF RO 0 6 HOTCHG RO 0 5 BUSY RO 0 4 HIGH RO 0 3 LOW RO 0 2 FAULT RO 0 1 ETHRM RO 0 0 ITHRM RO 0 Bit 7 – ROCF This bit indicates if External Diode 1 or 2 has exceeded the programmed Rate of Change limit. Value Description 1 ROC above limit 0 ROC not above limit Bit 6 – HOTCHG This bit indicates if the hottest channel has changed from the previous temperature measurement. Value Description 1 The hottest channel has changed from the previous temperature measurement 0 The hottest channel has not changed from the previous temperature measurement Bit 5 – BUSY This bit indicates if the ADC is currently converting measured data. Value Description 1 The ADC is currently converting measured data 0 The ADC is not currently converting measured data Bit 4 – HIGH This bit indicates if a temperature channel exceeds its programmed high limit. When set, this bit will assert the ALERT pin. Value Description 1 Reported temperature above the high limit 0 Reported temperature is not above the high limit Bit 3 – LOW This bit indicates if a temperature channel drops below its programmed low limit. When set, this bit will assert the ALERT pin. Value Description 1 Reported temperature below, or equal to, the low limit 0 Reported temperature is not below the low limit Bit 2 – FAULT This bit indicates when a Diode Fault is detected. When set, this bit will assert the ALERT pin. Value Description 1 A Diode Fault has been detected 0 No Fault reported Bit 1 – ETHRM This bit indicates that the external diode channel exceeds the programmed Therm limit. When set, this bit will assert the THERM pin. This bit will remain set until the THERM pin is released; at which point, it will be automatically cleared. Value Description 1 Reported temperature above the high limit 0 Reported temperature is not above the high limit Bit 0 – ITHRM This bit is set when the internal diode channel exceeds the programmed Therm limit. When set, this bit will assert the THERM pin. This bit will remain set until the THERM pin is released; at which point, it will be automatically cleared. Value Description 1 Reported temperature above the high limit © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 42 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol Value 0 Description Reported temperature is not above the high limit © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 43 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.6 Configuration Register (Addresses 03h and 09h) Name:  Offset:  Bit Access Reset 7 MSKAL RW 0 CONFIG 0x03, 0x09 6 R/S RW 0 5 AT/THM RW 0 4 RECD1/2 RW 0 3 RECD3/4 RW 0 2 RANGE RW 0 1 DA_ENA RW 0 0 APDD RW 0 Bit 7 – MSKAL  Masks the ALERT pin from asserting when the ALERT pin is in Interrupt mode. This bit has no effect when the ALERT pin is in Comparator mode. Value Description 1 The ALERT pin is masked and will not be asserted for any interrupt condition when the ALERT pin is in Interrupt mode. The Status registers will be updated normally. 0 The ALERT pin is not masked. If any of the appropriate status bits are set, the ALERT pin will be asserted. Bit 6 – R/S Controls Run/Stop states. Value Description 1 The device is in Stop (Standby) state and not converting (unless a one-shot has been commanded) 0 The device is in Run (Active) state and converting on all channels Bit 5 – AT/THM  Controls the operation of the ALERT pin. When the ALERT pin is in Comparator mode, each channel has a consecutive counter OR’ed to assert the ALERT pin. The ALERT pin is deasserted after one measurement is below the high limit minus the Therm Hysteresis. Value Description 1 The ALERT pin acts in Comparator mode as described in 7.5.2 ALERT/THERM2 Pin in Therm Mode. In this mode, the MASK_ALL bit is ignored. 0 The ALERT pin acts in Interrupt mode as described in 7.5.1 ALERT/THERM2 Pin Interrupt Mode Bit 4 – RECD1/2 Disables the Resistance Error Correction (REC) for the DP1/DN1 pins. Value Description 1 REC is disabled for the DP1/DN1 and DP2/DN2 pins 0 REC is enabled for the DP1/DN1 and DP2/DN2 pins Bit 3 – RECD3/4 Disables the Resistance Error Correction (REC) for the DP2/DN2 pins. Value Description 1 REC is disabled for the DP2/DN2 and DP4/DN4 pins 0 REC is enabled for the DP2/DN2 and DP4/DN4 pins Bit 2 – RANGE Configures the measurement range and data format of the temperature channels. Value Description 1 The temperature measurement range is -64°C to +191.875°C and the data format is offset binary (see Table 7-1) 0 The temperature measurement range is 0°C to +127.875°C and the data format is binary Bit 1 – DA_ENA Enables the dynamic averaging feature on all temperature channels. Value Description 1 The dynamic averaging feature is enabled. All temperature channels will be converted with an averaging factor that is based on the conversion rate, as shown in Table 7-4. 0 The dynamic averaging feature is disabled. All temperature channels will be converted with a maximum averaging factor of 1x (equivalent to 11-bit conversion). For higher conversion rates, this averaging factor will be reduced, as shown in Table 7-5. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 44 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol Bit 0 – APDD Disables the anti-parallel diode operation, only allowing each APD pin set to bias and measure one diode. Value Description 1 Anti-Parallel Diode mode is disabled. Only one external diode will be measured on the DP1/DN1 and DP2/DN2 pins. 0 Anti-Parallel Diode mode is enabled. Two external diodes will be measured on the DP1/DN1 and DP2/DN2 pins. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 45 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.7 Temperature Conversion Rate Register (Addresses 04h and 0Ah) Name:  Offset:  Bit 7 CONVERT 0x04, 0x0A 6 5 4 3 2 1 0 RW 0 RW 0 CONV[3:0] Access Reset RW 0 RW 0 Bits 3:0 – CONV[3:0] The Conversion Rate register controls how often the temperature measurement channels are updated and compared against the limits. This register is fully accessible at either address. It determines the conversion rate as shown in Table 7-4. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 46 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.8 Internal Diode High Limit Register (Addresses 05h and 0Bh) Name:  Offset:  Bit 7 INT DIODE HIGH LIMIT 0x05, 0x0B 6 5 4 3 2 1 0 RW 0 RW 0 RW 0 RW 0 IDHL[7:0] Access Reset RW 0 RW 0 RW 0 RW 0 Bits 7:0 – IDHL[7:0] Unsigned or unsigned offset depending on the RANGE bit. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 47 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.9 Internal Diode Low Limit Register (Addresses 06h and 0Ch) Name:  Offset:  Bit 7 INT DIODE LOW LIMIT 0x06, 0x0C 6 5 4 3 2 1 0 RW 0 RW 0 RW 0 RW 0 IDLL[7:0] Access Reset RW 0 RW 0 RW 0 RW 0 Bits 7:0 – IDLL[7:0] Integer value of the internal diode temperature reading. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 48 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.10 Ext High Limit High Byte Register (Addresses 07h, 0Dh, 15h, 2Ch and 34h) Name:  Offset:  Bit Access Reset EXT HIGH LIMIT HIGH BYTE 0x07, 0x0D, 0x15, 0x2C, 0x34 7 6 5 RW 0 RW 0 RW 0 4 3 EXT(N)HLHB[7:0] RW RW 0 0 2 1 0 RW 0 RW 0 RW 0 Bits 7:0 – EXT(N)HLHB[7:0] Integer value of the External Diode n temperature reading, where n = 1 to 4, depending on device. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 49 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.11 Ext High Limit Low Byte Register (Addresses 13h, 17h, 2Eh and 36h) Name:  Offset:  Bit Access Reset 7 RW 0 EXT HIGH LIMIT LOW BYTE 0x13, 0x17, 0x2E, 0x36 6 EXT(N)HLLB[2:0] RW 0 5 4 3 2 1 0 RW 0 Bits 7:5 – EXT(N)HLLB[2:0] Fractional portion of the high limit temperature to be added to the value at the respective high byte registers. Value Description 111 0.875°C 110 0.750°C 101 0.625°C 100 0.500°C 011 0.375°C 010 0.250°C 001 0.125°C 000 0.000°C © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 50 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.12 Ext(n) Low Limit High Byte Register (Addresses 08h, 0Eh, 16h, 2Dh and 35h) Name:  Offset:  Bit Access Reset EXT LOW LIMIT HIGH BYTE 0x08, 0x0E, 0x16, 0x2D, 0x35 7 6 5 RW 0 RW 0 RW 0 4 3 EXT(N)LLHB[7:0] RW RW 0 0 2 1 0 RW 0 RW 0 RW 0 Bits 7:0 – EXT(N)LLHB[7:0] Integer portion of External Diode n low limit temperature, where n = 1 to 4, depending on device. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 51 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.13 Ext(n) Low Limit Low Byte Register (Addresses 14h, 18h, 2Fh and 37h) Name:  Offset:  Bit Access Reset 7 RW 0 EXT LOW LIMIT LOW BYTE 0x14, 0x18, 0x2F, 0x37 6 EXT(N)LLLB[2:0] RW 0 5 4 3 2 1 0 RW 0 Bits 7:5 – EXT(N)LLLB[2:0] Fractional portion of the low limit temperature to be added to the value at the respective high byte registers, where n = 1 to 4. Value Description 111 0.875°C 110 0.750°C 101 0.625°C 100 0.500°C 011 0.375°C 010 0.250°C 001 0.125°C 000 0.000°C © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 52 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.14 Scratchpad Register (Addresses 11h and 12h) Name:  Offset:  Bit 7 SCRTCHPD 0x11 + (n-1)*0x01 [n=1..2] 6 5 4 3 2 1 0 RW 0 RW 0 RW 0 RW 0 SPD(N)[7:0] Access Reset RW 0 RW 0 RW 0 RW 0 Bits 7:0 – SPD(N)[7:0] User temporary storage registers, where n = 1 to 2. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 53 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.15 One-Shot Register (Address 0Fh) Name:  Offset:  Bit 7 ONE SHOT 0x0F 6 5 4 3 2 1 0 RW 0 RW 0 RW 0 RW 0 ONSH[7:0] Access Reset RW 0 RW 0 RW 0 RW 0 Bits 7:0 – ONSH[7:0] When the device is in the Standby state, writing to the One-Shot register will initiate a conversion cycle and update the temperature measurements. Writing to the One-Shot register while the device is in the Active state or when the BUSY bit is set in the Status register (Address 02h) will have no effect. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 54 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.16 Software Thermal Shutdown Configuration Register (Address 1Dh) Name:  Offset:  Bit 7 SW THERMAL SHUTDOWN CONFIG 0x1d 6 Access Reset 5 4 E4SYS RW 0 3 E3SYS RW 0 2 E2SYS RW 0 1 E1SYS RW 0 0 INTSYS Bit 4 – E4SYS  Configures the External Diode 4 channel to assert the SYS_SHDN pin based on the hardware thermal shutdown limit. Value Description 0 The External Diode 4 channel is not linked to the SYS_SHDN pin. If the temperature exceeds the hardware thermal shutdown limit, the E4THRM status bit is set, but the SYS_SHDN pin is not asserted. 1 The External Diode 4 channel is linked to the SYS_SHDN pin. If the temperature exceeds the hardware thermal shutdown limit, the E4THRM status bit is set and the SYS_SHDN pin is asserted. It will remain asserted until the temperature drops below its Therm Limit minus the Therm Hysteresis. Bit 3 – E3SYS  Configures the External Diode 3 channel to assert the SYS_SHDN pin based on the hardware thermal shutdown limit. Value Description 0 The External Diode 3 channel is not linked to the SYS_SHDN pin. If the temperature exceeds the hardware thermal shutdown limit, the E3THRM status bit is set, but the SYS_SHDN pin is not asserted. 1 The External Diode 3 channel is linked to the SYS_SHDN pin. If the temperature exceeds the hardware thermal shutdown limit, the E3THRM status bit is set and the SYS_SHDN pin is asserted. It will remain asserted until the temperature drops below its Therm Limit minus the Therm Hysteresis. Bit 2 – E2SYS  Configures the External Diode 2 channel to assert the SYS_SHDN pin based on the hardware thermal shutdown limit. Value Description 0 The External Diode 2 channel is not linked to the SYS_SHDN pin. If the temperature exceeds the hardware thermal shutdown limit, the E2THRM status bit is set, but the SYS_SHDN pin is not asserted. 1 The External Diode 2 channel is linked to the SYS_SHDN pin. If the temperature exceeds the hardware thermal shutdown limit, the E2THRM status bit is set and the SYS_SHDN pin is asserted. It will remain asserted until the temperature drops below its Therm Limit minus the Therm Hysteresis. Bit 1 – E1SYS  Configures the External Diode 1 channel to assert the SYS_SHDN pin based on the hardware thermal shutdown limit. Value Description 0 The External Diode 1 channel is not linked to the SYS_SHDN pin. If the temperature exceeds its Therm Limit, the E1THRM status bit is set, but the SYS_SHDN pin is not asserted. 1 The External Diode 1 channel is linked to the SYS_SHDN pin. If the temperature exceeds the hardware thermal shutdown limit, the E2THRM status bit is set and the SYS_SHDN pin is asserted. It will remain asserted until the temperature drops below its Therm Limit minus the Therm Hysteresis. Bit 0 – INTSYS  Configures the internal diode channel to assert the SYS_SHDN pin based on the hardware thermal shutdown limit. Value Description 0 The internal diode channel is not linked to the SYS_SHDN pin. If the temperature exceeds the hardware thermal shutdown limit, the INTTHRM status bit is set, but the SYS_SHDN pin is not asserted. 1 The internal diode channel is linked to the SYS_SHDN pin. If the temperature exceeds the hardware thermal shutdown limit, the INTTHRM status bit is set and the SYS_SHDN pin is asserted. It will remain asserted until the temperature drops below its Therm Limit minus the Therm Hysteresis. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 55 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.17 Hardware Thermal Shutdown Limit Register (Address 1Eh) Name:  Offset:  Bit 7 HARDWARE THERMAL SHUTDOWN LIMIT 0x1E 6 5 4 3 2 1 0 RO 0 RO 0 RO 0 RO 0 SSDNL[7:0] Access Reset RO 0 RO 0 RO 0 RO 0 Bits 7:0 – SSDNL[7:0]  Returns the hardware thermal shutdown limit selected by the value of the pull-up resistors on the ALERT and SYS_SHDN pins. The data represents the hardware set temperature in °C using the active temperature setting set by the RANGE bit in the Configuration register. See 8.11.6 CONFIG for the data format. When the External Diode 1 or internal diode for the MCP9822 temperature exceeds this limit, the SYS_SHDN pin is asserted and will remain asserted until the External Diode 1 or internal diode for the MCP9822 temperature drops below this limit minus 10°C. For additional information, see Table 7-3. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 56 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.18 Ext(n) Therm Limit Register (Addresses 19h, 1Ah, 30h and 38h) Name:  Offset:  Bit Access Reset EXTn THERM LIMIT 0x19, 0x1A, 0x30, 0x38 7 6 5 RW 0 RW 0 RW 0 4 3 EXT(N)THL[7:0] RW RW 0 0 2 1 0 RW 0 RW 0 RW 0 Bits 7:0 – EXT(N)THL[7:0]  External Diode n THERM Limits, where n = 1 to 4. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 57 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.19 Internal Diode Therm Limit Register (Address 20h) Name:  Offset:  Bit 7 INT DIODE THERM LIMIT 0x20 6 5 4 3 2 1 0 RW 0 RW 0 RW 0 RW 0 IDTHL[7:0] Access Reset RW 0 RW 0 RW 0 RW 0 Bits 7:0 – IDTHL[7:0]  Internal diode THERM Limits. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 58 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.20 Therm Limit Hysteresis Register (Address 21h) Name:  Offset:  Bit 7 THRM HYS 0x21 6 5 4 3 2 1 0 RW 1 RW 0 RW 1 RW 0 THRMH[7:0] Access Reset RW 0 RW 0 RW 0 RW 0 Bits 7:0 – THRMH[7:0] ITHERM Limit Hysteresis. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 59 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.21 External Diode Fault Status Register (Address 1Bh) Name:  Offset:  EXTERNAL DIODE FAULT STATUS 0x1B Note:  The External Diode Fault register indicates which of the external diodes caused the FAULT bit in the Status register to be set. This register is cleared when it is read. Bit 7 6 Access Reset 5 4 E4FLT RC 0 3 E3FLT RC 0 2 E2FLT RC 0 1 E1FLT RC 0 0 Bit 4 – E4FLT This bit is set if the External Diode 4 channel reported a Diode Fault. Value Description 1 Diode Fault condition present 0 No Diode Fault present Bit 3 – E3FLT This bit is set if the External Diode 3 channel reported a Diode Fault. Value Description 1 Diode Fault condition present 0 No Diode Fault present Bit 2 – E2FLT This bit is set if the External Diode 2 channel reported a Diode Fault. Value Description 1 Diode Fault condition present 0 No Diode Fault present Bit 1 – E1FLT This bit is set if the External Diode 1 channel reported a Diode Fault. Value Description 1 Diode Fault condition present 0 No Diode Fault present © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 60 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.22 Diode Fault Mask Register (Address 1Fh) Name:  Offset:  DIODE FAULT MASK 0x1F Note:  The Channel Mask register controls individual channel masking. When a channel is masked, the ALERT pin will not be asserted when the masked channel reads a Diode Fault or out-of-limit error. The channel mask does not mask the THERM pin. Bit 7 6 Access Reset 5 4 E4MASK RW 0 3 E3MASK RW 0 2 E2MASK RW 0 1 E1MASK RW 0 0 INTMASK RW 0 Bit 4 – E4MASK  Masks the ALERT pin from asserting when the External Diode 4 channel is out-of-limit or reports a Diode Fault. Value Description 1 The External Diode 4 channel will not cause the ALERT pin to be asserted if it is out-of-limit or reports a Diode Fault 0 The External Diode 4 channel will cause the ALERT pin to be asserted if it is out-of-limit or reports a Diode Fault Bit 3 – E3MASK  Masks the ALERT pin from asserting when the External Diode 3 channel is out-of-limit or reports a Diode Fault. Value Description 1 The External Diode 3 channel will not cause the ALERT pin to be asserted if it is out-of-limit or reports a Diode Fault 0 The External Diode 3 channel will cause the ALERT pin to be asserted if it is out-of-limit or reports a Diode Fault Bit 2 – E2MASK  Masks the ALERT pin from asserting when the External Diode 2 channel is out-of-limit or reports a Diode Fault. Value Description 1 The External Diode 2 channel will not cause the ALERT pin to be asserted if it is out-of-limit or reports a Diode Fault 0 The External Diode 2 channel will cause the ALERT pin to be asserted if it is out-of-limit or reports a Diode Fault Bit 1 – E1MASK  Masks the ALERT pin from asserting when the External Diode 1 channel is out-of-limit or reports a Diode Fault. Value Description 1 The External Diode 1 channel will not cause the ALERT pin to be asserted if it is out-of-limit or reports a Diode Fault 0 The External Diode 1 channel will cause the ALERT pin to be asserted if it is out-of-limit or reports a Diode Fault Bit 0 – INTMASK  Masks the ALERT pin from asserting when the internal diode temperature is out-of-limit. Value Description 1 The internal diode channel will not cause the ALERT pin to be asserted if it is out-of-limit 0 The internal diode channel will cause the ALERT pin to be asserted if it is out-of-limit © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 61 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.23 Consecutive Alert Register (Address 22h) Name:  Offset:  Bit Access Reset 7 TMOUT RW 0 CONSEC ALERT 0x22 6 RW 1 5 CTHRM[2:0] RW 1 4 3 RW 1 RW 0 2 CALRT[2:0] RW 0 1 0 RW 0 Bit 7 – TMOUT  Enables the time-out and Idle functionality of the I2C protocol. Value Description 1 The I2C time-out and Idle functionality are enabled. The I2C interface will time-out if the clock line is held low for longer than 30 ms. Likewise, it will reset if both the data and clock lines are held high for longer than 200 µs. 0 The I2C time-out and Idle functionality are disabled. The I2C interface will not time-out if the clock line is held low for longer than 30 ms. Likewise, it will not reset if both the data and clock lines are held high for longer than 200 µs. This is used for I2C compliance. Bits 6:4 – CTHRM[2:0]  Determines the number of consecutive measurements that must exceed the corresponding Therm Limit before the THERM pin is asserted. Value Description 000 1 001 2 011 3 111 4 Bits 3:1 – CALRT[2:0]  Determines the number of consecutive measurements that must exceed the corresponding Therm Limit before the ALERT pin is asserted. Value Description 000 1 001 2 011 3 111 4 © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 62 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.24 Ext(n) Beta Compensation Configuration Register (Address 25h and 26h) Name:  Offset:  Bit 7 EXTn BETA CONFIG 0x25, 0x26 6 Access Reset 5 4 ENBL(N) RW 0 3 RO 0 2 1 BETA(N)[3:0] RO RO 0 0 0 RO 0 Bit 4 – ENBL(N) Enables the beta compensation factor auto-detection function; x = 1 or 2, depending on the device. Value Description 1 Auto-beta detection for External Diode x is enabled 0 Auto-beta detection for External Diode x is disabled Bits 3:0 – BETA(N)[3:0] These bits always reflect the current beta configuration settings. If auto-detection circuitry is enabled, these bits will be updated automatically and writing to these bits will have no effect. See Table 7-7 for details. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 63 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.25 Ext (n) Programmable Ideality Factor Register (Address 27h, 28h, 31h and 39h) Name:  Offset:  Bit 7 EXTn IDEALITY FACTOR 0x27, 0x28, 0x31, 0x39 6 Access Reset 5 4 RW 0 RW 1 3 2 IDEAL(N)[5:0] RW RW 0 0 1 0 RW 1 RW 0 Bits 5:0 – IDEAL(N)[5:0] External Diode n ideality factor, where n = 1 to 4 depending on device. See Table 7-8 or Table 7-9 for details. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 64 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.26 High Limit Status Register (Address 3Ah) Name:  Offset:  Bit 7 HIGH LIMIT STATUS 0x3A 6 Access Reset 5 4 E4HIGH RC 0 3 E3HIGH RC 0 2 E2HIGH RC 0 1 E1HIGH RC 0 0 IHIGH RC 0 Bit 4 – E4HIGH This bit is set when the External Diode 4 exceeds its programmed high limit. Reading this register will also clear the HIGH bit. Value Description 1 High limit exceeded 0 High limit not exceeded Bit 3 – E3HIGH This bit is set when the External Diode 3 exceeds its programmed high limit. Reading this register will also clear the HIGH bit. Value Description 1 High limit exceeded 0 High limit not exceeded Bit 2 – E2HIGH This bit is set when the External Diode 2 exceeds its programmed high limit. Reading this register will also clear the HIGH bit. Value Description 1 High limit exceeded 0 High limit not exceeded Bit 1 – E1HIGH This bit is set when the External Diode 1 exceeds its programmed high limit. Reading this register will also clear the HIGH bit. Value Description 1 High limit exceeded 0 High limit not exceeded Bit 0 – IHIGH This bit is set when the internal diode exceeds its programmed high limit. Reading this register will also clear the HIGH bit. Value Description 1 High limit exceeded 0 High limit not exceeded © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 65 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.27 Low Limit Status Register (Address 3Bh) Name:  Offset:  Bit 7 LOW LIMIT STATUS 0x3B 6 Access Reset 5 4 E4LOW RC 0 3 E3LOW RC 0 2 E2LOW RC 0 1 E1LOW RC 0 0 ILOW RC 0 Bit 4 – E4LOW This bit is set when the External Diode 4 channel drops below its programmed low limit. Reading from the register will also clear the LOW status bit in the Status register. Value Description 1 Low limit exceeded 0 Low limit not exceeded Bit 3 – E3LOW This bit is set when the External Diode 3 channel drops below its programmed low limit. Reading from the register will also clear the LOW status bit in the Status register. Value Description 1 Low limit exceeded 0 Low limit not exceeded Bit 2 – E2LOW This bit is set when the External Diode 2 drops below its programmed low limit. Reading this register will also clear the LOW bit. Value Description 1 Low limit exceeded 0 Low limit not exceeded Bit 1 – E1LOW This bit is set when the External Diode 1 drops below its programmed low limit. Reading this register will also clear the LOW bit. Value Description 1 Low limit exceeded 0 Low limit not exceeded Bit 0 – ILOW This bit is set when the internal diode drops below its programmed low limit. Reading this register will also clear the LOW bit. Value Description 1 Low limit exceeded 0 Low limit not exceeded © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 66 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.28 Therm High Limit Status Register (Address 3Ch) Name:  Offset:  THERM LIMIT STATUS 0x3C Note:  The Therm Limit Status register contains the status bits that are set when a temperature channel Therm Limit is exceeded. If any of these bits are set, the THERM Status bit in the Status register is set. Reading from the Therm Limit Status register will not clear the status bits. Once the temperature drops below the Therm Limit minus the Therm Hysteresis, the corresponding status bits will be automatically cleared. The THERM bit in the Status register will be cleared when all individual channel THERM bits are cleared. Bit 7 6 Access Reset 5 4 E4THERM RO 0 3 E3THERM RO 0 2 E2THERM RO 0 1 E1THERM RO 0 0 ITHERM RO 0 Bit 4 – E4THERM This bit is set when the External Diode 4 channel exceeds its programmed Therm Limit. When set, this bit will assert the THERM pin. Value Description 1 THERM pin asserted 0 THERM pin not asserted Bit 3 – E3THERM This bit is set when the External Diode 3 channel exceeds its programmed Therm Limit. When set, this bit will assert the THERM pin. Value Description 1 THERM pin asserted 0 THERM pin not asserted Bit 2 – E2THERM This bit is set when the External Diode 2 channel exceeds its programmed Therm Limit. When set, this bit will assert the THERM pin. Value Description 1 THERM pin asserted 0 THERM pin not asserted Bit 1 – E1THERM This bit is set when the External Diode 1 channel exceeds its programmed Therm Limit. When set, this bit will assert the THERM pin. Value Description 1 THERM pin asserted 0 THERM pin not asserted Bit 0 – ITHERM This bit is set when the internal diode channel exceeds its programmed Therm Limit. When set, this bit will assert the THERM pin. Value Description 1 THERM pin asserted 0 THERM pin not asserted © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 67 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.29 Rate Of Change Gain Register (Address 3Dh) Name:  Offset:  Bit 7 ROC GAIN 0x3D 6 5 4 3 2 1 0 RW 0 RW 0 RW 0 RW 0 RC1G[7:0] Access Reset RW 0 RW 0 RW 0 RW 0 Bits 5:3 – RC2/3G[2:0] This represents the binary gain applied to the difference equation. Value Description 0 1 1 2 2 4 3 8 4 16 5 32 6 64 7 128 Bits 7:0 – RC1G[7:0] This represents the binary gain applied to the difference equation. Value Description 0 1 1 2 2 4 3 8 4 16 5 32 6 64 7 128 © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 68 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.30 Rate of Change Configuration Register (Address 3Eh) Name:  Offset:  Bit Access Reset 7 ROC CONFIG 0x3E 6 5 EN_ROC RW 0 4 MASK2/3 RW 0 3 MASK1 RW 0 2 RW 0 1 RCHY[2:0] RW 0 0 RW 0 Bit 5 – EN_ROC Enables the Rate of Change calculations. Value Description 1 Rate of Change enabled 0 Rate of Change disabled Bit 4 – MASK2/3 Masks an event from setting the ALERT pin from Channel 2. Value Description 1 Event is masked 0 Event will assert the ALERT pin Bit 3 – MASK1 Masks an event from setting the ALERT pin from Channel 1. Value Description 1 Event is masked 0 Event will assert the ALERT pin Bits 2:0 – RCHY[2:0] Hysteresis setting for Rate of Change slope reversal. Deviations greater than this setting will result in the bit being set. Value Description 111 4.000°C 110 3.000°C 101 2.000°C 100 1.000°C 011 0.500°C 010 0.250°C 001 0.125°C 000 0.000°C © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 69 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.31 Rate of Change Status Register (Address 3Fh) Name:  Offset:  Bit Access Reset 7 SLCG2/3 RO 0 ROC STATUS 0x3F 6 SLCG1 RO 0 5 R2/3ODD RO 0 4 R1ODD RO 0 3 RC2/3HI RC 0 2 RC1HI RC 0 1 RC2/3LO RC 0 0 RC1LO RC 0 Bit 7 – SLCG2/3 Reports a change in slope during the Rate of Change calculation for External Channel 2. Value Description 1 Slope changed direction 0 Monotonic slope Bit 6 – SLCG1 Reports a change in slope during the Rate of Change calculation for External Channel 1. Value Description 1 Slope changed direction 0 Monotonic slope Bit 5 – R2/3ODD Indicates whether the number of slope reversals was even or odd. Value Description 1 Odd number of slope reversals during the sampling period 0 Even number of reversals during the sampling period Bit 4 – R1ODD Indicates whether the number of slope reversals was even or odd. Value Description 1 Odd number of slope reversals during the sampling period 0 Even number of reversals during the sampling period Bit 3 – RC2/3HI This bit is set when the Rate of Change results for External Diode 2 exceeds its programmed limit. Value Description 1 High limit exceeded 0 High limit not exceeded Bit 2 – RC1HI This bit is set when the Rate of Change results for External Diode 1 exceeds its programmed limit. Value Description 1 High limit exceeded 0 High limit not exceeded Bit 1 – RC2/3LO This bit is set when the Rate of Change results for External Diode 2 exceeds its programmed limit (applies when slope limit is negative). Value Description 1 Low limit exceeded 0 Low limit not exceeded Bit 0 – RC1LO This bit is set when the Rate of Change results for External Diode 1 exceeds its programmed limit (applies when slope limit is negative). Value Description 1 Low limit exceeded 0 Low limit not exceeded © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 70 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.32 Rate of Change Results High Byte Register (n) (Addresses 40h and 44h) Name:  Offset:  Bit 7 R RESH 0x40 + (n-1)*0x04 [n=1..2] 6 5 4 3 2 1 0 RO 0 RO 0 RO 0 RO 0 R(N)RH[7:0] Access Reset RO 0 RO 0 RO 0 RO 0 Bits 7:0 – R(N)RH[7:0] This is the high byte of the result of the most recent Rate of Change calculations, where n = 1 or 2 corresponding to the remote diode channel. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 71 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.33 Rate of Change Results Low Byte Register (Address 45h) Name:  Offset:  Bit Access Reset 7 RO 0 R2/3 RESL 0x45 6 5 R2/3_RL[3:0] RO RO 0 0 4 3 2 1 0 RO 0 RO 0 R1_RL[3:0] RO 0 RO 0 RO 0 Bits 7:4 – R2/3_RL[3:0] This is the low byte of the result of the most recent Rate of Change calculations for remote Diode Channel 2. Bits 3:0 – R1_RL[3:0] This is the low byte of the result of the most recent Rate of Change calculations for remote Diode Channel 1. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 72 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.34 Rate of Change Alert Limit High Byte Register (n) (Addresses 41h and 46h) Name:  Offset:  Bit Access Reset R LIMH 0x41 + (n-1)*0x05 [n=1..2] 7 6 5 RW 0 RW 0 RW 0 4 3 R(N)LIMH[7:0] RW RW 0 0 2 1 0 RW 0 RW 0 RW 0 Bits 7:0 – R(N)LIMH[7:0] This is the high byte ROC ALERT limit. If the ROC results exceed this value and the MASK bit is not set, the ALERT pin will assert; where n = 1 or 2 corresponding to the remote diode channel. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 73 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.35 Rate of Change Alert Limit Low Byte Register (n) (Address 42h and 47h) Name:  Offset:  Bit Access Reset 7 RW 0 R LIML 0x42 + (n-1)*0x05 [n=1..2] 6 5 R(N)LIML[3:0] RW RW 0 0 4 3 2 1 0 RW 0 Bits 7:4 – R(N)LIML[3:0]  This is the low byte ROC ALERT limit, where n = 1 or 2 corresponding to the remote diode channel. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 74 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.36 Rate of Change Samples Register (Address 43h and 48h) Name:  Offset:  Bit 7 R SMPL 0x43 + (n-1)*0x05 [n=1..2] 6 5 4 3 2 1 0 RW 0 RW 0 R(N)SH[3:0] Access Reset RW 0 RW 0 Bits 3:0 – R(N)SH[3:0] This represents the high byte of the number of samples taken for the Rate of Change calculation, where n = 1 or 2 corresponding to the remote diode channel. Value Description 0x0 2 Samples 0x1 3 Samples 0x2 5 Samples 0x3 9 Samples 0x4 17 Samples 0x5 33 Samples 0x6 65 Samples 0x7 129 Samples 0x8-0xF 257 Samples © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 75 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.37 Sample Period Max Temperature High Byte Data Register (Address 49h and 4Bh) Name:  Offset:  Bit Access Reset PER MAXTH 0x49 + (n-1)*0x02 [n=1..2] 7 6 5 RO 0 RO 0 RO 0 4 3 GM(N)HB[7:0] RO RO 0 0 2 1 0 RO 0 RO 0 RO 0 Bits 7:0 – GM(N)HB[7:0] Integer value of the internal diode maximum temperature reading within the sample period. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 76 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.38 Sample Period Max Temperature Low Byte Data Register (Address 4Ah and 4Ch) Name:  Offset:  Bit Access Reset 7 RO 0 PER MAXTL 0x4A + n*0x02 [n=0..1] 6 PM(N)L[2:0] RO 0 5 4 3 2 1 0 RO 0 Bits 7:5 – PM(N)L[2:0] Fractional portion of the internal diode temperature to be added to the value at register 00h. Value Description 111 0.875°C 110 0.750°C 101 0.625°C 100 0.500°C 011 0.375°C 010 0.250°C 001 0.125°C 000 0.000°C © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 77 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.39 Global Max Temperature High Byte Register (Address 4Dh and 4Fh) Name:  Offset:  Bit Access Reset GBL MAXTH 0x4D + (n-1)*0x02 [n=1..2] 7 6 5 RO 0 RO 0 RO 0 4 3 GM(N)HB[7:0] RO RO 0 0 2 1 0 RO 0 RO 0 RO 0 Bits 7:0 – GM(N)HB[7:0] Integer value of the External Diode n; maximum temperature reading within the sample period, where n = 1 or 2 corresponding to External Diode 1 or 2. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 78 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.40 Sample Period Max Temperature Low Byte Data Register (Address 4Eh and 50h) Name:  Offset:  Bit Access Reset 7 RO 0 GBL MAXTL 0x4E + (n-1)*0x02 [n=1..2] 6 GM(N)LB[2:0] RO 0 5 4 3 2 1 0 RO 0 Bits 7:5 – GM(N)LB[2:0] Fractional portion of the External Diode n; maximum temperature reading within the sample period, where n = 1 or 2 corresponding to External Diode 1 or 2. Value Description 111 0.875°C 110 0.750°C 101 0.625°C 100 0.500°C 011 0.375°C 010 0.250°C 001 0.125°C 000 0.000°C © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 79 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.41 Filter Selection Register (Address 51h) Name:  Offset:  Bit 7 FILTER SEL 0x51 6 5 4 3 2 1 0 FILTER[1:0] Access Reset RW 0 RW 0 Bits 1:0 – FILTER[1:0] Control the level of digital filtering that is applied to the external diode temperature measurement as shown in Table 5-5. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 80 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.42 Hottest Diode Temperature High Byte Register (Address 6Ah) Name:  Offset:  Bit 7 HOTTEST DIODE HIGH BYTE 0x6A 6 5 4 3 2 1 0 HDHB[7:0] Access Reset Bits 7:0 – HDHB[7:0] Integer value of the hottest diode from the most recent samples. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 81 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.43 Hottest Diode Temperature Low Byte Register (Address 6Bh) Name:  Offset:  Bit Access Reset 7 RO 0 HOTTEST DIODE LOW BYTE 0x6B 6 HDLB[2:0] RO 0 5 4 3 2 1 0 RO 0 Bits 7:5 – HDLB[2:0] Fractional portion of the hottest diode for the most recent sample period. Value Description 111 0.875°C 110 0.750°C 101 0.625°C 100 0.500°C 011 0.375°C 010 0.250°C 001 0.125°C 000 0.000°C © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 82 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.44 Hottest Diode Status Register (Address 6Ch) Name:  Offset:  Bit 7 HOTTEST STATUS 0x6C 6 Access Reset 5 4 E4HOT RO 0 3 E3HOT RO 0 2 E2HOT RO 0 1 E1HOT RO 0 0 IHOT RO 0 Bit 4 – E4HOT Indicates External Diode 4 is the hottest. Value Description 1 External Diode 4 is hottest 0 External Diode 4 is not hottest Bit 3 – E3HOT Indicates External Diode 3 is the hottest. Value Description 1 External Diode 3 is hottest 0 External Diode 3 is not hottest Bit 2 – E2HOT Indicates External Diode 2 is the hottest. Value Description 1 External Diode 2 is hottest 0 External Diode 2 is not hottest Bit 1 – E1HOT Indicates External Diode 1 is the hottest. Value Description 1 External Diode 1 is hottest 0 External Diode 1 is not hottest Bit 0 – IHOT Indicates internal diode is the hottest. Value Description 1 Internal diode is hottest 0 Internal diode is not hottest © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 83 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.45 Hottest Diode Configuration Register (Address 6Dh) Name:  Offset:  Bit Access Reset 7 HOTTEST CONFIG 0x6D 6 5 REMHOT RW 0 4 E4ENB RW 0 3 E3ENB RW 0 2 E2ENB RW 0 1 E1ENB RW 0 0 IENB RW 0 Bit 5 – REMHOT  Enables the Remember Hottest function, so if the hottest diode changes, the ALERT pin is set. Value Description 1 Remember Hottest function enabled 0 Remember Hottest function disabled Bit 4 – E4ENB Enables External Diode 4 for “Hottest of” comparisons. Value Description 1 External Diode 4 is enabled 0 External Diode 4 is not enabled Bit 3 – E3ENB Enables External Diode 3 for “Hottest of” comparisons. Value Description 1 External Diode 3 is enabled 0 External Diode 3 is not enabled Bit 2 – E2ENB Enables External Diode 2 for “Hottest of” comparisons. Value Description 1 External Diode 2 is enabled 0 External Diode 2 is not enabled Bit 1 – E1ENB Enables External Diode 1 for “Hottest of” comparisons. Value Description 1 External Diode 1 is enabled 0 External Diode 1 is not enabled Bit 0 – IENB Enables internal diode for “Hottest of” comparisons. Value Description 1 Internal diode is enabled 0 Internal diode is not enabled © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 84 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.46 Product ID Register (Address FDh) Name:  Offset:  Bit Access Reset PRODUCT ID 0xFD 7 6 5 RO RO RO 4 3 PRODUCT_ID[7:0] RO RO Bits 7:0 – PRODUCT_ID[7:0] Unique Product ID. Value EMC1822-1/2 EMC1823-1/2 EMC1824-1/2 EMC1825-1/2 EMC1843-1/2 © 2018-2020 Microchip Technology Inc. 2 1 0 RO RO RO Description 0x89 0x8F 0x8C 0x8D 0x8B Datasheet DS20006048B-page 85 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.47 Manufacturer ID Register (Address FEh) Name:  Offset:  Bit Access Reset MANUFACTURER ID 0xFE 7 6 5 RO 0 RO 1 RO 0 4 3 MCHP_ID[7:0] RO RO 1 0 2 1 0 RO 1 RO 0 RO 0 Bits 7:0 – MCHP_ID[7:0] Unique manufacturer ID for Microchip. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 86 Multi-Channel Low-Voltage Temp Sens... System Management Bus Protocol 8.11.48 Revision – Revision Register (Address FFh) Name:  Offset:  Bit 7 REVISION 0xFF 6 5 4 3 2 1 0 RO RO RO RO REV[7:0] Access Reset RO RO RO RO Bits 7:0 – REV[7:0] Die revision number. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 87 Multi-Channel Low-Voltage Temp Sens... Packaging Information 9. Packaging Information 9.1 Package Marking Information 8-Lead WDFN (2 x 2 mm) XXX LNNN Product Number Code EMC1822T-1E/RW EMC1822T-2E/RW ABV ABW ACB ACC EMC1843T-1E/RW EMC1843T-2E/RW 10-Lead VDFN (2.5 x 2.0 mm) xxxx ,NNN I ) PIN 1 ABV 256 Example Product Number Code EMC1823T-1E/9R EMC1823T-2E/9R EMC1824T-1E/9R EMC1824T-2E/9R EMC1825T-1E/9R EMC1825T-2E/9R 8231 8232 8241 8242 8251 8252 8231 256 �-'\.._ PIN 1 Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e3 JEDEC® designator for Matte Tin (Sn) * This package is RoHS compliant. The JEDEC designator ( e3 ) can be found on the outer packaging for this package. Note:  In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.   © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 88 Multi-Channel Low-Voltage Temp Sens... Packaging Information 8-Lead Very, Very Thin Plastic Dual Flat, No Lead Package (RW) - 2x2 mm Body [WDFN] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging A D B N (DATUM A) (DATUM B) E NOTE 1 2X 0.05 C 1 2X 2 TOP VIEW 0.05 C 0.05 C (A3) A C SEATING PLANE SIDE VIEW A1 0.05 C D2 2X CH 1 2 NOTE 1 0.05 C A B E2 (K) L N 8X b e BOTTOM VIEW 0.10 0.05 C A B C Microchip Technology Drawing C04-261A Sheet 1 of 2 © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 89 Multi-Channel Low-Voltage Temp Sens... Packaging Information 8-Lead Very, Very Thin Plastic Dual Flat, No Lead Package (RW) - 2x2 mm Body [WDFN] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits N Number of Terminals e Pitch A Overall Height Standoff A1 (A3) Terminal Thickness E Overall Width E2 Exposed Pad Width D Overall Length D2 Exposed Pad Length Exposed Pad Chamfer CH b Terminal Width Terminal Length L (K) Terminal-to-Exposed-Pad MIN 0.70 0.00 0.70 1.10 0.20 0.25 0.30 MILLIMETERS NOM 8 0.50 BSC 0.75 0.02 0.10 REF 2.00 BSC 0.80 2.00 BSC 1.20 0.25 0.25 0.30 - MAX 0.80 0.05 0.90 1.30 0.30 0.35 - Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-261A Sheet 2 of 2 © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 90 Multi-Channel Low-Voltage Temp Sens... Packaging Information 8-Lead Very, Very Thin Plastic Dual Flat, No Lead Package (RW) - 2x2 mm Body [WDFN] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging C 2X CH ØV 8 1 2 E X2 X1 G SILK SCREEN (G2) Y2 Y1 RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Y2 Optional Center Pad Width Optional Center Pad Length X2 Contact Pad Spacing C Center Pad Chamfer CH Contact Pad Width (X8) X1 Contact Pad Length (X8) Y1 Contact Pad to Contact Pad (X6) G1 Contact Pad to Center Pad (X8) G1 Thermal Via Diameter V MIN MILLIMETERS NOM 0.50 BSC MAX 0.90 1.30 2.10 0.28 0.30 0.70 0.20 0.25 REF 0.30 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerances, for reference only. Microchip Technology Drawing C04-2261A © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 91 Multi-Channel Low-Voltage Temp Sens... Packaging Information 10-Lead Very Thin Plastic Dual Flat, No Lead Package (9R) - 2.5x2.0 mm Body [VDFN] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) (DATUM B) E NOTE 1 2X 0.05 C 2X 1 0.05 C 2 TOP VIEW 0.05 C A1 C A SEATING PLANE (A3) SIDE VIEW 1 0.05 C 2 NOTE 1 L N 10X b e BOTTOM VIEW 0.10 0.07 C A B C Microchip Technology Drawing C04-332B Sheet 1 of 2 © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 92 Multi-Channel Low-Voltage Temp Sens... Packaging Information 10-Lead Very Thin Plastic Dual Flat, No Lead Package (9R) - 2.5x2.0 mm Body [VDFN] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Number of Pins Pitch Overall Height Standoff Terminal Thickness Overall Length Overall Width Terminal Width Terminal Length Units Dimension Limits N e A A1 (A3) D E b L MIN 0.80 0.00 0.20 0.30 MILLIMETERS NOM 10 0.50 BSC 0.85 0.02 0.10 REF 2.50 BSC 2.00 BSC 0.25 0.40 MAX 0.90 0.05 0.30 0.50 Notes : 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-332B Sheet 2 of 2 © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 93 Multi-Channel Low-Voltage Temp Sens... Packaging Information 10-Lead Very Thin Plastic Dual Flat, No Lead Package (9R) - 2.5x2.0 mm Body [VDFN] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging C 1 10 2 e G X1 Y1 SILK SCREEN RECOMMENDED LAND PATTERN Units Dimension Limits Contact Pitch E Contact Pad Spacing C Contact Pad Width (X10) X1 Contact Pad Length (X10) Y1 Contact Pad to Center Pad (X10) G1 MIN MILLIMETERS NOM 0.50 BSC 1.90 MAX 0.30 0.85 0.20 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-2332A © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 94 Multi-Channel Low-Voltage Temp Sens... Revision History 10. Revision History Revision B (July 2020) The following is the list of modifications: • Corrected Section 8.11.46 PRODUCT ID. • Corrected Section 9.1 Package Marking Information. Revision A (November 2018) Original release of the document. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 95 Multi-Channel Low-Voltage Temp Sens... The Microchip Website Microchip provides online support via our website at www.microchip.com/. This website is used to make files and information easily available to customers. Some of the content available includes: • • • Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software General Technical Support – Frequently Asked Questions (FAQs), technical support requests, online discussion groups, Microchip design partner program member listing Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives Product Change Notification Service Microchip’s product change notification service helps keep customers current on Microchip products. Subscribers will receive email notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, go to www.microchip.com/pcn and follow the registration instructions. Customer Support Users of Microchip products can receive assistance through several channels: • • • • Distributor or Representative Local Sales Office Embedded Solutions Engineer (ESE) Technical Support Customers should contact their distributor, representative or ESE for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in this document. Technical support is available through the website at: www.microchip.com/support © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 96 Multi-Channel Low-Voltage Temp Sens... Product Identification System To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. [X](1) Device –X X /XX Tape SMBUS Temp. Package and Reel Address Range Device: EMC1822: High-Accuracy, Low-Cost, Two-Wire Temperature Sensor EMC1823: High-Accuracy, Low-Cost, Two-Wire Temperature Sensor EMC1824: High-Accuracy, Low-Cost, Two-Wire Temperature Sensor EMC1825: High-Accuracy, Low-Cost, Two-Wire Temperature Sensor EMC1843: High-Accuracy, Low-Cost, Two-Wire Temperature Sensor Tape and Reel Option: T = Tape and Reel SMBus Address: 1 = 1001_100(r/w) 2 = 1000_101(r/w) Temperature Range: E = -40°C to +125°C (Extended) Package: RW = 8-Lead Very, Very Thin Plastic Dual Flat, No Lead – 2 x 2 mm Body (WDFN) 9R = 10-Lead Very Thin Plastic Dual Flat, No Lead – 2.5 x 2.0 mm Body (VDFN) Examples: • EMC1822T-1E/RW:Tape and Reel, 1001_100(r/w), Extended Temperature, 8L-WDFN package • EMC1843T-2E/RW:Tape and Reel 1000_101(r/w), Extended Temperature, 8L-WDFN package • EMC1823T-1E/9R:Tape and Reel, 1001_100(r/w), Extended Temperature, 10L-VDFN package • EMC1824T-1E/9R:Tape and Reel, 1001_100(r/w), Extended Temperature, 10L-VDFN package • EMC1825T-2E/9R:Tape and Reel, 1000_101(r/w), Extended Temperature, 10L-VDFN package Notes:  1. Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. 2. Small form-factor packaging options may be available. Please check www.microchip.com/packaging for smallform factor package availability, or contact your local Sales Office. Microchip Devices Code Protection Feature Note the following details of the code protection feature on Microchip devices: • • • • • Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 97 Multi-Channel Low-Voltage Temp Sens... Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. 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APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, Vite, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2018-2020, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-6476-1 Quality Management System For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality. © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 98 Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: www.microchip.com/support Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Austin, TX Tel: 512-257-3370 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Novi, MI Tel: 248-848-4000 Houston, TX Tel: 281-894-5983 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Tel: 317-536-2380 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Tel: 951-273-7800 Raleigh, NC Tel: 919-844-7510 New York, NY Tel: 631-435-6000 San Jose, CA Tel: 408-735-9110 Tel: 408-436-4270 Canada - Toronto Tel: 905-695-1980 Fax: 905-695-2078 Australia - Sydney Tel: 61-2-9868-6733 China - Beijing Tel: 86-10-8569-7000 China - Chengdu Tel: 86-28-8665-5511 China - Chongqing Tel: 86-23-8980-9588 China - Dongguan Tel: 86-769-8702-9880 China - Guangzhou Tel: 86-20-8755-8029 China - Hangzhou Tel: 86-571-8792-8115 China - Hong Kong SAR Tel: 852-2943-5100 China - Nanjing Tel: 86-25-8473-2460 China - Qingdao Tel: 86-532-8502-7355 China - Shanghai Tel: 86-21-3326-8000 China - Shenyang Tel: 86-24-2334-2829 China - Shenzhen Tel: 86-755-8864-2200 China - Suzhou Tel: 86-186-6233-1526 China - Wuhan Tel: 86-27-5980-5300 China - Xian Tel: 86-29-8833-7252 China - Xiamen Tel: 86-592-2388138 China - Zhuhai Tel: 86-756-3210040 India - Bangalore Tel: 91-80-3090-4444 India - New Delhi Tel: 91-11-4160-8631 India - Pune Tel: 91-20-4121-0141 Japan - Osaka Tel: 81-6-6152-7160 Japan - Tokyo Tel: 81-3-6880- 3770 Korea - Daegu Tel: 82-53-744-4301 Korea - Seoul Tel: 82-2-554-7200 Malaysia - Kuala Lumpur Tel: 60-3-7651-7906 Malaysia - Penang Tel: 60-4-227-8870 Philippines - Manila Tel: 63-2-634-9065 Singapore Tel: 65-6334-8870 Taiwan - Hsin Chu Tel: 886-3-577-8366 Taiwan - Kaohsiung Tel: 886-7-213-7830 Taiwan - Taipei Tel: 886-2-2508-8600 Thailand - Bangkok Tel: 66-2-694-1351 Vietnam - Ho Chi Minh Tel: 84-28-5448-2100 Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4485-5910 Fax: 45-4485-2829 Finland - Espoo Tel: 358-9-4520-820 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Garching Tel: 49-8931-9700 Germany - Haan Tel: 49-2129-3766400 Germany - Heilbronn Tel: 49-7131-72400 Germany - Karlsruhe Tel: 49-721-625370 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Germany - Rosenheim Tel: 49-8031-354-560 Israel - Ra’anana Tel: 972-9-744-7705 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Italy - Padova Tel: 39-049-7625286 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Norway - Trondheim Tel: 47-72884388 Poland - Warsaw Tel: 48-22-3325737 Romania - Bucharest Tel: 40-21-407-87-50 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 Sweden - Gothenberg Tel: 46-31-704-60-40 Sweden - Stockholm Tel: 46-8-5090-4654 UK - Wokingham Tel: 44-118-921-5800 Fax: 44-118-921-5820 © 2018-2020 Microchip Technology Inc. Datasheet DS20006048B-page 99