EVB-LAN9221-MINI

LAN9220 16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support PRODUCT FEATURES Data Brief Highlights „ „ „ „ „ „ „ Efficient architecture with low CPU overhead Easily interfaces to most 16-bit embedded CPU’s 1.8V to 3.3V variable voltage I/O accommodates wide range of I/O signalling without voltage level shifters Integrated PHY with HP Auto-MDIX support Integrated checksum offload engine helps reduce CPU load Low pin count and small body size package for small form factor system designs — — — — — — — — — — „ „ „ „ „ „ „ Cable, satellite, and IP set-top boxes Digital video recorders Video-over IP solutions, IP PBX & video phones Wireless routers & access points Audio distribution systems Printers, kiosks, security systems General embedded applications „ „ Minimizes dropped packets Minimizes CPU overhead — Supports Slave-DMA — Interrupt Pin with Programmable Hold-off timer „ „ „ Reduces system cost and increases design flexibility SRAM-like interface easily interfaces to most embedded CPU’s or SoC’s Reduced Power Modes — — — — — Numerous power management modes Wake on LAN Magic packet wakeup Wakeup indicator event signal Link Status Change SMSC LAN9220 Host bus interface Simple, SRAM-like interface 16-bit data bus 16Kbyte FIFO with flexible TX/RX allocation One configurable host interrupt Miscellaneous features — Small form factor, 56-pin QFN lead-free RoHS Compliant package — Integrated 1.8V regulator — Integrated checksum offload engine — Mixed endian support — General Purpose Timer — Optional EEPROM interface — Support for 3 status LEDs multiplexed with Programmable GPIO signals — Internal buffer memory can store over 200 packets — Automatic PAUSE and back-pressure flow control „ Integrated 10/100 Ethernet PHY — — — — Non-PCI Ethernet controller for standard performance applications — 16-bit interface — Burst-mode read support One 48-bit perfect address 64 hash-filtered multicast addresses Pass all multicast Promiscuous mode Inverse filtering Pass all incoming with status report Disable reception of broadcast packets — Supports HP Auto-MDIX — Auto-negotiation — Supports energy-detect power down „ Key Benefits „ „ Fully compliant with IEEE 802.3/802.3u standards Integrated Ethernet MAC and PHY 10BASE-T and 100BASE-TX support Full- and Half-duplex support Full-duplex flow control Backpressure for half-duplex flow control Preamble generation and removal Automatic 32-bit CRC generation and checking Automatic payload padding and pad removal Loop-back modes Flexible address filtering modes — — — — — — — Target Applications „ Single chip Ethernet controller „ „ Single 3.3V Power Supply with Variable Voltage I/O 0°C to +70°C Commercial Temperature Support PRODUCT PREVIEW Revision 2.9 (03-01-12) 16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support Order Number(s): LAN9220-ABZJ for 56-pin, QFN Lead-free RoHS Compliant package (0 to +70°C Temp Range) This product meets the halogen maximum concentration values per IEC61249-2-21 For RoHS compliance and environmental information, please visit www.smsc.com/rohs Copyright © 2012 SMSC or its subsidiaries. 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Revision 2.9 (03-01-12) 2 PRODUCT PREVIEW SMSC LAN9220 16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support General Description The LAN9220 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9220 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP Auto-MDIX. The variable voltage I/O signals of the LAN9220 accommodate lower voltage I/O signalling without the need for voltage level shifters. The LAN9220 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors with a 16-bit external bus. The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading the task from the CPU. The LAN9220 also includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9220 memory buffer architecture allows highly efficient use of memory resources by optimizing packet granularity. Applications The LAN9220 is well suited for many embedded applications, including: „ Printers, kiosks, POS terminals and security systems „ Audio distribution systems „ General embedded systems „ Basic cable, satellite and IP set-top boxes „ Voice-over-IP solutions The LAN9220 also supports features which reduce or eliminate packet loss. Its internal 16-KByte SRAM can hold over 200 received packets. If the receive FIFO gets too full, the LAN9220 can automatically generate flow control packets to the remote node, or assert back-pressure on the remote node by generating network collisions. The LAN9220 supports numerous power management and wakeup features. The LAN9220 can be placed in a reduced power mode and can be programmed to issue an external wake signal via several methods, including “Magic Packet”, “Wake on LAN” and “Link Status Change”. This signal is ideal for triggering system power-up using remote Ethernet wakeup events. The device can be removed from the low power state via a host processor command. SMSC LAN9220 3 PRODUCT PREVIEW Revision 2.9 (03-01-12) 16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support Block Diagram System Memory System Peripherals Microprocessor/ Microcontroller Magnetics System Bus Ethernet LAN9220 LEDS/ GPIO 25MHz XTAL EEPROM (Optional) Figure 1 System Block Diagram Revision 2.9 (03-01-12) 4 PRODUCT PREVIEW SMSC LAN9220 16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support Package Outline 56-QFN Package Figure 2 56-Pin QFN Package Definition Table 1 56-Pin QFN Package Parameters MIN 0.70 0.00 ~ 7.85 7.55 5.75 0.30 0.18 A A1 A2 D/E D1/E1 D2/E2 L b e NOMINAL ~ 0.02 ~ 8.00 ~ 5.90 ~ 0.25 0.50 Basic MAX 1.00 0.05 0.90 8.15 7.95 6.05 0.50 0.30 REMARKS Overall Package Height Standoff Mold Cap Thickness X/Y Body Size X/Y Mold Cap Size X/Y Exposed Pad Size Terminal Length Terminal Width Terminal Pitch Notes: 1. All dimensions are in millimeters. 2. Position tolerance of each terminal and exposed pad is ± 0.05 mm at maximum material condition. Dimension “b” applies to plated terminals and is measured between 0.15 and 0.30 mm from the terminal tip. 3. The pin 1 identifier may vary, but is always located within the zone indicated. SMSC LAN9220 5 PRODUCT PREVIEW Revision 2.9 (03-01-12) 16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support Figure 3 56-Pin QFN Recommended PCB Land Pattern Revision 2.9 (03-01-12) 6 PRODUCT PREVIEW SMSC LAN9220