HCS361T/SN

HCS361 KEELOQ® Code Hopping Encoder FEATURES Security • • • • • • Programmable 28/32-bit serial number Programmable 64-bit encryption key Each transmission is unique 67-bit transmission code length 32-bit hopping code 35-bit fixed code (28/32-bit serial number, 4/0-bit function code, 1-bit status, 2-bit CRC) • Encryption keys are read protected Operating DESCRIPTION The HCS361 is a code hopping encoder designed for secure Remote Keyless Entry (RKE) systems. The HCS361 utilizes the KEELOQ® code hopping technology, which incorporates high security, a small package outline and low cost, to make this device a perfect solution for unidirectional remote keyless entry systems and access control systems. PACKAGE TYPES PDIP, SOIC Other • • • • • • Easy to use programming interface On-chip EEPROM On-chip oscillator and timing components Button inputs have internal pull-down resistors Current limiting on LED output Minimum component count S0 1 S1 2 S2 3 S3 4 48-bit seed vs. 32-bit seed 2-bit CRC for error detection 28/32-bit serial number select Two seed transmission methods PWM and VPWM modulation Wake-up signal in VPWM mode IR Modulation mode VDD 7 LED 6 DATA 5 VSS HCS361 BLOCK DIAGRAM Oscillator Power latching and switching Controller RESET circuit LED LED driver Enhanced Features Over HCS300 • • • • • • • 8 HCS361 • 2.0-6.6V operation • Four button inputs - 15 functions available • Selectable baud rate • Automatic code word completion • Battery low signal transmitted to receiver • Nonvolatile synchronization data • PWM and VPWM modulation EEPROM Encoder DATA 32-bit shift register VSS Button input port VDD Typical Applications S3 S2 The HCS361 is ideal for Remote Keyless Entry (RKE) applications. These applications include: • • • • • • Automotive RKE systems Automotive alarm systems Automotive immobilizers Gate and garage door openers Identity tokens Burglar alarm systems © 2011 Microchip Technology Inc. S1 S0 DESCRIPTION The HCS361 combines a 32-bit hopping code generated by a nonlinear encryption algorithm, with a 28/32-bit serial number and 7/3 status bits to create a 67-bit transmission stream. DS40146F-page 1 HCS361 The crypt key, serial number and configuration data are stored in an EEPROM array which is not accessible via any external connection. The EEPROM data is programmable but read protected. The data can be verified only after an automatic erase and programming operation. This protects against attempts to gain access to keys or manipulate synchronization values. The HCS361 provides an easy-to-use serial interface for programming the necessary keys, system parameters and configuration data. 1.0 SYSTEM OVERVIEW Key Terms The following is a list of key terms used throughout this data sheet. For additional information on KEELOQ and Code Hopping, refer to Technical Brief 3 (TB003). • RKE - Remote Keyless Entry • Button Status - Indicates what button input(s) activated the transmission. Encompasses the 4 button status bits S3, S2, S1 and S0 (Figure 3-2). • Code Hopping - A method by which a code, viewed externally to the system, appears to change unpredictably each time it is transmitted. • Code word - A block of data that is repeatedly transmitted upon button activation (Figure 3-2). • Transmission - A data stream consisting of repeating code words (Figure 9-1). • Crypt key - A unique and secret 64-bit number used to encrypt and decrypt data. In a symmetrical block cipher such as the KEELOQ algorithm, the encryption and decryption keys are equal and will therefore be referred to generally as the crypt key. • Encoder - A device that generates and encodes data. • Encryption Algorithm - A recipe whereby data is scrambled using a crypt key. The data can only be interpreted by the respective decryption algorithm using the same crypt key. • Decoder - A device that decodes data received from an encoder. • Decryption algorithm - A recipe whereby data scrambled by an encryption algorithm can be unscrambled using the same crypt key. • Learn – Learning involves the receiver calculating the transmitter’s appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value and crypt key in EEPROM. The KEELOQ product family facilitates several learning strategies to be implemented on the decoder. The following are examples of what can be done. - Simple Learning The receiver uses a fixed crypt key, common to all components of all systems by the same manufacturer, to decrypt the received code word’s encrypted portion. - Normal Learning The receiver uses information transmitted during normal operation to derive the crypt key and decrypt the received code word’s encrypted portion. - Secure Learn The transmitter is activated through a special button combination to transmit a stored 60-bit seed value used to generate the transmitter’s crypt key. The receiver uses this seed value to derive the same crypt key and decrypt the received code word’s encrypted portion. • Manufacturer’s code – A unique and secret 64bit number used to generate unique encoder crypt keys. Each encoder is programmed with a crypt key that is a function of the manufacturer’s code. Each decoder is programmed with the manufacturer code itself. The HCS361 code hopping encoder is designed specifically for keyless entry systems; primarily vehicles and home garage door openers. The encoder portion of a keyless entry system is integrated into a transmitter, carried by the user and operated to gain access to a vehicle or restricted area. The HCS361 is meant to be a cost-effective yet secure solution to such systems, requiring very few external components (Figure 2-1). Most low-end keyless entry transmitters are given a fixed identification code that is transmitted every time a button is pushed. The number of unique identification codes in a low-end system is usually a relatively small number. These shortcomings provide an opportunity for a sophisticated thief to create a device that ‘grabs’ a transmission and retransmits it later, or a device that quickly ‘scans’ all possible identification codes until the correct one is found. The HCS361, on the other hand, employs the KEELOQ code hopping technology coupled with a transmission length of 66 bits to virtually eliminate the use of code ‘grabbing’ or code ‘scanning’. The high security level of the HCS361 is based on the patented KEELOQ technology. A block cipher based on a block length of 32 bits and a key length of 64 bits is used. The algorithm obscures the information in such a way that even if the transmission information (before coding) differs by only one bit from that of the previous transmission, the next DS40146F-page 2 © 2011 Microchip Technology Inc. HCS361 coded transmission will be completely different. Statistically, if only one bit in the 32-bit string of information changes, greater than 50 percent of the coded transmission bits will change. As indicated in the block diagram on page one, the HCS361 has a small EEPROM array which must be loaded with several parameters before use; most often programmed by the manufacturer at the time of production. The most important of these are: The crypt key generation typically inputs the transmitter serial number and 64-bit manufacturer’s code into the key generation algorithm (Figure 1-1). The manufacturer’s code is chosen by the system manufacturer and must be carefully controlled as it is a pivotal part of the overall system security. • A 28-bit serial number, typically unique for every encoder • A crypt key • An initial 16-bit synchronization value • A 16-bit configuration value FIGURE 1-1: CREATION AND STORAGE OF CRYPT KEY DURING PRODUCTION Production Programmer HCS361 Transmitter Serial Number EEPROM Array Serial Number Crypt Key Sync Counter Manufacturer’s Code Key Generation Algorithm The 16-bit synchronization counter is the basis behind the transmitted code word changing for each transmission; it increments each time a button is pressed. Due to the code hopping algorithm’s complexity, each increment of the synchronization value results in greater than 50% of the bits changing in the transmitted code word. Figure 1-2 shows how the key values in EEPROM are used in the encoder. Once the encoder detects a button press, it reads the button inputs and updates the synchronization counter. The synchronization counter and crypt key are input to the encryption algorithm and the output is 32 bits of encrypted information. This data will change with every button press, its value appearing externally to ‘randomly hop around’, hence it is referred to as the hopping portion of the code word. The 32-bit hopping code is combined with the button information and serial number to form the code word transmitted to the receiver. The code word format is explained in greater detail in Section 4.2. Crypt Key . . . A transmitter must first be ‘learned’ by the receiver before its use is allowed in the system. Learning includes calculating the transmitter’s appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value and crypt key in EEPROM. In normal operation, each received message of valid format is evaluated. The serial number is used to determine if it is from a learned transmitter. If from a learned transmitter, the message is decrypted and the synchronization counter is verified. Finally, the button status is checked to see what operation is requested. Figure 1-3 shows the relationship between some of the values stored by the receiver and the values received from the transmitter. A receiver may use any type of controller as a decoder, but it is typically a microcontroller with compatible firmware that allows the decoder to operate in conjunction with an HCS361 based transmitter. Section 7.0 provides detail on integrating the HCS361 into a system. © 2011 Microchip Technology Inc. DS40146F-page 3 HCS361 FIGURE 1-2: BUILDING THE TRANSMITTED CODE WORD (ENCODER) EEPROM Array KEELOQ® Encryption Algorithm Crypt Key Sync Counter Serial Number Button Press Information Serial Number 32 Bits Encrypted Data Transmitted Information FIGURE 1-3: BASIC OPERATION OF RECEIVER (DECODER) 1 Received Information EEPROM Array Button Press Information Serial Number 2 32 Bits of Encrypted Data Manufacturer Code Check for Match Serial Number Sync Counter Crypt Key 3 KEELOQ® Decryption Algorithm Decrypted Synchronization Counter 4 Check for Match Perform Function 5 Indicated by button press NOTE: Circled numbers indicate the order of execution. DS40146F-page 4 © 2011 Microchip Technology Inc. HCS361 2.0 DEVICE OPERATION As shown in the typical application circuits (Figure 2-1), the HCS361 is a simple device to use. It requires only the addition of buttons and RF circuitry for use as the transmitter in your security application. A description of each pin is described in Table 2-1. FIGURE 2-1: Typical circuits VDD B0 S0 VDD B1 S1 LED S2 DATA S3 VSS Tx out discrimination value and button information will be encrypted to form the hopping code. The hopping code portion will change every transmission, even if the same button is pushed again. A code word that has been transmitted will not repeat for more than 64K transmissions. This provides more than 18 years of use before a code is repeated; based on 10 operations per day. Overflow information sent from the encoder can be used to extend the number of unique transmissions to more than 192K. If in the transmit process it is detected that a new button(s) has been pressed, a RESET will immediately occur and the current code word will not be completed. Please note that buttons removed will not have any effect on the code word unless no buttons remain pressed; in which case the code word will be completed and the power-down will occur. FIGURE 2-2: Two button remote control Power-Up (A button has been pressed) VDD B4 B3 B2 B1 B0 ENCODER OPERATION RESET and Debounce Delay (10 ms) S0 VDD S1 LED S2 DATA S3 VSS Sample Inputs Update Sync Info Tx out Encrypt With Crypt Key Five button remote control (Note1) Note: TABLE 2-1: PIN DESCRIPTIONS Name Pin Number S0 1 Switch input 0 S1 2 Switch input 1 S2 3 Switch input 2 / Clock pin when in Programming mode S3 Load Transmit Register Up to 15 functions can be implemented by pressing more than one button simultaneously or by using a suitable diode array. Description 4 Switch input 3 VSS 5 Ground reference DATA 6 Data output pin /Data I/O pin for Programming mode LED 7 Cathode connection for LED VDD 8 Positive supply voltage Transmit Yes Buttons Added ? No No All Buttons Released ? Yes Complete Code Word Transmission Stop The HCS361 will wake-up upon detecting a button press and delay approximately 10 ms for button debounce (Figure 2-2). The synchronization counter, © 2011 Microchip Technology Inc. DS40146F-page 5 HCS361 3.0 EEPROM MEMORY ORGANIZATION 3.2 SYNC_A, SYNC_B (Synchronization Counter) The HCS361 contains 192 bits (12 x 16-bit words) of EEPROM memory (Table 3-1). This EEPROM array is used to store the encryption key information, synchronization value, etc. Further descriptions of the memory array is given in the following sections. This is the 16-bit synchronization value that is used to create the hopping code for transmission. This value is incremented after every transmission. Separate synchronization counters can be used to stay synchronized with different receivers. TABLE 3-1: 3.3 EEPROM MEMORY MAP WORD MNEMONIC ADDRESS 0 1 2 3 4 5 6 7 8 9 10 11 3.1 DESCRIPTION 64-bit crypt key (word 0) LSb’s KEY_1 64-bit crypt key (word 1) KEY_2 64-bit crypt key (word 2) KEY_3 64-bit crypt key (word 3) MSb’s SYNC_A 16-bit synch counter SYNC_B/ 16-bit synch counter B SEED_2 or Seed value (word 2) RESERVED Set to 0000H SEED_0 Seed Value (word 0) LSb’s SEED_1 Seed Value (word 1) MSb’s SER_0 Device Serial Number (word 0) LSb’s SER_1 Device Serial Number (word 1) MSb’s CONFIG Configuration Word KEY_0 SEED_0, SEED_1, and SEED_2 (Seed Word) The three word (48 bits) seed code will be transmitted when seed transmission is selected. This allows the system designer to implement the Secure Learn feature or use this fixed code word as part of a different key generation/tracking process or purely as a fixed code transmission. Note: 3.4 Since SEED2 and SYNC_B share the same memory location, Secure Learn and Independent mode transmission (including IR mode) are mutually exclusive. SER_0, SER_1 (Encoder Serial Number) SER_0 and SER_1 are the lower and upper words of the device serial number, respectively. There are 32 bits allocated for the Serial Number and a selectable configuration bit determines whether 32 or 28 bits will be transmitted. The serial number is meant to be unique for every transmitter. KEY_0 - KEY_3 (64-Bit Crypt Key) The 64-bit crypt key is used to create the encrypted message transmitted to the receiver. This key is calculated and programmed during production using a key generation algorithm. The key generation algorithm may be different from the KEELOQ algorithm. Inputs to the key generation algorithm are typically the transmitter’s serial number and the 64-bit manufacturer’s code. While the key generation algorithm supplied from Microchip is the typical method used, a user may elect to create their own method of key generation. This may be done providing that the decoder is programmed with the same means of creating the key for decryption purposes. DS40146F-page 6 © 2011 Microchip Technology Inc. HCS361 3.5 CONFIG (Configuration Word) The Configuration Word is a 16-bit word stored in EEPROM array that is used by the device to store information used during the encryption process, as well as the status of option configurations. Further explanations of each of the bits are described in the following sections. TABLE 3-1: CONFIGURATION WORD Bit Number Symbol 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 3.5.1 Bit Description BACW Blank Alternate Code Word BSEL Baud Rate Selection TXWAK PWM mode: 1/6, 2/6 or 1/3, 2/3 select VPWM mode: Wake-up enable SPM Sync Pulse Modulation SEED Seed Transmission enable DELM Delay mode enable TIMO Time-out enable IND Independent mode enable USRA0 User bit USRA1 User bit USRB0 User bit USRB1 User bit XSER Extended serial number enable TMPSD Temporary seed transmission enable MOD Modulation format select OVR Overflow bit MOD: MODULATION FORMAT MOD selects between VPWM modulation and PWM modulation format. If MOD = 1, VPWM modulation is selected as well as the following: 1. 2. Enables the TXWAK bit to select the WAKE-UP transmission. Extends the Guard Time. If MOD = 0, PWM modulation is selected. 3.5.2 BSEL: BAUD RATE SELECT BSEL selects the baud rate. If BSEL = 1, the baud rate is nominally 1667 bits per second and with BSEL = 0, 833 bits per second. 3.5.3 TXWAK: BIT FORMAT SELECT OR WAKE-UP In VPWM mode, this bit enables the wake-up signal. If TXWAK = 0, transmissions start normally with the preamble portion of the code word. If TXWAK = 1, transmissions start with a Wake-up sequence followed by a dead time (see Figure 4-2). Note: The Wake-up sequence is transmitted before the first code word of each transmission only. The following tables summarize the combined effect of TXWAK, BSEL and MOD option bits. TABLE 3-1: MOD TXWAK 0 0 0 0 0 0 1 1 TABLE 3-2: MOD TXWAK 1 1 1 1 3.5.4 0 0 1 1 PWM OPTIONS BSEL TE Duty Cycle 0 1 0 1 400us 200us 200us 100us 1/3-2/3 1/3-2/3 1/6-2/6 1/6-2/6 VPWM OPTIONS BSEL TE Wake-up 0 1 0 1 400us 200us 400us 200us NO NO YES YES SPM: SYNC PULSE MODULATION Select Modulation mode of Sync Pulse. If SPM = 1, the sync pulse is modulated (Figure 4-1 and Figure 4-2). 3.5.5 OVR: OVERFLOW The overflow bit is used to extend the number of possible synchronization values. The synchronization counter is 16 bits in length, yielding 65,536 values before the cycle repeats. Under typical use of 10 operations a day, this will provide nearly 18 years of use before a repeated value will be used. Should the system designer conclude that is not adequate, then the overflow bit can be utilized to extend the number of unique values. This can be done by programming OVR to 1 at the time of production. The encoder will automatically clear OVR the first time that the transmitted synchronization value wraps from 0xFFFF to 0x0000. Once cleared, OVR cannot be set again, thereby creating a permanent record of the counter overflow. This prevents fast cycling of 64K counter. If the decoder system is programmed to track the overflow bits, then the effective number of unique synchronization values can be extended to 128K. If programmed to zero, the system will be compatible with old encoder devices. In PWM mode, this bit selects the bit format. If TXWAK = 0, the PWM pulse duty cycle is 1/3-2/3. If TXWAK = 1, the PWM pulse duty cycle is 1/6-2/6. © 2011 Microchip Technology Inc. DS40146F-page 7 HCS361 3.5.6 BACW: BLANK ALTERNATE CODE WORD BACW = 1 selects the encoder to transmit every second code word. This can be used to reduce the average power transmitted over a 100 ms window and thereby transmit a higher peak power (see Section 5.2). 3.5.7 XSER: EXTENDED SERIAL NUMBER If XSER = 0, the four Most Significant bits of the Serial Number are substituted by S[3:0] and the code word format is compatible with the HCS200/300/301. If XSER = 1, the full 32-bit Serial Number [SER_1, SER_0] is transmitted. Note: Since the button status S[3:0] is used to detect a Seed transmission, Extended Serial Number and Secure Learn are mutually exclusive. FIGURE 3-2: 3.5.8 DISCRIMINATION VALUE While in other KEELOQ encoders its value is user selectable, the HCS361 uses directly the 8 Least Significant bits of the Serial Number as part of the information that form the encrypted portion of the transmission (Figure 3-2). The discrimination value aids the post-decryption check on the decoder end. After the receiver has decrypted a transmission, the discrimination bits are checked against the encoder Serial Number to verify that the decryption process was valid. 3.5.9 USRA,B: USER BITS User bits form part of the discrimination value. The user bits together with the IND bit can be used to identify the counter that is used in Independent mode. CODE WORD ORGANIZATION XSER=0 Fixed Code Portion of Transmission CRC (2-bit) Button Status (4 bits) VLOW (1-bit) 28-bit Serial Number Encrypted Portion of Transmission Discrimination bits (12 bits) Button Status (4 bits) 16-bit Sync Value MSB LSB 67 bits of Data Transmitted XSER=1 Fixed Code Portion of Transmission CRC (2-bit) VLOW (1-bit) 32-bit Extended Serial Number Encrypted Portion of Transmission Discrimination bits (12 bits) Button Status (4 bits) 16-bit Sync Value MSB LSB Button Status (4 bits) S S S 2 1 0 DS40146F-page 8 S 3 Discrimination Bits I N D O V R U S R 1 (12 bits) U S S E R R 0 7 S E R 6 ... ... ... ... S E R 0 © 2011 Microchip Technology Inc. HCS361 3.5.10 SEED: ENABLE SEED TRANSMISSION If SEED = 0, seed transmission is disabled. The Independent Counter mode can only be used with seed transmission disabled since SEED_2 is shared with the second synchronization counter. With SEED = 1, seed transmission is enabled. The appropriate button code(s) must be activated to transmit the seed information. In this mode, the seed infor- FIGURE 3-3: mation (SEED_0, SEED_1, and SEED_2) and the upper 12 or 16 bits of the serial number (SER_1)are transmitted instead of the hop code. Seed transmission is available for function codes (Table 3-2) S[3:0] = 1001 and S[3:0] = 0011 (delayed). This takes place regardless of the setting of the IND bit. The two seed transmissions are shown in Figure 3-3. Seed Transmission All examples shown with XSER = 1, SEED = 1 When S[3:0] = 1001, delay is not applicable. CRC+VLOW SER_1 SEED_2 SEED_1 SEED_0 Data transmission direction For S[3:0] = 0x3 before delay: 16-bit Data Word 16-bit Counter Encrypt CRC+VLOW SER_1 SER_0 Encrypted Data Data transmission direction For S[3:0] = 0011 after delay (Note 1, Note 2): CRC+VLOW SER_1 SEED_2 SEED_1 SEED_0 Data transmission direction Note 1: For Seed Transmission, SEED_2 is transmitted instead of SER_0. 2: For Seed Transmission, the setting of DELM has no effect. 3.5.11 TMPSD: TEMPORARY SEED TRANSMISSION The temporary seed transmission can be used to disable learning after the transmitter has been used for a programmable number of operations. This feature can be used to implement very secure systems. After learning is disabled, the seed information cannot be accessed even if physical access to the transmitter is possible. If TMPSD = 1 the seed transmission will be disabled after a number of code hopping transmissions. The number of transmissions before seed transmission is disabled, can be programmed by setting the synchronization counter (SYNC_A or SYNC_B) to a value as shown in Table 3-4. © 2011 Microchip Technology Inc. TABLE 3-4: SYNCHRONOUS COUNTER INITIALIZATION VALUES Synchronous Counter Values Number of Transmissions 0000H 128 0060H 64 0050H 32 0048H 16 DS40146F-page 9 HCS361 3.5.12 DELM: DELAY MODE If DELM = 0, delay transmission is disabled (Table 31). If DELM = 1, delay transmission is enabled. A delayed transmission is indicated by inverting the lower nibble of the discrimination value. The Delay mode is primarily for compatibility with previous KEELOQ devices. TABLE 3-1: TYPICAL DELAY TIMES TXWAK BSEL Number of Code Words before Delay Mode Time Before Delay Mode (MOD = 0) 0 0 28 ≈ 2.8s 0 1 56 ≈ 2.9s 1 0 28 ≈ 2.6s 1 1 56 ≈ 2.8s 3.5.13 TIMO: TIME-OUT OR AUTO-SHUTOFF the LED is turned off. Current consumption will be higher than in Standby mode since current will flow through the activated input resistors. This state can be exited only after all inputs are taken low. TIMO = 0, will enable continuous transmission (Table 3-5). If TIMO = 1, the time-out is enabled. Time-out can be used to terminate accidental continuous transmissions. When time-out occurs, the PWM output is set low and TABLE 3-5: TYPICAL TIME-OUT TIMES TXWAK BSEL Maximum Number of Code Words Transmitted Time Before Time-out (MOD = 0) 0 0 256 ≈ 25.6s 0 1 512 ≈ 27.2s 1 0 256 ≈ 23.8s 1 1 512 ≈ 25.4s DS40146F-page 10 © 2011 Microchip Technology Inc. HCS361 3.5.14 IND: INDEPENDENT MODE TABLE 3-1: The Independent mode can be used where one encoder is used to control two receivers. Two counters (SYNC_A and SYNC_B) are used in Independent mode. As indicated in Table 3-2, function codes 1 to 7 use SYNC_A and 8 to 15 SYNC_B. 3.5.15 IR MODULATION TE Basic Pulse 400us (400μs) (16x) Period = 25μs INFRARED MODE 200us The Independent mode also selects IR mode. In IR mode function codes 12 to 15 will use counter B. The PWM output signal is modulated with a 40 kHz carrier (see Table 3-1). It must be pointed out that the 40 kHz is derived from the internal clock and will therefore vary with the same percentage as the baud rate. If IND = 0, SYNC_A is used for all function codes. If IND = 1, Independent mode is enabled and counters for functions are used according to Table 3-2. TABLE 3-2: 100us (200μs) (8x) (100μs) (4x) FUNCTION CODES S3 S2 S1 S0 IND = 0 IND = 1 Comments Counter 1 0 0 0 1 A A 2 0 0 1 0 A A 3 0 0 1 1 A A 4 0 1 0 0 A A 5 0 1 0 1 A A 6 0 1 1 0 A A 7 0 1 1 1 A A 8 1 0 0 0 A B 9 1 0 0 1 A B 10 1 0 1 0 A B 11 1 0 1 1 A B 12 1 1 0 0 A B(1) 13 1 1 0 1 A B(1) 14 1 1 1 0 A B(1) 15 1 1 1 1 A B(1) If SEED = 1, transmit seed after delay.(1) If SEED = 1, transmit seed immediately.(1) Note 1: IR mode © 2011 Microchip Technology Inc. DS40146F-page 11 HCS361 4.0 TRANSMITTED WORD 4.2 4.1 Transmission Format (PWM) The HCS361 transmits a 67-bit code word when a button is pressed. The 67-bit word is constructed from a Fixed Code portion and an Encrypted Code portion (Figure 3-2). The HCS361 transmission is made up of several parts (Figure 4-1 and Figure 4-2). Each transmission is begun with a preamble and a header, followed by the encrypted and then the fixed data. The actual data is 67 bits which consists of 32 bits of encrypted data and 35 bits of fixed data. Each transmission is followed by a guard period before another transmission can begin. Refer to Table 9-6 and Table 9-6 for transmission timing specifications. The encrypted portion provides up to four billion changing code combinations and includes the function bits (based on which buttons were activated) along with the synchronization counter value and discrimination value. The non-encrypted portion is comprised of the CRC bits, VLOW bits, the function bits and the 28/32-bit serial number. The encrypted and non-encrypted sections combined increase the number of combinations to 1.47 x 1020. FIGURE 4-1: Code Word Organization The Encrypted Data is generated from 4 function bits, 2 user bits, overflow bit, Independent mode bit, and 8 serial number bits, and the 16-bit synchronization value (Figure 9-4). The Non-encrypted Code Data is made up of VLOW bit, 2 CRC bits, 4 function bits, and the 28-bit serial number. If the extended serial number (32 bits) is selected, the 4 function code bits will not be transmitted. PWM Transmission Format (MOD = 0) TRANSMISSION SEQUENCE: 1st CODE WORD Preamble Header Encrypt Fixed Guard Preamble Header Encrypt LOGIC 0 CODE WORD: TE LOGIC 1 Duty Cycle: 1/3-2/3 (TXWAK=0) TBP=3XTE TBP LOGIC 0 TE LOGIC 1 Duty Cycle: 1/6-2/6 (TXWAK=1) TBP=6XTE TXWAK=0 1 TBP TBP 10 6 SPM=1 TXWAK=1 SPM=0 33% Duty Cycle 18xTE Preamble DS40146F-page 12 Encrypted Portion 10xTE Sync 10xTE Header Pulse Code Word Fixed Code Portion Guard Time © 2011 Microchip Technology Inc. HCS361 FIGURE 4-2: VPWM TRANSMISSION FORMAT (MOD = 1) VPWM TRANSMISSION SEQUENCE: 1st CODE WORD WAKE-UP (TXWAK=1) Dead Time Preamble Header Encrypt Fixed Guard Preamble Header Encrypt TE WAKE-UP: TBP TBP 1 84 33% Duty Cycle Wake-Up sequence 250xTE LOGIC 0 TE VPWM BIT ENCODING: Dead Time 258xTE LOGIC 1 on Transition Low to High TBP 2XTE on Transition High to Low TE LOGIC 0 TBP TBP TE LOGIC 1 TBP 2XTE CODE WORD: TBP 10 6 1 SPM=1 SPM=0 18xTE Preamble 10xTE Sync 10xTE Header Pulse Encrypted Portion Fixed Code Portion Guard Time Code Word © 2011 Microchip Technology Inc. DS40146F-page 13 HCS361 5.0 SPECIAL FEATURES 5.1 Code Word Completion 5.3 Code word completion is an automatic feature that ensures that the entire code word is transmitted, even if the button is released before the transmission is complete and that a minimum of two words are completed. The HCS361 encoder powers itself up when a button is pushed and powers itself down after the current transmission is finished, if the user has already released the button. If the button is held down beyond the time for two transmissions, then multiple transmissions will result. The HCS361 transmits at least two transmissions before powering down. If another button is activated during a transmission, the active transmission will be aborted and the new code will be generated using the new button information. 5.2 Blank Alternate Code Word Federal Communications Commission (FCC) part 15 rules specify the limits on fundamental power and harmonics that can be transmitted. Power is calculated on the worst case average power transmitted in a 100 ms window. It is therefore advantageous to minimize the duty cycle of the transmitted word. This can be achieved by minimizing the duty cycle of the individual bits and by blanking out consecutive words. Blank Alternate Code Word (BACW) is used for reducing the average power of a transmission (Figure 5-1). This is a selectable feature. Using the BACW allows the user to transmit a higher amplitude transmission if the transmission length is shorter. The FCC puts constraints on the average power that can be transmitted by a device, and BACW effectively prevents continuous transmission by only allowing the transmission of every second word. This reduces the average power transmitted and hence, assists in FCC approval of a transmitter device. FIGURE 5-1: CRC (Cycle Redundancy Check) Bits The CRC bits are calculated on the 65 previously transmitted bits. The CRC bits can be used by the receiver to check the data integrity before processing starts. The CRC can detect all single bit and 66% of double bit errors. The CRC is computed as follows: EQUATION 5-1: CRC Calculation CRC [ 1 ] n + 1 = CRC [ 0 ] n ∧ Di n and CRC [ 0 ]n + 1 = ( CRC [ 0 ] n ∧ Di n ) ∧ CRC [ 1 ]n with CRC [ 1, 0 ] 0 = 0 and Din the nth transmission bit 0 ð n ð 64 Note: The CRC may be wrong when the battery voltage is around either of the VLOW trip points. This may happen because VLOW is sampled twice each transmission, once for the CRC calculation (PWM is low) and once when VLOW is transmitted (PWM is high). VDD tends to move slightly during a transmission which could lead to a different value for VLOW being used for the CRC calculation and the transmission . Work around: If the CRC calculation is incorrect, recalculate for the opposite value of VLOW. BLANK ALTERNATE CODE WORD (BACW) Amplitude BRS = 0 BRS = 1 A Code Word Code Word Code Word Code Word 2A Time DS40146F-page 14 © 2011 Microchip Technology Inc. HCS361 5.4 Auto-shutoff The Auto-shutoff function automatically stops the device from transmitting if a button inadvertently gets pressed for a long period of time. This will prevent the device from draining the battery if a button gets pressed while the transmitter is in a pocket or purse. This function can be enabled or disabled and is selected by setting or clearing the time-out bit (Section 3.5.13). Setting this bit will enable the function (turn Auto-shutoff function on) and clearing the bit will disable the function. Time-out period is approximately 25 seconds. 5.5 VLOW: Voltage LOW Indicator FIGURE 5-2: VLOW Trip Point VS. Temperature 4.5 VLOW=0 Nominal Trip Point 3.8V 4 3.5 3.5 VLOW=1 3 2.5 2 VLOW=0 2V Nominal Trip Point 1.5 The VLOW bit is transmitted with every transmission (Figure 3-2) and will be transmitted as a one if the operating voltage has dropped below the low voltage trip point, typically 3.8V at 25°C. This VLOW signal is transmitted so the receiver can give an indication to the user that the transmitter battery is low. If the supply voltage drops below the low voltage trip point, the LED output will be toggled at approximately 1Hz during the transmission. 5.6 TABLE 5-1: LED Output Operation During normal transmission the LED output is LOW while the data is being transmitted and high during the guard time. Two voltage indications are combined into one bit: VLOW. Table 5-1 indicates the operation value of VLOW while data is being transmitted. -40 25 85 VLOW AND LED VS. VDD Approximate Supply Voltage Vlow Bit LED Operation* Max →3.8V 0 Normal 3.8V →2.2V 1 Flashing 2.2V →Min 0 Normal *See also FLASH operating modes. © 2011 Microchip Technology Inc. DS40146F-page 15 HCS361 6.0 PROGRAMMING THE HCS361 by clocking in 16 bits at a time, followed by the word’s complement using S3 or S2 as the clock line and PWM as the data in line. After each 16-bit word is loaded, a programming delay is required for the internal program cycle to complete. An Acknowledge bit can be read back after the programming delay (TWC). After the first word and its complement have been downloaded, an automatic bulk write is performed. This delay can take up to Twc. At the end of the programming cycle, the device can be verified (Figure 6-1) by reading back the EEPROM. Reading is done by clocking the S3 line and reading the data bits on PWM. For security reasons, it is not possible to execute a Verify function without first programming the EEPROM. A Verify operation can only be done once, immediately following the Program cycle. When using the HCS361 in a system, the user will have to program some parameters into the device including the serial number and the secret key before it can be used. The programming cycle allows the user to input all 192 bits in a serial data stream, which are then stored internally in EEPROM. Programming will be initiated by forcing the PWM line high, after the S3 line has been held high for the appropriate length of time. S0 should be held low during the entire program cycle. The S1 line on the HCS361 part needs to be set or cleared depending on the LS bit of the memory map (Key 0) before the key is clocked in to the HCS361. S1 must remain at this level for the duration of the programming cycle. The device can then be programmed FIGURE 6-1: Programming Waveforms Enter Program Mode DATA (Data) Bit 0 T2 Acknowledge Pulse TWC Bit 1 Bit 2 TCLKL Bit 3 Bit 14 Bit 15 TDH TCLKH Bit 0 Bit 1 Bit 2 Bit 3 Bit 14 Bit 15 Bit 16 Bit 17 S2/S3 (Clock) T1 TDS Bit 0 of Word0 S1 Data for Word 1 Data for Word 0 (KEY_0) Repeat for each word Note 1: Unused button inputs to be held to ground during the entire programming sequence. The VDD pin must be taken to ground after a program/verify cycle. 2: The VDD pin must be taken to ground after a Program/Verify cycle. FIGURE 6-2: Verify Waveforms End of Programming Cycle Beginning of Verify Cycle Data from Word0 DATA (Data) Bit190 Bit191 Ack TWC Bit 0 Bit 1 Bit 2 Bit 3 Bit 14 Bit 15 Bit 16 Bit 17 Bit190 Bit191 TDV S2/S3 (Clock) S1 Note: A Verify sequence is performed only once immediately after the Program cycle. DS40146F-page 16 © 2011 Microchip Technology Inc. HCS361 TABLE 6-3: PROGRAMMING/VERIFY TIMING REQUIREMENTS VDD = 5.0V ± 10% 25° C ± 5 ° C Parameter Program mode setup time Hold time 1 Symbol Min. Max. Units T2 0 4.0 ms T1 9.0 — ms TWC TCLKL TCLKH TDS 50 50 50 0 — — — — ms μs μs μs(1) Data hold time TDH 30 — μs(1) Data out valid time TDV — 30 μs(1) Program cycle time Clock low time Clock high time Data setup time Note 1: Typical values - not tested in production. © 2011 Microchip Technology Inc. DS40146F-page 17 HCS361 7.0 INTEGRATING THE HCS361 INTO A SYSTEM Use of the HCS361 in a system requires a compatible decoder. This decoder is typically a microcontroller with compatible firmware. Microchip will provide (via a license agreement) firmware routines that accept transmissions from the HCS361 and decrypt the hopping code portion of the data stream. These routines provide system designers the means to develop their own decoding system. 7.1 Learning a Transmitter to a Receiver A transmitter must first be 'learned' by a decoder before its use is allowed in the system. Several learning strategies are possible, Figure 7-1 details a typical learn sequence. Core to each, the decoder must minimally store each learned transmitter's serial number and current synchronization counter value in EEPROM. Additionally, the decoder typically stores each transmitter's unique crypt key. The maximum number of learned transmitters will therefore be relative to the available EEPROM. A transmitter's serial number is transmitted in the clear but the synchronization counter only exists in the code word's encrypted portion. The decoder obtains the counter value by decrypting using the same key used to encrypt the information. The KEELOQ algorithm is a symmetrical block cipher so the encryption and decryption keys are identical and referred to generally as the crypt key. The encoder receives its crypt key during manufacturing. The decoder is programmed with the ability to generate a crypt key as well as all but one required input to the key generation routine; typically the transmitter's serial number. Figure 7-1 summarizes a typical learn sequence. The decoder receives and authenticates a first transmission; first button press. Authentication involves generating the appropriate crypt key, decrypting, validating the correct key usage via the discrimination bits and buffering the counter value. A second transmission is received and authenticated. A final check verifies the counter values were sequential; consecutive button presses. If the learn sequence is successfully complete, the decoder stores the learned transmitter's serial number, current synchronization counter value and appropriate crypt key. From now on the crypt key will be retrieved from EEPROM during normal operation instead of recalculating it for each transmission received. FIGURE 7-1: TYPICAL LEARN SEQUENCE Enter Learn Mode Wait for Reception of a Valid Code Generate Key from Serial Number Use Generated Key to Decrypt Compare Discrimination Value with Fixed Value Equal ? No Yes Wait for Reception of Second Valid Code Use Generated Key to Decrypt Compare Discrimination Value with Fixed Value Equal ? No Yes Counters Sequential ? Yes No Learn successful Store: Learn Unsuccessful Serial number Encryption key Synchronization counter Exit Certain learning strategies have been patented and care must be taken not to infringe. DS40146F-page 18 © 2011 Microchip Technology Inc. HCS361 7.2 Decoder Operation 7.3 Figure 7-2 summarizes normal decoder operation. The decoder waits until a transmission is received. The received serial number is compared to the EEPROM table of learned transmitters to first determine if this transmitter's use is allowed in the system. If from a learned transmitter, the transmission is decrypted using the stored crypt key and authenticated via the discrimination bits for appropriate crypt key usage. If the decryption was valid the synchronization value is evaluated. FIGURE 7-2: TYPICAL DECODER OPERATION Start No Transmission Received ? Yes No Is Decryption Valid ? Yes No Is Counter Within 16 ? Yes No No Is Counter Within 32K ? Yes Save Counter in Temp Location © 2011 Microchip Technology Inc. The KEELOQ technology patent scope includes a sophisticated synchronization technique that does not require the calculation and storage of future codes. The technique securely blocks invalid transmissions while providing transparent resynchronization to transmitters inadvertently activated away from the receiver. Figure 7-3 shows a 3-partition, rotating synchronization window. The size of each window is optional but the technique is fundamental. Each time a transmission is authenticated, the intended function is executed and the transmission's synchronization counter value is stored in EEPROM. From the currently stored counter value there is an initial "Single Operation" forward window of 16 codes. If the difference between a received synchronization counter and the last stored counter is within 16, the intended function will be executed on the single button press and the new synchronization counter will be stored. Storing the new synchronization counter value effectively rotates the entire synchronization window. A "Double Operation" (resynchronization) window further exists from the Single Operation window up to 32K codes forward of the currently stored counter value. It is referred to as "Double Operation" because a transmission with synchronization counter value in this window will require an additional, sequential counter transmission prior to executing the intended function. Upon receiving the sequential transmission the decoder executes the intended function and stores the synchronization counter value. This resynchronization occurs transparently to the user as it is human nature to press the button a second time if the first was unsuccessful. Does Serial Number Match ? Yes Decrypt Transmission No Synchronization with Decoder (Evaluating the Counter) Execute Command and Update Counter The third window is a "Blocked Window" ranging from the double operation window to the currently stored synchronization counter value. Any transmission with synchronization counter value within this window will be ignored. This window excludes previously used, perhaps code-grabbed transmissions from accessing the system. Note: The synchronization method described in this section is only a typical implementation and because it is usually implemented in firmware, it can be altered to fit the needs of a particular system. DS40146F-page 19 HCS361 FIGURE 7-3: SYNCHRONIZATION WINDOW Entire Window rotates to eliminate use of previously used codes Blocked Window (32K Codes) Double Operation (resynchronization) Window (32K Codes) DS40146F-page 20 Stored Synchronization Counter Value Single Operation Window (16 Codes) © 2011 Microchip Technology Inc. HCS361 8.0 DEVELOPMENT SUPPORT The PIC® microcontrollers and dsPIC® digital signal controllers are supported with a full range of software and hardware development tools: • Integrated Development Environment - MPLAB® IDE Software • Compilers/Assemblers/Linkers - MPLAB C Compiler for Various Device Families - HI-TECH C for Various Device Families - MPASMTM Assembler - MPLINKTM Object Linker/ MPLIBTM Object Librarian - MPLAB Assembler/Linker/Librarian for Various Device Families • Simulators - MPLAB SIM Software Simulator • Emulators - MPLAB REAL ICE™ In-Circuit Emulator • In-Circuit Debuggers - MPLAB ICD 3 - PICkit™ 3 Debug Express • Device Programmers - PICkit™ 2 Programmer - MPLAB PM3 Device Programmer • Low-Cost Demonstration/Development Boards, Evaluation Kits, and Starter Kits 8.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16/32-bit microcontroller market. The MPLAB IDE is a Windows® operating system-based application that contains: • A single graphical interface to all debugging tools - Simulator - Programmer (sold separately) - In-Circuit Emulator (sold separately) - In-Circuit Debugger (sold separately) • A full-featured editor with color-coded context • A multiple project manager • Customizable data windows with direct edit of contents • High-level source code debugging • Mouse over variable inspection • Drag and drop variables from source to watch windows • Extensive on-line help • Integration of select third party tools, such as IAR C Compilers The MPLAB IDE allows you to: • Edit your source files (either C or assembly) • One-touch compile or assemble, and download to emulator and simulator tools (automatically updates all project information) • Debug using: - Source files (C or assembly) - Mixed C and assembly - Machine code MPLAB IDE supports multiple debugging tools in a single development paradigm, from the cost-effective simulators, through low-cost in-circuit debuggers, to full-featured emulators. This eliminates the learning curve when upgrading to tools with increased flexibility and power. © 2011 Microchip Technology Inc. DS40146F-page 21 HCS361 8.2 MPLAB C Compilers for Various Device Families The MPLAB C Compiler code development systems are complete ANSI C compilers for Microchip’s PIC18, PIC24 and PIC32 families of microcontrollers and the dsPIC30 and dsPIC33 families of digital signal controllers. These compilers provide powerful integration capabilities, superior code optimization and ease of use. For easy source level debugging, the compilers provide symbol information that is optimized to the MPLAB IDE debugger. 8.3 HI-TECH C for Various Device Families The HI-TECH C Compiler code development systems are complete ANSI C compilers for Microchip’s PIC family of microcontrollers and the dsPIC family of digital signal controllers. These compilers provide powerful integration capabilities, omniscient code generation and ease of use. For easy source level debugging, the compilers provide symbol information that is optimized to the MPLAB IDE debugger. The compilers include a macro assembler, linker, preprocessor, and one-step driver, and can run on multiple platforms. 8.4 MPASM Assembler The MPASM Assembler is a full-featured, universal macro assembler for PIC10/12/16/18 MCUs. The MPASM Assembler generates relocatable object files for the MPLINK Object Linker, Intel® standard HEX files, MAP files to detail memory usage and symbol reference, absolute LST files that contain source lines and generated machine code and COFF files for debugging. The MPASM Assembler features include: 8.5 MPLINK Object Linker/ MPLIB Object Librarian The MPLINK Object Linker combines relocatable objects created by the MPASM Assembler and the MPLAB C18 C Compiler. It can link relocatable objects from precompiled libraries, using directives from a linker script. The MPLIB Object Librarian manages the creation and modification of library files of precompiled code. When a routine from a library is called from a source file, only the modules that contain that routine will be linked in with the application. This allows large libraries to be used efficiently in many different applications. The object linker/library features include: • Efficient linking of single libraries instead of many smaller files • Enhanced code maintainability by grouping related modules together • Flexible creation of libraries with easy module listing, replacement, deletion and extraction 8.6 MPLAB Assembler, Linker and Librarian for Various Device Families MPLAB Assembler produces relocatable machine code from symbolic assembly language for PIC24, PIC32 and dsPIC devices. MPLAB C Compiler uses the assembler to produce its object file. The assembler generates relocatable object files that can then be archived or linked with other relocatable object files and archives to create an executable file. Notable features of the assembler include: • • • • • • Support for the entire device instruction set Support for fixed-point and floating-point data Command line interface Rich directive set Flexible macro language MPLAB IDE compatibility • Integration into MPLAB IDE projects • User-defined macros to streamline assembly code • Conditional assembly for multi-purpose source files • Directives that allow complete control over the assembly process DS40146F-page 22 © 2011 Microchip Technology Inc. HCS361 8.7 MPLAB SIM Software Simulator The MPLAB SIM Software Simulator allows code development in a PC-hosted environment by simulating the PIC® MCUs and dsPIC® DSCs on an instruction level. On any given instruction, the data areas can be examined or modified and stimuli can be applied from a comprehensive stimulus controller. Registers can be logged to files for further run-time analysis. The trace buffer and logic analyzer display extend the power of the simulator to record and track program execution, actions on I/O, most peripherals and internal registers. The MPLAB SIM Software Simulator fully supports symbolic debugging using the MPLAB C Compilers, and the MPASM and MPLAB Assemblers. The software simulator offers the flexibility to develop and debug code outside of the hardware laboratory environment, making it an excellent, economical software development tool. 8.8 MPLAB REAL ICE In-Circuit Emulator System MPLAB REAL ICE In-Circuit Emulator System is Microchip’s next generation high-speed emulator for Microchip Flash DSC and MCU devices. It debugs and programs PIC® Flash MCUs and dsPIC® Flash DSCs with the easy-to-use, powerful graphical user interface of the MPLAB Integrated Development Environment (IDE), included with each kit. The emulator is connected to the design engineer’s PC using a high-speed USB 2.0 interface and is connected to the target with either a connector compatible with incircuit debugger systems (RJ11) or with the new highspeed, noise tolerant, Low-Voltage Differential Signal (LVDS) interconnection (CAT5). The emulator is field upgradable through future firmware downloads in MPLAB IDE. In upcoming releases of MPLAB IDE, new devices will be supported, and new features will be added. MPLAB REAL ICE offers significant advantages over competitive emulators including low-cost, full-speed emulation, run-time variable watches, trace analysis, complex breakpoints, a ruggedized probe interface and long (up to three meters) interconnection cables. © 2011 Microchip Technology Inc. 8.9 MPLAB ICD 3 In-Circuit Debugger System MPLAB ICD 3 In-Circuit Debugger System is Microchip's most cost effective high-speed hardware debugger/programmer for Microchip Flash Digital Signal Controller (DSC) and microcontroller (MCU) devices. It debugs and programs PIC® Flash microcontrollers and dsPIC® DSCs with the powerful, yet easyto-use graphical user interface of MPLAB Integrated Development Environment (IDE). The MPLAB ICD 3 In-Circuit Debugger probe is connected to the design engineer's PC using a high-speed USB 2.0 interface and is connected to the target with a connector compatible with the MPLAB ICD 2 or MPLAB REAL ICE systems (RJ-11). MPLAB ICD 3 supports all MPLAB ICD 2 headers. 8.10 PICkit 3 In-Circuit Debugger/ Programmer and PICkit 3 Debug Express The MPLAB PICkit 3 allows debugging and programming of PIC® and dsPIC® Flash microcontrollers at a most affordable price point using the powerful graphical user interface of the MPLAB Integrated Development Environment (IDE). The MPLAB PICkit 3 is connected to the design engineer's PC using a full speed USB interface and can be connected to the target via an Microchip debug (RJ-11) connector (compatible with MPLAB ICD 3 and MPLAB REAL ICE). The connector uses two device I/O pins and the reset line to implement in-circuit debugging and In-Circuit Serial Programming™. The PICkit 3 Debug Express include the PICkit 3, demo board and microcontroller, hookup cables and CDROM with user’s guide, lessons, tutorial, compiler and MPLAB IDE software. DS40146F-page 23 HCS361 8.11 PICkit 2 Development Programmer/Debugger and PICkit 2 Debug Express The PICkit™ 2 Development Programmer/Debugger is a low-cost development tool with an easy to use interface for programming and debugging Microchip’s Flash families of microcontrollers. The full featured Windows® programming interface supports baseline (PIC10F, PIC12F5xx, PIC16F5xx), midrange (PIC12F6xx, PIC16F), PIC18F, PIC24, dsPIC30, dsPIC33, and PIC32 families of 8-bit, 16-bit, and 32-bit microcontrollers, and many Microchip Serial EEPROM products. With Microchip’s powerful MPLAB Integrated Development Environment (IDE) the PICkit™ 2 enables in-circuit debugging on most PIC® microcontrollers. In-Circuit-Debugging runs, halts and single steps the program while the PIC microcontroller is embedded in the application. When halted at a breakpoint, the file registers can be examined and modified. The PICkit 2 Debug Express include the PICkit 2, demo board and microcontroller, hookup cables and CDROM with user’s guide, lessons, tutorial, compiler and MPLAB IDE software. 8.12 MPLAB PM3 Device Programmer The MPLAB PM3 Device Programmer is a universal, CE compliant device programmer with programmable voltage verification at VDDMIN and VDDMAX for maximum reliability. It features a large LCD display (128 x 64) for menus and error messages and a modular, detachable socket assembly to support various package types. The ICSP™ cable assembly is included as a standard item. In Stand-Alone mode, the MPLAB PM3 Device Programmer can read, verify and program PIC devices without a PC connection. It can also set code protection in this mode. The MPLAB PM3 connects to the host PC via an RS-232 or USB cable. The MPLAB PM3 has high-speed communications and optimized algorithms for quick programming of large memory devices and incorporates an MMC card for file storage and data applications. DS40146F-page 24 8.13 Demonstration/Development Boards, Evaluation Kits, and Starter Kits A wide variety of demonstration, development and evaluation boards for various PIC MCUs and dsPIC DSCs allows quick application development on fully functional systems. Most boards include prototyping areas for adding custom circuitry and provide application firmware and source code for examination and modification. The boards support a variety of features, including LEDs, temperature sensors, switches, speakers, RS-232 interfaces, LCD displays, potentiometers and additional EEPROM memory. The demonstration and development boards can be used in teaching environments, for prototyping custom circuits and for learning about various microcontroller applications. In addition to the PICDEM™ and dsPICDEM™ demonstration/development board series of circuits, Microchip has a line of evaluation kits and demonstration software for analog filter design, KEELOQ® security ICs, CAN, IrDA®, PowerSmart battery management, SEEVAL® evaluation system, Sigma-Delta ADC, flow rate sensing, plus many more. Also available are starter kits that contain everything needed to experience the specified device. This usually includes a single application and debug capability, all on one board. Check the Microchip web page (www.microchip.com) for the complete list of demonstration, development and evaluation kits. © 2011 Microchip Technology Inc. HCS361 9.0 ELECTRICAL CHARACTERISTICS TABLE 9-1: Note: ABSOLUTE MAXIMUM RATINGS Symbol Item Rating Units VDD Supply voltage -0.3 to 6.9 V VIN Input voltage -0.3 to VDD + 0.3 V VOUT Output voltage -0.3 to VDD + 0.3 V IOUT Max output current 25 mA TSTG Storage temperature -55 to +125 °C (Note) TLSOL Lead soldering temp 300 °C (Note) VESD ESD rating 4000 V Stresses above those listed under “ABSOLUTE MAXIMUM RATINGS” may cause permanent damage to the device. TABLE 9-2: Commercial Industrial DC CHARACTERISTICS (C): Tamb = 0° C to +70° C (I): Tamb = -40° C to +85° C 2.0V < VDD < 3.3 Parameter Sym. Operating current (avg) Standby current Auto-shutoff current 2,3 Min ICC Typ 1 0.3 Max 3.0 < VDD < 6.6 Min Typ1 Max Unit 0.7 1.6 mA VDD = 3.3V VDD = 6.6V 1.2 ICCS 0.1 1.0 0.1 1.0 μA ICCS 40 75 160 350 μA VDD+0.3 0.55VDD VDD+0.3 V 0.15VDD 0.15VDD V Conditions High level Input voltage VIH 0.55VDD Low level input voltage VIL -0.3 High level output voltage VOH 0.7VDD Low level output voltage VOL LED sink current ILED 0.15 1.0 4.0 0.15 1.0 4.0 mA VLED4 = 1.5V, VDD = 6.6V Pull-Down Resistance; S0-S3 RS0-3 40 60 80 40 60 80 KΩ VDD = 4.0V Pull-Down Resistance; PWM RPWM 80 120 160 80 120 160 KΩ VDD = 4.0V Note 1: 2: 3: 4: -0.3 0.7VDD 0.08VDD 0.08VDD V IOH = -1.0 mA, VDD = 2.0V IOH = -2.0 mA, VDD = 6.6V V IOL = 1.0 mA, VDD = 2.0V IOL = 2.0 mA, VDD = 6.6V Typical values are at 25° C. Auto-shutoff current specification does not include the current through the input pull-down resistors. Auto-shutoff current is periodically sampled and not 100% tested VLED is the voltage between the VDD pin and the LED pin. © 2011 Microchip Technology Inc. DS40146F-page 25 HCS361 FIGURE 9-1: POWER-UP AND TRANSMIT TIMING Button Press Detect Multiple Code Word Transmission TBP TTD TDB PWM Output Code Word 1 Code Word 2 Code Word 3 Code Word n Code Word 4 TTO Button Input Sn TABLE 9-3: POWER-UP AND TRANSMIT TIMING REQUIREMENTS VDD = +2.0 to 6.6V Commercial (C): Tamb = 0° C to +70° C Industrial (I): Tamb = -40° C to +85° C Parameter Symbol Min Max Unit Remarks Time to second button press TBP 10 + Code Word Time 26 + Code Word Time ms (Note 1) Transmit delay from button detect TTD 4.5 26 ms (Note 2) Debounce delay TDB 4 13 ms Auto-shutoff time-out period TTO 15 35 s (Note 3) Note 1: TBP is the time in which a second button can be pressed without completion of the first code word and the intention was to press the combination of buttons. 2: Transmit delay maximum value if the previous transmission was successfully transmitted. 3: The Auto-shutoff time-out period is not tested. DS40146F-page 26 © 2011 Microchip Technology Inc. HCS361 FIGURE 9-2: PWM FORMAT SUMMARY (MOD = 0) LOGIC 0 CODE WORD: TE LOGIC 1 Duty Cycle: 1/3-2/3 (TXWAK=0) TBP=3XTE LOGIC 0 TBP TE LOGIC 1 Duty Cycle: 1/6-2/6 (TXWAK=1) TBP TBP TBP TXWAK=0 1 10 6 SPM=1 TXWAK=1 SPM=0 33% Duty Cycle 18xTE Preamble FIGURE 9-3: Encrypted Portion 10xTE Sync 10xTE Header Pulse Code Word Fixed Code Portion Guard Time PWM PREAMBLE/HEADER FORMAT (MOD=0) SPM = 0 SPM = 1 28xTE Preamble FIGURE 9-4: 10xTE Sync Pulse PWM DATA FORMAT (MOD=0) Serial Number MSB LSB Bit 0 Header 10xTE Header Bit 1 LSB Bit 30 Bit 31 Bit 32 Bit 33 Encrypted Portion of Transmission © 2011 Microchip Technology Inc. Function Code MSB S3 S0 S1 Status S2 CRC VLOW CRC0 CRC1 Bit 58 Bit 59 Bit 60 Bit 61 Bit 62 Bit 63 Bit 64 Bit 65 Bit 66 Fixed Portion of Transmission Guard Time DS40146F-page 27 HCS361 FIGURE 9-5: VPWM FORMAT SUMMARY (MOD = 1) 1st CODE WORD WAKE-UP (TXWAK=1) Preamble Sync Dead Time FIGURE 9-6: Encrypt Fixed Guard Preamble Sync Encrypt VPWM WAKE-UP FORMAT (MOD=1) TBP 1 84 33% Duty Cycle Wake-Up sequence 250xTE FIGURE 9-7: Dead Time 258xTE VPWM PREAMBLE/HEADER FORMAT (MOD=1) TBP 10 6 1 SPM=1 SPM=0 Encrypted Portion 10xTE Sync 10xTE Header Pulse Code Word 18xTE Preamble FIGURE 9-8: Fixed Code Portion Guard Time VPWM DATA WORD FORMAT (MOD=1) LOGIC 0 TE LOGIC 1 on Transition Low to High TBP TBP 2XTE on Transition High to Low TE LOGIC 0 TBP TE LOGIC 1 TBP VLOW Bit 1 0 0 Encrypted Data 1 1 0 1 0 1 2 3 Note: 1 1 0 0 Serial Number 1 1 0 28 29 30 31 32 33 34 35 56 57 0 58 1 Function Code 1 0 0 1 CRC 1 0 1 59 60 61 64 65 66 62 63 The bit values are only shown as an example. DS40146F-page 28 © 2011 Microchip Technology Inc. HCS361 FIGURE 9-9: HCS361 NORMALIZED TE VS. TEMP 1.7 Typical 1.6 1.5 TE Max. 1.4 1.3 TE VDD LEGEND = 2.0V = 3.0V = 6.0V 1.2 1.1 1.0 0.9 0.8 0.7 TE Min. 0.6 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 Temperature °C © 2011 Microchip Technology Inc. DS40146F-page 29 HCS361 TABLE 9-4: TIMING PARAMETERS: PWM MODE (TXWAK=0) VDD = +2.0 to 6.6V Commercial (C):Tamb = 0° C to +70° C Industrial (I):Tamb = -40° C to +85° C Code Words Transmitted BSEL = 0 BSEL = 1 Symbol Characteristic Min Typ. Max. Min. Typ. Max. Units TE Basic pulse element 260 400 620 130 200 310 μs TBP PWM bit pulse width 3 3 TE TP Preamble duration 28 28 TE TS Sync Pulse duration 10 10 TE TH Header duration 10 10 TE THOP Hopping code duration 96 96 TE TFIX Fixed code duration 105 105 TE TG Guard Time 18 34 TE ⎯ Total Transmit Time 267 283 TE ⎯ Total Transmit Time 69.4 106.8 165.5 36.7 56.6 87.7 ms ⎯ PWM data rate 1282 833 538 2564 1667 1075 bps Typ. Max. Units 100 6 28 10 10 192 210 66 516 51.6 1667 155 μs TE TE TE TE TE TE TE TE ms bps Note: The timing parameters are not tested but derived from the oscillator clock. TABLE 9-5: TIMING PARAMETERS: PWM MODE (TXWAK=1) VDD = +2.0 to 6.6V Commercial (C):Tamb = 0° C to +70° C Industrial (I):Tamb = -40° C to +85° C Symbol Characteristic Code Words Transmitted BSEL = 0 Min Typ. BSEL = 1 Max. Min. Basic pulse element 130 200 310 65 TE TBP PWM bit pulse width 6 TP Preamble duration 28 TS Sync Pulse duration 10 TH Header duration 10 THOP Hopping code duration 192 TFIX Fixed code duration 210 TG Guard Time 34 ⎯ Total Transmit Time 484 ⎯ Total Transmit Time 62.9 96.8 150.0 33.5 ⎯ PWM data rate 1282 833 538 2564 Note: The timing parameters are not tested but derived from the oscillator clock. DS40146F-page 30 79.9 1075 © 2011 Microchip Technology Inc. HCS361 TABLE 9-6: Commercial Industrial TIMING PARAMETERS: VPWM MODE (BSEL=0) VDD = +2.0 to 6.6V (C): Tamb = 0° C to +70° C (I): Tamb = -40° C to +85° C Code Words Transmitted Shortest Longest Symbol Characteristic Min Typ. Max. Min. Typ. Max. Units TE Basic pulse element 260 400 620 260 400 620 μs TP Preamble duration 28 28 TE TS Sync Pulse duration 10 10 TE TH Header duration 10 10 TE THOP Hopping code duration 32 64 TE TFIX Fixed code duration 35 70 TE TG Guard Time 114 114 TE ⎯ Total Transmit Time 229 296 TE ⎯ Total Transmit Time 59.5 91.6 141.9 76.9 118.4 183.5 ms ⎯ VPWM data rate 3846 2500 1613 3846 2500 1613 bps Note: The timing parameters are not tested but derived from the oscillator clock. TABLE 9-7: TIMING PARAMETERS: VPWM MODE (BSEL=1) VDD = +2.0 to 6.6V Commercial (C): Tamb = 0° C to +70° C Industrial (I): Tamb = -40° C to +85° C Code Words Transmitted Shortest Longest Symbol Characteristic Min Typ. Max. Min. Typ. Max. Units TE Basic pulse element 130 200 310 130 200 310 μs TP Preamble duration 28 28 TE TS Sync Pulse duration 10 10 TE TH Header duration 10 10 TE THOP Hopping code duration 32 64 TE TFIX Fixed code duration 35 70 TE TG Guard Time 226 226 TE ⎯ Total Transmit Time 341 408 TE ⎯ Total Transmit Time 44.3 68.2 105.7 53.0 81.6 126.4 ms VPWM data rate 7692 5000 3226 7692 5000 3226 bps ⎯ Note: The timing parameters are not tested but derived from the oscillator clock. © 2011 Microchip Technology Inc. DS40146F-page 31 HCS361 10.0 PACKAGING INFORMATION 10.1 Package Marking Information 8-Lead PDIP Example XXXXXXXX XXXXXNNN YYWW HCS361 XXXXXNNN 0025 8-Lead SOIC Example XXXXXXX XXXYYWW NNN HCS361 XXX0025 NNN Legend: Note: * XX...X Y YY WW NNN Customer specific information* Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. Standard PIC MCU device marking consists of Microchip part number, year code, week code, and traceability code. For PIC MCU device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 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