HV2809K6-G-M937

Supertex inc. HV2809 Low Harmonic Distortion, 32-Channel, High Voltage Analog Switch Relay Replacement IC General Description Features ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► 32-channel high voltage analog switch 2:1 multiplexer/demultiplexer Enable control for all-OFF state 3.3 or 5.0V CMOS input logic level HVCMOS technology for high performance Very low quiescent power dissipation, 10µA Low parasitic capacitance DC to 50MHz analog signal frequency -60dB typical OFF-isolation at 5.0MHz CMOS logic circuitry for low power Excellent noise immunity Flexible operating supply voltages 56-Lead 8x8 QFN package Applications ►► Electromechanical relay replacement in medical ultrasound probes. The Supertex HV2809 is a low harmonic distortion, 32-channel, high voltage analog switch integrated circuit (IC), designed for use in medical ultrasound imaging systems as a probe selection relay replacement. It serves as a 16PDT (16-pole, double throw) high voltage analog switch array. The enable function allows the parts to be configured as either a 2:1 or 4:1 multiplexer/demultiplexer. The HV2809 is a very fast transducer multiplexer that consumes minimal power and emits no audible noise. Using HVCMOS technology, this device combines high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. The device is suitable for various combinations of high voltage supplies, e.g., VPP/VNN: +40V/-160V, +100V/-100V, and +160V/-40V. The HV2809 comes in an 8.0mm x 8.0mm x 1.0mm, 56-Lead QFN package. Compared to an electromechanical relay, it not only saves considerable PCB area, but also saves on the PCB assembled height. Block Diagram +3.3V 1kΩ Output Switches VDD SW0 0.1µF Y01 Logic Control & Level Shifters A/B ENABLE SW1 SW30 Y3031 SW31 GND VNN VPP -100V 0.1µF Doc.# DSFP-HV2809 NR010913 +100V 0.1µF Supertex inc. www.supertex.com HV2809 Pin Configuration Ordering Information 56 Part Number Package Options Packing HV2809K6-G 56-Lead (8x8) QFN 250/Tray HV2809K6-G M937 56-Lead (8x8) QFN 2000/Reel 1 - G indicates package is RoHS compliant (‘Green’) ESD Sensitive Device Absolute Maximum Ratings Parameter 56-Lead QFN (top view) Value VDD logic supply -0.5V to +6.5V VPP-VNN differential supply VPP positive supply 220V -0.5V to VNN +200V VNN negative supply +0.5V to -200V Logic input voltage -0.5V to VDD +0.3V Analog signal range VNN to VPP Peak analog signal current/channel Storage temperature 3.0A Product Marking HV2809K6 LLLLLLLLL YYWW AAA CCC Package may or may not include the following marks: Si or 56-Lead QFN -65°C to 150°C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. L = Lot Number YY = Year Sealed WW = Week Sealed A = Assembler ID C = Country of Origin = “Green” Packaging Typical Thermal Resistance Package θja 56-Lead QFN 21OC/W Recommended Operating Conditions Sym Parameter Value VDD Logic power supply voltage 3.0 to 5.5V VPP Positive high voltage supply +40 to VNN +200V VNN Negative high voltage supply -40 to -160V VIH High level input voltage 0.9VDD to VDD VIL Low level input voltage 0 to 0.1VDD VSIG Analog signal voltage peak-to-peak VNN +10V to VPP -10V Operating free air temperature 0 to 70OC TA Notes: 1. Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last. 2. VSIG must be VNN ≤ VSIG ≤ VPP or floating during power up/down transition. 3. Rise and fall times of power supplies VDD, VPP, and VNN should not be less than 1.0msec. Doc.# DSFP-HV2809 NR010913 2 Supertex inc. www.supertex.com HV2809 DC Electrical Characteristics (Over recommended operating conditions unless otherwise specified ) Sym Parameter 0OC +25OC +70OC Unit Conditions Min Max Min Typ Max Min Max - 30 - 26 38 - 48 - 25 - 22 27 - 32 - 25 - 22 27 - 30 - 18 - 18 24 - 27 - 23 - 20 25 - 30 - 22 - 16 25 - 27 Small signal switch ON-resistance matching - 20 - 5.0 20 - 20 % RONL Large signal switch ON-resistance ISIG = 5.0mA, VPP = +100V, VNN = -100V - - - 15 - - - Ω VSIG = VPP -10V, ISIG = 1A ISOL Switch OFF-leakage per switch - 5.0 - 1.0 10 - 15 μA VSIG = VPP -10V, VNN +10V DC offset switch OFF - 300 - 100 300 - 300 DC offset switch ON - 500 - 100 500 - 500 mV 100kΩ load IPPQ Quiescent VPP supply current - - - 10 50 - - INNQ Quiescent VNN supply current - - - -10 -50 - - μA All switches OFF IPPQ Quiescent VPP supply current - - - 10 50 - - INNQ Quiescent VNN supply current - - - -10 -50 - - μA All switches ON, ISW = 5.0mA ISW Switch output peak current - 3.0 - 3.0 2.0 - 2.0 A VSIG duty cycle < 0.1% fSW Output switching frequency - - - - 50 - - kHz Duty cycle = 50% - 13 - - 14 - 16 - 8.0 - - 10 - 11 mA - 8.0 - - 10 - 11 VPP= +40V, All output VNN = -160V switches are VPP= +100V, turning ON VNN = -100V and OFF at VPP= +160V, 50kHz with no load V = -40V mA VPP = +40V, All output VNN = -160V switches are VPP= +100V, turning ON VNN = -100V and OFF at VPP= +160V, 50kHz with no load V = -40V RONS ΔRONS VOS IPP Small signal switch ON-resistance Average VPP supply current ISIG = 5.0mA VPP = +40V, ISIG = 200mA VNN = -160V Ω ISIG = 5.0mA VPP = +100V, ISIG = 200mA VNN = -100V ISIG = 5.0mA VPP = +160V, ISIG = 200mA VNN = -40V NN INN Average VNN supply current - 13 - - 14 - 16 - 8.0 - - 10 - 11 - 8.0 - - 10 - 11 NN IDD VDD supply current - 0.1 - - 0.1 - 0.1 mA VDD = 5.0V@ 50kHz CW IDDQ Quiescent VDD supply current - 10 - - 10 - 10 μA All logic inputs are static CIN Logic input capacitance - 10 - - 10 - 10 pF --- * See Test Circuits on page 5 Doc.# DSFP-HV2809 NR010913 3 Supertex inc. www.supertex.com HV2809 AC Electrical Characteristics (Over recommended operating conditions unless otherwise specified) Sym 0OC Parameter +25OC +70OC Min Max Min Typ Max Min Max Unit Conditions tON Turn ON time - 30 - 15 30 - 30 tOFF Turn OFF time - 30 - 15 30 - 30 - 20 - - 20 - 20 - 20 - - 20 - 20 - 20 - - 20 - 20 -30 - -30 -33 - -30 - -58 - -58 - - -58 - -60 - -60 -70 - -60 - dB f = 5.0MHz, 50Ω load Output switch isolation diode current - 300 - - 300 - 300 mA 300ns pulse width, 2.0% duty cycle OFF capacitance SW to GND - 14 - 9.0 14 - 14 OFF capacitance Y to GND - 28 - 18 28 - 28 pF VSIG = 0V, f = 1.0MHz, both SW OFF ON capacitance SW to GND - 33 - 23 33 - 33 ON capacitance Y to GND - 33 - 23 33 - 33 pF VSIG = 0V, f = 1.0MHz, one SW ON, one SW OFF +VSPK - 250 - - 250 - 250 -VSPK - 250 - - 250 - 250 - 250 - - 250 - 250 - 250 - - 250 - 250 +VSPK - 250 - - 250 - 250 -VSPK - 250 - - 250 - 250 +VSPK - 250 - - 250 - 250 -VSPK - 250 - - 250 - 250 - 250 - - 250 - 250 - 250 - - 250 - 250 +VSPK - 250 - - 250 - 250 -VSPK - 250 - - 250 - 250 VPP = +160V, VNN = -40V, RLOAD = 50Ω - - - 1020 - - - VPP = +40V, VNN = -160V - - - 700 - - - - - - 370 - - - dv/dt Maximum VSIG slew rate KO OFF isolation KCR Switch crosstalk IID CSG(OFF) CSG(ON) +VSPK Output voltage spike SW -VSPK +VSPK Output voltage spike Y -VSPK QC Charge injection μs VSIG = VPP -10V, VPP = +100V, RLOAD = 10kΩ, VNN = -100V VPP = +40V, VNN = -160V V/ns VPP = +100V, VNN = -100V VPP = +160V, VNN = -40V dB f = 5.0MHz,1.0kΩ//15pF load f = 5.0MHz, 50Ω load VPP = +40V, VNN = -160V, RLOAD = 50Ω mV VPP = +100V, VNN = -100V, RLOAD = 50Ω VPP = +160V, VNN = -40V, RLOAD = 50Ω VPP = +40V, VNN = -160V, RLOAD = 50Ω mV pC VPP = +100V, VNN = -100V, RLOAD = 50Ω VPP = +100V, VNN = -100V VPP = +160V, VNN = -40V * See Test Circuits on page 5 Truth Table Logic Inputs Switch Status EN A/B H H SW0, 2, 4...30 ON, SW1, 3, 5...31 OFF H L SW0, 2, 4...30 OFF, SW1, 3, 5...31 ON L X All switches OFF Doc.# DSFP-HV2809 NR010913 4 Supertex inc. www.supertex.com HV2809 Test Circuits VPP -10V SW0 ISOL SW1 NC SW0 VOUT Y01 Y01 NC VPP -10V VPP VPP VDD VNN VNN GND 5.0V VPP VPP VDD VNN VNN GND VIN = 10VP-P @5.0MHz SW0 SW1 NC SW0 VSIG IID 50Ω NC VPP VNN VPP VNN KO = 20Log VDD VPP 5.0V SW1 VPP VPP VDD VNN VNN GND VIN = 10VP-P @5.0MHz NC NC Y01 VNN 5.0V GND NC VOUT SW0 SW1 VPP VDD VNN GND SW0 NC +VSPK Y01 -VSPK RL 1kΩ VPP VPP VDD VNN GND 5.0V VPP VPP VDD VNN VNN GND VOUT 5.0V VOUT VIN Crosstalk -VSPK 50Ω Y01 NC 50Ω VPP Isolation Diode Current +VSPK 5.0V SW3 KCR = 20Log ΔVOUT VNN SW2 VNN VIN 1000pF SW1 Y23 VOUT SW1 SW0 Y01 50Ω VDD NC TON/TOFF Test Circuit VNN VPP VNN GND OFF Isolation SW0 5.0V SW1 Y01 DC Offset ON/OFF Y01 VOUT SW0 RLOAD 10kΩ VOUT NC RLOAD 100kΩ Switch OFF Leakage VOUT SW1 5.0V SW1 RL 1kΩ VOUT NC Y01 50Ω VPP VPP VDD VNN VNN GND 5.0V Q = 1000pF • ∆VOUT Charge Injection Doc.# DSFP-HV2809 NR010913 Output Voltage Spike SW 5 Output Voltage Spike Y Supertex inc. www.supertex.com HV2809 Pin Function Pin Function Pin Function Pin Function Pin Function 1 Y2829 15 SW3 29 Y1213 43 SW19 2 SW29 16 SW4 30 SW13 44 SW20 3 SW30 17 Y45 31 VNN 45 Y2021 4 Y3031 18 SW5 32 SW14 46 SW21 5 SW31 19 SW6 33 Y1415 47 SW22 6 ENABLE 20 Y67 34 SW15 48 Y2223 7 VDD 21 SW7 35 VPP 49 SW23 8 A/B 22 SW8 36 VPP 50 SW24 9 GND 23 Y89 37 SW16 51 Y2425 10 SW0 24 SW9 38 Y1617 52 SW25 11 Y01 25 SW10 39 SW17 53 SW26 12 SW1 26 Y1011 40 VNN 54 Y2627 13 SW2 27 SW11 41 SW18 55 SW27 14 Y23 28 SW12 42 Y1819 56 SW28 VSUB (Thermal Pad) Doc.# DSFP-HV2809 NR010913 The central thermal pad on the bottom of package must be connected to VNN externally 6 Supertex inc. www.supertex.com HV2809 56-Lead QFN Package Outline (K6) 8.00x8.00mm body, 1.00mm height (max), 0.50mm pitch D2 D 56 1 56 1 Note 1 (Index Area D/2 x E/2) Note 1 (Index Area D/2 x E/2) e E E2 b View B Top View Bottom View Note 3 θ A A3 L Seating Plane L1 Note 2 Side View A1 View B Notes: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. 2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present. 3. The inner tip of the lead may be either rounded or square. Symbol Dimension (mm) MIN A A1 0.80 0.00 NOM 0.90 0.02 MAX 1.00 0.05 A3 0.20 REF b D D2 E E2 e 0.18 7.85* 2.75 7.85* 2.75 0.25 8.00 5.70 8.00 5.70 0.30 8.15* 6.70† 8.15* 6.70† 0.50 BSC L L1 θ 0.30 0.00 0O 0.40 - - 0.50 0.15 14O JEDEC Registration MO-220, Variation VLLD-2, Issue K, June 2006. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings are not to scale. Supertex Doc.#: DSPD-56QFNK68X8P050, Version A031010. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-HV2809 NR010913 7 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com