HV440WG-G

Supertex inc. HV440 High Voltage Ring Generator IC Features General Description Applications The high voltage output P- and N-Channel transistors are controlled independently by the logic inputs PIN and NIN. Connecting the mode pin to ground will enable the device to be controlled with a single input, NIN. This adds a 200ns deadband on the control logic to avoid cross conduction on the high voltage output. A logic high on NIN will turn the high voltage P-Channel on and the N-Channel off. The high voltage outputs have pulse by pulse overcurrent protection set by two external sense resistors. Nominal PWM logic input frequency is 100KHz. ►► ►► ►► ►► ►► ►► 220V maximum operating voltage Integrated high voltage transistors Up to 70VRMS ring signal Pulse by pulse output over current protection 5 REN output capability External MOSFETs enhance output rating to 20 REN ►► Microcontroller or microprocessor controlled high voltage ring generator ►► Set-top/street box ring generator ►► Pair gain ring generator ►► Wireless local loops ►► Fibre in the loop/to the curb ►► Coax cable loop The Supertex HV440 is a monolithic integrated circuit capable of generating up to 70V RMS sine wave output at frequencies of 15 to 60Hz with a load of 5 North American RENs. Its out putrating can be enhanced to 20 North American RENs with the addition of two Supertex MOSFETs: one N-Channel MOSFET, the TN2524N8, and one P-Channel MOSFET, the TP2522N8. Typical Application Circuit VPP1 4.3Ω High Voltage Level Translator VDD PIN NIN m-Controller EN VPSEN 0.1µF PGATE VPP2 Linear Reg Sine Wave Ring Output HVOUT Logic PGND VDD Mode GND High Voltage Level Translator HV440 Doc.# DSFP - HV440 C031414 Current Sense and Driver Linear Reg 1.5mH 0.22µF VNN2 NGATE Current Sense and Driver 0.1µF VNSEN 4.3Ω VNN1 Supertex inc. www.supertex.com HV440 Ordering Information Pin Configuration Part Number Package Option Packing HV440WG-G 16-Lead SOW 16 1 1000/Reel -G denotes a lead (Pb)-free / RoHS compliant package Absolute Maximum Ratings Parameter Value VPP1 - VNN1, power supply voltage +240V VPP1, positive high supply voltage +120V VPP2, positive gate supply voltage +120V VNN1, negative high voltage -170V VNN2, negative gate voltage -170V VDD, logic supply voltage +7.5V Storage temperature 16-Lead SOW (WG) (top view) Product Marking Top Marking YY = Year Sealed WW = Week Sealed HV440WG LLLLLLLLLL A = Assembler ID L = Lot Number Bottom Marking C = Country of Origin* = “Green” Packaging CCCCCCCCCCC YYWW AAA -65°C to +150°C Power dissipation 800mW Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. * May be part of top marking Package may or may not include the following marks: Si or 16-Lead SOW (WG) Typical Thermal Resistance Package θja 16-Lead SOW 66OC/W Electrical Characteristics (over operating supply voltage unless otherwise specified. T = 25°C) A Sym Parameter Min Typ Max VPP1 High voltage positive supply 15 - 110 VPP2 Positive linear regulator output VPP1 -9.9 - VPP1 -19.1 VNN1 High voltage negative supply VPP1 -220 - -110 VNN2 Negative linear regulator output VPP1 +5.6 - VNN1 +10.5 VDD Logic supply 4.5 - 5.5 IPP1Q VPP1 quiescent current - 250 400 INN1Q VNN1 quiescent current - 250 550 IDDQ VDD1 quiescent current - - 150 - - 60 IPP1 VPP1 operating current - - 1.7 Doc.# DSFP - HV440 C031414 2 Units Conditions V TA = -40°C to +85°C µA PIN = NIN = 0V, TA = -40°C to +85°C µA mA PIN = NIN = 0V, MODE = 0 PIN = NIN = 0V, MODE = 1 No load, VOUTP and VOUTN switching at 100KHz, TA = -40°C to +85°C Supertex inc. www.supertex.com HV440 Electrical Characteristics (cont.) (over operating supply voltage unless otherwise specified. T = 25°C) A Sym Parameter Min Typ Max Units Conditions INN1 VNN1 operating current - - 1.9 mA No load, VOUTP and VOUTN switching at 100KHz, TA = -40°C to +85°C IDD VDD operating current - - 1.0 mA --- IIL Mode logic input low current - 25 - µA MODE = 0V VIL Logic input low voltage 0 - 1.0 V VDD = 5.0V VIH Logic input high voltage 4.0 - 5.0 V VDD = 5.0V VOUTP source resistance - 60 80 Ω IOUT = 100mA VOUTP sink resistance - 60 80 Ω IOUT = -100mA Change in source/sink resistance over temperature - 0.33 - Ω/°C tD(ON) HVOUT delay time - 150 - ns PIN = high to low, Mode = high tRISE HVOUT rise time - - 50 ns PIN = high to low HVOUT delay time - 200 - ns NIN = low to high, Mode = high tFALL HVOUT fall time - - 50 ns NIN = low to high tDB Logic deadband time - - 200 ns Mode = low VPP1 -0.75 VPP1 -1.00 VPP1 -1.25 VPP1 -0.67 - VPP1 -1.31 V TA = -40°C to +85°C VNN1 +0.75 VNN1 +1.00 VNN1 +1.25 VNN1 +0.65 - VNN1 +1.33 V TA = -40°C to +85°C High Voltage Output RSOURCE RSINK ΔR/ΔT tD(OFF) TA = -40°C to +85°C VPSEN HVOUT current source sense voltage VNSEN HVOUT current sink sense voltage tSHORTP HVOUT off time when current source sense is activated - - 100 ns --- tSHORTN HVOUT off time when current sink sense is activated - - 100 ns --- tWHOUT Minimum pulse width for HVOUT at VPP1 - - 500 ns TA = -40°C to +85°C tWLOUT Minimum pulse width for HVOUT at VNN1 - - 500 ns TA = -40°C to +85°C Doc.# DSFP - HV440 C031414 3 Supertex inc. www.supertex.com HV440 Truth Table * NIN PIN Mode EN HVOUT L L H L VPP1 L H H L High Z H L* H L – H H H L VNN1 L X L L VNN1 H X L L VPP1 X X X H High Z This state will short VPP1 to VNN1 and should therefore be avoided. Block Diagram VPP1 High Voltage Level Translator VDD PIN NIN EN MODE GND Doc.# DSFP - HV440 C031414 Current Sense and Driver VPSEN PGATE VPP2 Linear Reg HVOUT Logic PGND VDD High Voltage Level Translator Linear Reg VNN2 Current Sense and Driver 4 NGATE VNSEN VNN1 Supertex inc. www.supertex.com HV440 Pin Description Pin Name Description 1 VPP1 Positive high voltage supply. 2 PGND High voltage power ground. 3 GND 4 MODE 5 PIN Logic control input. When mode is high, logic input high turns off output high voltage P-Channel. 6 NIN Logic control input. When mode is high, logic input high turns on output high voltage N-Channel. 7 EN Active low enable input. 8 VDD Logic supply voltage. 9 VNN1 Negative high voltage supply. 10 VNN2 Negative gate voltage supply. Generated by an internal linear regulator. A 0.1µF capacitor should be connected between VNN2 and VNN1. 11 NGATE Gate drive for external N-channel MOSFET. 12 VNSEN Pulse by pulse over current sensing for internal N-Channel MOSFET. 13 HVOUT High voltage output. Voltage swings from VPP1 to VNN1. 14 VPSEN Pulse by pulse over current sensing for internal P-Channel MOSFET. 15 PGATE Gate drive for external P-channel MOSFET. 16 VPP2 Doc.# DSFP - HV440 C031414 Low voltage ground. Logic mode input. Logic low activates 200nsec deadband. When mode is low, NIN turns on and off the high voltage N- and P-Channels. Pin is not used and should be connected to VDD or ground. Positive gate voltage supply. Generated by an internal linear regulator. A 0.1µF capacitor should be connected between VPP2 and VPP1. 5 Supertex inc. www.supertex.com HV440 16-Lead SOW (Wide Body) Package Outline (WG) 10.30x7.50mm body, 2.65mm height (max), 1.27mm pitch D 16 θ1 E1 E Note 1 (Index Area 0.25D x 0.75E1) L L1 e 1 Top View Gauge Plane L2 b θ Seating Plane View B View B Note 1 A h h A A2 Seating Plane A1 Side View View A-A A Note: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol MIN Dimension NOM (mm) MAX A A1 A2 b D E E1 2.15* 0.10 2.05 0.31 10.10* 9.97* 7.40* - - - - 10.30 10.30 7.50 2.65 0.30 2.55* 0.51 10.50* 10.63* 7.60* e 1.27 BSC h L 0.25 0.40 - - 0.75 1.27 L1 1.40 REF L2 0.25 BSC θ θ1 0O 5O - - 8O 15O JEDEC Registration MS-013, Variation AA, Issue E, Sep. 2005. * This dimension is not specified in the JEDEC drawing. Drawings are not to scale. Supertex Doc. #: DSPD-16SOWWG, Version E041309. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2014 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP - HV440 C031414 6 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com