HV66
32-Channel LCD Driver with Separate Backplane Output
Features
General Description
•
•
•
•
•
•
•
The HV66 is a low-voltage to high-voltage
serial-to-parallel converter with push-pull outputs. This
device is designed as a driver circuit for LCD displays.
It can also be used in any application requiring
multiple-output
high-voltage
current
sourcingand-sinking capabilities. The inputs are fully CMOS
compatible.
32-Channel High-Voltage Push-Pull Outputs
Up to 60V Output Voltage
Low-Power Level Shifting
5 MHz Shift Register Speed
Latched Data Outputs
Bidirectional Shift Register (DIR)
Backplane Output
Applications
•
•
•
•
•
LCD Drivers
Display Drivers
Inkjet Drivers
3D Printer Drivers
Microelectromechanical Systems Applications
The device consists of a 32-bit Shift register,
32 latches, and control logic to perform blanking and
polarity control of the outputs. The HVOUT1 is
connected to the first stage of the Shift register. Data is
shifted through the Shift register on the logic rising
transition of the clock. A DIR pin causes data shifting to
move in a clockwise direction when grounded. When
connected to VDD, the pin causes data shifting to move
in a counter clockwise direction. A data output buffer is
provided for cascading devices. This output reflects the
current status of the last bit of the Shift register. The
operation of the Shift register is not affected by the latch
enable (LE), blanking (BL) and the polarity (POL)
inputs. Transfer of data from the Shift register to the
latch occurs when the latch enable (LE) input is high.
The data in the latch is stored after LE transitions from
high to low.
Package Types
44-lead PLCC
(Top view)
44-lead PQFP
(Top view)
6
1 44
40
44
1
See Table 2-1 and Table 2-2 for pin information.
2020 Microchip Technology Inc.
DS20005886A-page 1
HV66
Functional Block Diagram
VPP
POL
BL
LE
VDD
DATA IN
CLK
DIR
Latch
HVOUT1
Latch
HVOUT2
32-Bit
Shift
Register
(Outputs 3 to 30
not shown)
Latch
HVOUT31
Latch
HVOUT32
DATA OUT
BPOUT
GND
DS20005886A-page 2
2020 Microchip Technology Inc.
HV66
Typical Application Circuit
2020 Microchip Technology Inc.
DS20005886A-page 3
HV66
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Logic Supply Voltage, VDD (Note 1) .......................................................................................................... –0.5V to +7V
High-Voltage Supply Voltage, VPP (Note 1) ............................................................................................ –0.5V to +70V
Logic Input Levels ............................................................................................................................ –0.5V to VDD+0.5V
Ground Current (Note 2) ......................................................................................................................................... 1.5A
Maximum Junction Temperature, TJ(MAX) ........................................................................................................... +125°C
Storage Temperature, TS .................................................................................................................... –65°C to +125°C
Continuous Total Power Dissipation:
44-lead PQFP (Note 3) ............................................................................................................................ 1200 mW
44-lead PLCC (Note 3) ............................................................................................................................ 1200 mW
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
Note 1: All voltages are referenced to GND.
2: Duty cycle is limited by the total power dissipated in the package.
3: For operations above 25°C ambient, derate linearly to 85°C at 20 mW/°C.
RECOMMENDED OPERATING CONDITIONS
Parameter
Sym.
Min.
Typ.
Max.
Unit
Logic Supply Voltage
VDD
4.5
—
5.5
V
High-Voltage Supply Voltage
VPP
12
—
60
V
High-Level Input Voltage
VIH
2.4
—
VDD
V
Low-Level Input Voltage
VIL
0
—
0.8
V
Clock Frequency
fCLK
0
—
5
MHz
Operating Ambient Temperature
TA
–40
—
+85
°C
Allowable Current through Output Diodes
IOD
—
—
200
mA
DS20005886A-page 4
Conditions
2020 Microchip Technology Inc.
HV66
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: Over recommended operating conditions unless otherwise stated. VDD = 5V, VPP = 60V.
Parameter
Sym.
Min.
VDD Supply Current
IDD
—
—
15
mA
Quiescent VPP Supply Current
IPPQ
—
—
0.5
mA
Quiescent VDD Supply Current
IDDQ
—
—
0.5
mA
All VIN = GND or VDD
High-Level Logic Input Current
IIH
—
—
1
µA
VIH = VDD
Low-Level Logic Input Current
IIL
—
—
–1
µA
VIL = 0V
50
—
—
V
IO = –5 mA, VPP = 60V
4.6
—
—
V
IO = –100 µA
—
—
8
V
IO = 5 mA, VPP = 60V
—
—
0.4
V
IO = 100 µA
High-Level Output Data Out
Low-Level Output Voltage
HVOUT
VOH
Data Out
HVOUT
VOL
Data Out
Typ. Max.
Unit
Conditions
fCLK = 5 MHz, VDD = 5.5V
Low-Level Output Voltage, Backplane
VOLBP
—
—
3
V
IO = 10 mA
High-Level Output Voltage, Backplane
VOHBP
57
—
—
V
IO = –10 mA
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: VDD = 5V, VPP = 60V, TA = 25°C, Logic Input Rise/Fall Time = 10 ns.
Parameter
Clock Frequency
Clock Width, High or Low
Data Setup Time before Clock Rises
Sym.
Min.
Typ. Max. Unit
fCLK
—
tWL, tWH
100
—
—
ns
tSU
25
—
—
ns
—
5
Conditions
MHz
tH
50
—
—
ns
Time from Latch Enable or POL to HVOUT
tHON,
tHOFF
—
—
500
ns
CL = 20 pF
Time from POL to BPOUT
tBON,
tBOFF
—
—
500
ns
CL = 20 pF
Delay Time Clock to Data High to Low
tDHL
—
—
200
ns
CL = 10 pF
Delay Time Clock to Data Low to High
tDLH
—
—
200
ns
CL = 10 pF
Data Hold Time after Clock Rises
Delay Time Clock to Latch Enable Low to High
tDLE
50
—
—
ns
Latch Enable Pulse Width
tWLE
100
—
—
ns
Latch Enable Setup Time before Clock Falls
tSLE
50
—
—
ns
BPOUT Rise and Fall Time
tBR, tBF
10
—
1000
µs
CL = 350 pF
BPOUT Rise and Fall Time Difference
|tBR–tBF|
—
—
100
µs
CL = 350 pF
TEMPERATURE SPECIFICATIONS
Parameter
Sym.
Min.
Typ. Max.
Unit
Operating Ambient Temperature
TA
–40
—
+85
°C
Storage Temperature
TS
–65
—
+125
°C
44-lead PQFP
JA
—
51
—
°C/W
44-lead PLCC
JA
—
37
—
°C/W
Conditions
TEMPERATURE RANGE
PACKAGE THERMAL RESISTANCE
2020 Microchip Technology Inc.
DS20005886A-page 5
HV66
Timing Waveforms
VIH
DATA
IN
Data Valid
50%
VIL
tSU
CLK
50%
tH
50%
VIH
50%
50%
tWL
50%
VIL
tWH
VOH
50%
DATA
OUT
VOL
tDLH
VOH
50%
VOL
tDHL
VIH
50%
LE
tDLE
50%
VIL
tWLE
tSLE
VOH
HVOUT
w/ S/R LOW
50%
VOL
tHOFF
VOH
HVOUT
w/ S/R HIGH
50%
VOL
tHON
POL
(ASYNCH
w/ CLK)
BPOUT
VIH
50%
50%
VIL
tBOFF
tBON
50%
50%
10%
tBR
DS20005886A-page 6
VOHBP
90%
tBF
VOLBP
2020 Microchip Technology Inc.
HV66
2.0
PIN DESCRIPTION
The details on the pins of HV66 44-lead PQFP and
44-lead PLCC are in Table 2-1 and Table 2-2,
respectively. Refer to Package Types for the location
of pins.
TABLE 2-1:
Pin Number
44-LEAD PQFP PIN FUNCTION TABLE
Pin Name
Description
1
HVOUT11
High-voltage output
2
HVOUT12
High-voltage output
3
HVOUT13
High-voltage output
4
HVOUT14
High-voltage output
5
HVOUT15
High-voltage output
6
HVOUT16
High-voltage output
7
HVOUT17
High-voltage output
8
HVOUT18
High-voltage output
9
HVOUT19
High-voltage output
10
HVOUT20
High-voltage output
11
HVOUT21
High-voltage output
12
HVOUT22
High-voltage output
13
HVOUT23
High-voltage output
14
HVOUT24
High-voltage output
15
HVOUT25
High-voltage output
16
HVOUT26
High-voltage output
17
HVOUT27
High-voltage output
18
HVOUT28
High-voltage output
19
HVOUT29
High-voltage output
20
HVOUT30
High-voltage output
21
HVOUT31
High-voltage output
22
HVOUT32
High-voltage output
23
DATA OUT
Data output pin
24
GND
Supply ground
25
NC
No connection
26
BL
Blanking pin
27
POL
Polarity pin
28
LE
29
VDD
Logic supply voltage
30
CLK
Clock pin
31
DIR
Direction pin
32
DATA IN
33
VPP
Latch enable pin
Data input pin
High-voltage power supply
34
BPOUT
35
HVOUT1
High-voltage output
36
HVOUT2
High-voltage output
2020 Microchip Technology Inc.
Back plane output
DS20005886A-page 7
HV66
TABLE 2-1:
44-LEAD PQFP PIN FUNCTION TABLE (CONTINUED)
Pin Number
Pin Name
Description
37
HVOUT3
High-voltage output
38
HVOUT4
High-voltage output
39
HVOUT5
High-voltage output
40
HVOUT6
High-voltage output
41
HVOUT7
High-voltage output
42
HVOUT8
High-voltage output
43
HVOUT9
High-voltage output
44
HVOUT10
High-voltage output
TABLE 2-2:
44-LEAD PLCC PIN FUNCTION TABLE
Pin Number
Pin Name
Description
1
HVOUT16
High-voltage output
2
HVOUT17
High-voltage output
3
HVOUT18
High-voltage output
4
HVOUT19
High-voltage output
5
HVOUT20
High-voltage output
6
HVOUT21
High-voltage output
7
HVOUT22
High-voltage output
8
HVOUT23
High-voltage output
9
HVOUT24
High-voltage output
10
HVOUT25
High-voltage output
11
HVOUT26
High-voltage output
12
HVOUT27
High-voltage output
13
HVOUT28
High-voltage output
14
HVOUT29
High-voltage output
15
HVOUT30
High-voltage output
16
HVOUT31
High-voltage output
17
HVOUT32
High-voltage output
18
DATA OUT
Data output pin
19
GND
Supply ground
20
NC
No connection
21
BL
Blanking pin
22
POL
Polarity pin
23
LE
24
VDD
25
CLK
Clock pin
26
DIR
Direction pin
27
DATA IN
28
VPP
DS20005886A-page 8
Latch enable pin
Logic supply voltage
Data input pin
High-voltage power supply
2020 Microchip Technology Inc.
HV66
TABLE 2-2:
Pin Number
44-LEAD PLCC PIN FUNCTION TABLE (CONTINUED)
Pin Name
Description
29
BPOUT
Black plane output
30
HVOUT1
High-voltage output
31
HVOUT2
High-voltage output
32
HVOUT3
High-voltage output
33
HVOUT4
High-voltage output
34
HVOUT5
High-voltage output
35
HVOUT6
High-voltage output
36
HVOUT7
High-voltage output
37
HVOUT8
High-voltage output
38
HVOUT9
High-voltage output
39
HVOUT10
High-voltage output
40
HVOUT11
High-voltage output
41
HVOUT12
High-voltage output
42
HVOUT13
High-voltage output
43
HVOUT14
High-voltage output
44
HVOUT15
High-voltage output
2020 Microchip Technology Inc.
DS20005886A-page 9
HV66
3.0
FUNCTIONAL DESCRIPTION
Follow the steps in Table 3-1 to power up and power
down the HV66.
TABLE 3-1:
POWER-UP AND POWER-DOWN SEQUENCE
Power-up
Step
Power-down
Description
Step
1
Connect ground.
2
Apply VDD.
3
Set all inputs (Data, CLK, EN, etc.) to a known state.
4
Apply VPP. (Note 1)
Note 1: The VPP should not drop below VDD during operation.
TABLE 3-2:
Description
Remove VPP. (Note 1)
Remove all inputs.
Remove VDD.
Disconnect ground.
1
2
3
4
TRUTH FUNCTION TABLE
Inputs
Function
Data
CLK
LE
BL
Outputs
POL
DIR
Shift Register
1
Load S/R,
R/L Shift
Load
Latches
Transparent
Mode
Blank
Control
Note:
2...32
High-voltage
Output
1
2...32
Data Out
BPOUT
*
L or H
↑
L
Ignore Ignore
H
Data → Q1... → Q32
Ignore
Q32
Ignore
L or H
↑
L
Ignore Ignore
L
Q1←...Q32 ← Data
Ignore
Q1
Ignore
X
H or L
H
H
H
X
*...*
*...*
No Change
H
X
H or L
H
H
L
X
*...*
*...*
No Change
L
L or H
↑
H
H
H
H
Data → Q1... → Q32
*...*
Q32
H
L or H
↑
H
H
L
H
Data → Q1... → Q32
*...*
Q32
L
L or H
↑
H
H
H
L
Q1←...Q32 ← Data
*...*
Q1
H
L or H
↑
H
H
L
L
Q1←...Q32 ← Data
*...*
Q1
L
X
X
X
L
L
X
X
L...L
Ignore
L
X
X
X
L
H
X
X
H...H
Ignore
H
H = High-logic level
L = Low-logic level
X = Irrelevant
Ignore = The state of the specific input or output is irrelevant to demonstrate the occurred event.
↑ = Low-to-high transition
* = Dependent on the previous stage’s state before the last CLK or last LE high
DS20005886A-page 10
2020 Microchip Technology Inc.
HV66
4.0
PACKAGE MARKING INFORMATION
4.1
Packaging Information
44-lead PQFP
Example
XXXXXX
e3 YYWWNNN
HV66PG
e3 2011221
44-lead PLCC
XXXXXX
e3 YYWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Example
HV66PJ
e3 2015950
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
2020 Microchip Technology Inc.
DS20005886A-page 11
HV66
44-Lead PQFP Package Outline (PG)
10.00x10.00mm body, 2.35mm height (max), 0.80mm pitch
D
D1
E
E1
Note 1
(Index Area
D1/4 x E1/4)
44
1
b
e
Top View
View B
A
L2
A2
Gauge
Plane
Seating
Plane
L
A1
θ
L1
Side View
Seating
Plane
View B
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Note:
1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEH DPROGHGPDUNLGHQWL¿HU DQHPEHGGHGPHWDOPDUNHU RU
a printed indicator.
Symbol
MIN
Dimension
NOM
(mm)
MAX
A
A1
A2
b
D
D1
E
E1
1.95*
0.00
1.95
0.30
13.65*
9.80*
13.65*
9.80*
-
-
2.00
-
13.90
10.00
13.90
10.00
2.35
0.25
2.10
0.45
14.15*
10.20* 14.15* 10.20*
e
L
L1
L2
0.80
BSC
0.88
1.03
ș
0O
0.73
1.95
REF
0.25
BSC
3.5O
7O
JEDEC Registration MO-112, Variation AA-2, Issue B, Sep.1995.
7KLVGLPHQVLRQLVQRWVSHFL¿HGLQWKH-('(&GUDZLQJ
Drawings not to scale.
S
D
# DSPD 44PQFPPG V i C041309
DS20005886A-page 12
2020 Microchip Technology Inc.
HV66
44-Lead PLCC Package Outline (PJ)
.653x.653in body, .180in height (max), .050in pitch
D
D1
1 44
.048/.042 x 45O
6
.150 MAX
.056/.042 x 45O
40
Note 1
(Index Area)
.075 MAX
E1
E
Note 2
.020max
(3 Places)
Top View
Vertical Side View
View B
b1
A
Base
Plane
A2
.020 MIN
Seating
Plane
e
A1
b
Horizontal Side View
R
View B
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Notes:
1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEH DPROGHGPDUNLGHQWL¿HU DQHPEHGGHGPHWDOPDUNHU RU
a printed indicator.
2. $FWXDOVKDSHRIWKLVIHDWXUHPD\YDU\
Symbol
Dimension
(inches)
A
A1
A2
b
b1
D
D1
E
E1
MIN
.165
.090
.062
.013
.026
.685
.650
.685
.650
NOM
.172
.105
-
-
-
.690
.653
.690
.653
MAX
.180
.120
.083
.021
.036†
.695
.656
.695
.656
e
R
.025
.050
BSC
.035
.045
JEDEC Registration MS-018, Variation AC, Issue A, June, 1993.
† This dimension differs from the JEDEC drawing.
Drawings not to scale.
2020 Microchip Technology Inc.
DS20005886A-page 13
HV66
NOTES:
DS20005886A-page 14
2020 Microchip Technology Inc.
HV66
APPENDIX A:
REVISION HISTORY
Revision A (January 2020)
• Converted Supertex Doc # DSFP-HV66 to
Microchip DS20005886A
• Removed “HVCMOS® Technology”
from the Features section
• Changed the package marking format
• Updated the 44-lead PQFP PG M919 and
44-lead PLCC PJ M903 media types
• Made minor changes throughout the document
2020 Microchip Technology Inc.
DS20005886A-page 15
HV66
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
PART NO.
Device
XX
-
Package
Options
X
-
Environmental
X
Media Type
Device:
HV66
=
32-Channel LCD Driver with Separate
Backplane Output
Packages:
PG
=
44-lead PQFP
PJ
=
44-lead PLCC
Environmental:
G
=
Lead (Pb)-free/RoHS-compliant Package
Media Types:
(blank)
=
96/Tray for a PG Package
(blank)
=
27/Tube for a PJ Package
DS20005886A-page 16
Examples:
a) HV66PG-G:
32-Channel LCD Driver with
Separate Backplane Output,
44-lead PQFP, 96/Tray
b) HV66PJ-G:
32-Channel LCD Driver with
Separate Backplane Output,
44-lead PLCC, 27/Tube
2020 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, Adaptec,
AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT,
chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex,
flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck,
LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi,
Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer,
PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire,
Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST,
SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,
TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA
are registered trademarks of Microchip Technology Incorporated in
the U.S.A. and other countries.
APT, ClockWorks, The Embedded Control Solutions Company,
EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load,
IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision
Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire,
SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub,
TimePictra, TimeProvider, Vite, WinPath, and ZL are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard,
CryptoAuthentication, CryptoAutomotive, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
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ZENA are trademarks of Microchip Technology Incorporated in the
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SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage
Technology, and Symmcom are registered trademarks of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany
II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
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All other trademarks mentioned herein are property of their
respective companies.
© 2020, Microchip Technology Incorporated, All Rights Reserved.
For information regarding Microchip’s Quality Management Systems,
please visit www.microchip.com/quality.
2020 Microchip Technology Inc.
ISBN:978-1-5224-5507-3
DS20005886A-page 17
Worldwide Sales and Service
AMERICAS
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DS20005886A-page 18
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05/14/19
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