HV7022PJ-C-G

Supertex inc. HV7022C 34-Channel Symmetric Row Driver Features General Description ►► HVCMOS® technology ►► Symmetric row drive (reduces latent imaging in ACTFEL displays) ►► Output voltage up to +230V ►► Low power level shifting ►► Source/sink current minimum 70mA ►► Shift register speed 4.0MHz ►► Pin-programmable shift direction The HV7022C is a low-voltage serial to high-voltage parallel converter with push-pull outputs. It is especially suited for use as a symmetric row driver in AC thin-film electroluminescent (ACTFEL) displays. The HV7022C offers 34 output lines, a direction (DIR) pin to give CW or CCW shift register loading, output enable (OE), and polarity (POL) control. After data is entered (on the falling edge of CLK), a logic high will cause the output to swing to VPP if POL is high, or to GND if POL is low. Functional Block Diagram VPP OE POL VDD P Level Translator DATA INPUT HVOUT1 N P CLK S/R Level Translator HVOUT2 N DIR P Level Translator DATA OUT HVOUT34 N GND Doc.# DSFP-HV7022C B041111 Supertex inc. www.supertex.com HV7022C Ordering Information Package Options Device 44-Lead Quad Cerpac Chip Carrier HV7022-C HV7022DJ-C* 44-Lead PLCC .653x.653in body .180in height (max) .050in pitch .650x.650in body .190in height (max) .050in pitch HV7022PJ-C-G -G indicates package is RoHS compliant (‘Green’) * Hi-Rel process flow available. Pin Configuration Absolute Maximum Ratings Parameter Supply voltage, VDD -0.3V to +15V Supply voltage, VPP -0.3V to +250V Logic input levels 1 44 40 -0.3V to VDD +0.3V Ground current1 Continuous total power dissipation Plastic Ceramic 6 Value 1.5A 44-Lead Quad Cerpac Chip Carrier (DJ) (top view) 2 1200mW 1500mW Operating temperature range Plastic Ceramic -40OC to +85OC -55OC to +125OC Storage temperature range -65OC to +150OC 6 1 44 40 44-Lead PLCC (PJ) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. (top view) Product Marking Top Marking Notes: 1. Duty cycle is limited by the total power dissipated in the package. 2. For operation above 25°C ambient derate linearly to maximum operating temperature at 25mW/°C for plastic and at 15mW/°C for ceramic. YYWW HV7022DJ-C LLLLLLLLLL Bottom Marking CCCCCCCCCCC AAA YY = Year Sealed WW = Week Sealed L = Lot Number C = Country of Origin* A = Assembler ID* *May be part of top marking Package may or may not include the following marks: Si or 44-Lead Quad Cerpac Chip Carrier (DJ) Top Marking YYWW AAA HV7022PJ-C LLLLLLLLLL Bottom Marking CCCCCCCCCCC YY = Year Sealed WW = Week Sealed L = Lot Number A = Assembler ID C = Country of Origin* = “Green” Packaging *May be part of top marking Package may or may not include the following marks: Si or 44-Lead PLCC (PJ) Doc.# DSFP-HV7022C B041111 2 Supertex inc. www.supertex.com HV7022C Recommended Operating Conditions Sym Parameter Min Max Units VDD Logic supply voltage 10.8 13.2 V VPP High voltage supply - 230 V VIH High-level input voltage VDD = 10.8 8.1 - VDD = 13.2 9.9 - VIL Low-level input voltage VDD = 10.8 - 2.7 VDD = 13.2 - 3.3 fCLK Clock frequency - 4.0 TA Operating free-air temperature Plastic -40 +85 Ceramic -55 +125 IOD Allowable pulsed current through output diode - ±300 V V MHz °C mA Power-up sequence should be the following: 1. 2. 3. 4. Connect ground. Apply VDD. Set all inputs (Data, CLK, Enable, etc.) to a known state. Apply VPP. (The VPP should not drop below VDD or float during operation.) Power-down sequence should be the reverse of the above. DC Electrical Characteristics (over recommended operating conditions of V Sym IDD IPP Parameter VDD supply current VPP supply current DD = 12V, VPP = 230V, and TA = 25°C unless noted) Min Max Units Conditions - 10 mA fCLK = 4.0MHz, VDD =13.2V - 4.0 mA One output high1 - 100 All outputs low or High-Z µA All outputs low or High-Z (125OC) - 750 - 100 µA All VIN = GND or VDD HVOUT 195 - V IO = -70mA DATA OUT 11 - V IO = -500µA HVOUT - 30 V IO = +70mA DATA OUT - 1.0 V IO = +500µA IDDQ Quiescent VDD supply current VOH High-level output VOL Low-level output IIH High-level logic input current - 1.0 µA VIH = 12V IIL Low-level logic input current - -1.0 µA VIL = 0V Note: 1. The total number of ON outputs times the duty cycle must not exceed the allowable package power dissipation. Doc.# DSFP-HV7022C B041111 3 Supertex inc. www.supertex.com HV7022C AC Electrical Characteristics (V DD Sym = 12V and TA = 25°C) Min Max Units Conditions - 4.0 MHz --- Pulse duration clock width high or low 125 - ns --- tSUD Data set-up time before falling clock 100 - ns --- tHD Data hold time after falling clock 100 - ns --- tSUC Setup time clock low before VPP↑ or GND↓ 300 - ns --- tSUE Setup time enable high before VPP↑ or GND↓ 300 - ns --- tSUP Setup time polarity high or low before VPP↑ or GND↓ 300 - ns --- tHC Hold time clock high after VPP↑ or GND↓ 500 - ns --- tHE Hold time enable high after VPP↑ or GND↓ 300 - ns --- tHP Hold time polarity high or low after VPP↑ or GND↓ 300 - ns --- tDHL Delay time high to low-level output from clock - 150 ns CL = 10pF tDLH Delay time low to high-level output from clock - 200 ns CL = 10pF tTHL Transition time high to low-level serial output - 200 ns CL = 15pF tTLH Transition time low to high-level serial output - 100 ns CL = 15pF tONH High-level turn-on time HVOUT from enable - 500 ns VOH = 195V, RL = 2.0kΩ to 95V tONL Low-level turn-on time HVOUT from enable - 500 ns VOH = 130V, RL = 2.0kΩ to 30V tOFFH High-level turn-off time HVOUT from enable - 1000 ns VOH = 195V, RL = 2.0kΩ to 95V tOFFL Low-level turn-off time HVOUT from enable - 500 ns VOH = 130V, RL = 2.0kΩ to 30V SR Slew rate, VPP or GND - 45 V/µs fCLK tWH, tWL Parameter Clock frequency One active output driving 4.7nF load to VPP or GND Function Table I/O Relations Inputs Outputs CLK DIR DATA POL OE Shift Reg HVOUT DATA OUT O/P HIGH X X H H H * H * O/P OFF X X L H H * HIGH-Z * O/P LOW X X H L H * L * O/P OFF X X L L H * HIGH-Z * O/P OFF X X X X L * All O/P HIGH-Z * ↓ L X X X Qn →Qn+1 * Q34 ↓ H X X X Qn →Qn-1 * Q1 No ↓ X X X X * No Change No Change Load S/R, set DIR Notes: H = logic high level, L = logic low level, X = irrelevant, ↓ = high-to-low transition Q1 = HVOUT1, Qn = HVOUTn, etc. * = dependent on previous state and whether an O/P or S/R command occurred. Doc.# DSFP-HV7022C B041111 4 Supertex inc. www.supertex.com HV7022C HVOUT Characteristics Temp = 25OC 180 140 VDD = 12V 100 I (mA) 140 I (mA) Temp = 25OC 180 VDD = 14V VDD = 10V 60 VPP > 40V VDD = 12V & 14V 100 60 20 20 0 20 40 Volts 60 80 100 0 Output N-Channel Characteristics through FET 20 40 60 Volts (VPP - HVOUT) 80 100 Output P-Channel Characteristics through FET Input and Output Equivalent Circuits VDD VDD VPP DATA INPUT DATA OUT GND Logic Inputs Doc.# DSFP-HV7022C B041111 GND Logic Data Output 5 HVOUT GND High Voltage Outputs Supertex inc. www.supertex.com HV7022C Switching Waveforms 1/fCLK tWL CLK 50% 50% tSUD DATA INPUT tWH VIL tHD 50% VIH 50% VIL tDLH DATA OUT VIH 50% tDHL 90% 10% 90% tTLH tTHL VOH 10% VOL VOH HVOUT P-CH 10% tSUC VOL tHC VOH 90% HVOUT N-CH VOL POL 50% VIH 50% VIL 90% VOH HVOUT N-CH tSUP HVOUT P-CH SUP tSUE HVOUT High Impedence VOL VIL tHE VOH 90% 10% tOFFH High Impedence 90% 10% tOFFL tONL Doc.# DSFP-HV7022C B041111 VIH 50% tONH HVOUT VOH 10% 50% OE VOL tHP 6 VOL VOH VOL Supertex inc. www.supertex.com HV7022C Pin Descriptions Pin # Function Pin # Function 1 HVOUT18/17 23 DIR 2 HVOUT17/18 24 VDD 3 HVOUT16/19 25 POL 4 HVOUT15/20 26 DATA INPUT 5 HVOUT14/21 27 VPP 6 HVOUT13/22 28 NC 7 HVOUT12/23 29 HVOUT34/1 8 HVOUT11/24 30 HVOUT33/2 9 HVOUT10/25 31 HVOUT32/3 10 HVOUT9/26 32 HVOUT31/4 11 HVOUT8/27 33 HVOUT30/5 12 HVOUT7/28 34 HVOUT29/6 13 HVOUT6/29 35 HVOUT28/7 14 HVOUT5/30 36 HVOUT27/8 15 HVOUT4/31 37 HVOUT26/9 16 HVOUT3/32 38 HVOUT25/10 17 HVOUT2/33 39 HVOUT24/11 18 HVOUT1/34 40 HVOUT23/12 19 DATA OUT 41 HVOUT22/13 20 OE 42 HVOUT21/14 21 CLK 43 HVOUT20/15 22 GND 44 HVOUT19/16 Note: Pin designation for DIR H/L Example: For DIR = H, pin 1 is HVOUT18 For DIR = L, pin 1 is HVOUT17 Doc.# DSFP-HV7022C B041111 7 Supertex inc. www.supertex.com HV7022C 44-Lead Quad Cerpac Package Outline (DJ) .650x.650in body, .190in height (max), .050in pitch .040 x 45O D D1 1 44 6 .035 x 45O 40 .150 max Note 1 (Index Area) .075 max E1 0.25 max 3 Places E Vertical Side View Top View View B b1 .025 MIN A A2 Seating Plane e A1 b View B Horizontal Side View Note: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol Dimension (inches) A A1 MIN .155 .090 NOM .172 .100 MAX .190 .120 A2 .060 REF b b1 D D1 E E1 .017 .026 .685 .630 .685 .630 .019 .029 .690 .650 .690 .650 .021 .032 .695 .665 .695 .665 e .050 BSC JEDEC Registration MO-087, Variation AB, Issue B, August, 1991. Drawings not to scale. Supertex Doc. #: DSPD-44CERPACDJ, Version D090808. Doc.# DSFP-HV7022C B041111 8 Supertex inc. www.supertex.com HV7022C 44-Lead PLCC Package Outline (PJ) .653x.653in body, .180in height (max), .050in pitch D D1 .048/.042 x 45O 1 44 6 .150max .056/.042 x 45O 40 Note 1 (Index Area) .075max E E1 Note 2 e .020max (3 Places) Top View Vertical Side View View B b1 A A1 Base .020min Plane A2 Seating Plane b Horizontal Side View R View B Notes: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. 2. Actual shape of this feature may vary. Symbol Dimension (inches) A A1 A2 b b1 D D1 E E1 MIN .165 .090 .062 .013 .026 .685 .650 .685 .650 NOM .172 .105 - - - .690 .653 .690 .653 MAX .180 .120 .083 .021 .036† .695 .656 .695 .656 e .050 BSC R .025 .035 .045 JEDEC Registration MS-018, Variation AC, Issue A, June, 1993. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc. #: DSPD-44PLCCPJ, Version F031111. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-HV7022C B041111 9 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com