HV7224
40-Channel Symmetric Row Driver
Features
General Description
• Symmetric Row Drive
• Reduces Latent Imaging in AC Thin Film
Electroluminescent (ACTFEL) Displays
• Up to +240V Output Voltage
• Low-Power Level Shifting
• 70 mA minimum Source and Sink Current
• 3 MHz Shift Register Speed
• Pin-Programmable Shift Direction (DIR, SHIFT)
The HV7224 is a low-voltage to high-voltage
serial-to-parallel converter with push-pull outputs. It is
especially suitable for use as a symmetric row driver in
ACTFEL displays.
Applications
• Display Driver
When the data reset pin (DRIOA/DRIOB) is at logic high,
it will reset all the outputs of the internal Shift register to
zero. At the same time, the output of the Shift register
will start shifting a logic high from the Least Significant
bit to the Most Significant bit. The DRIOA/DRIOB can be
triggered at any time. The DIR and shift pins control the
direction of data shift through the device. When DIR is
at logic high, DRIOA is the input and DRIOB is the
output. When DIR is grounded, DRIOB is the input and
the DRIOA is the output. (See Table 3-3 for output
sequence.) The Polarity (POL) and Output Enable (OE)
pins perform the polarity select and output enable
function respectively. Data is loaded on the low-to-high
transition of the clock. A logic high will cause the output
to swing to VPP if POL is high, or to GND if POL is low.
All outputs will be in High-Z state if OE is at logic high.
Data output buffers are provided for cascading devices.
Package Type
64-lead PQFP
(Top view)
64
1
See Table 2-1 and Table 2-2 for pin information.
2020 Microchip Technology Inc.
DS20005895A-page 1
HV7224
Functional Block Diagram
VPP
OE
POL
VDD
P
Level
Translator
DRIOA
HVOUT1
N
SHIFT
P
CLK
S/R
Level
Translator
DIR
HVOUT2
N
P
DRIOB
Level
Translator
HVOUT40
N
GND
DS20005895A-page 2
2020 Microchip Technology Inc.
HV7224
Typical Application Circuit
2020 Microchip Technology Inc.
DS20005895A-page 3
HV7224
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Supply Voltage, VDD .................................................................................................................................. –0.5V to +7V
High-Voltage Supply Voltage, VPP ......................................................................................................... –0.5V to +260V
Logic Input Levels ............................................................................................................................ –0.5V to VDD+0.5V
Maximum Junction Temperature, TJ(MAX) ........................................................................................................... +125°C
Storage Temperature, TS .................................................................................................................... –65°C to +150°C
Continuous Total Power Dissipation:
64-lead PQFP (Note 1) ............................................................................................................................ 1200 mW
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
Note 1: For operations above 25°C ambient, derate linearly to maximum operating temperature at 20 mW/°C.
RECOMMENDED OPERATING CONDITIONS
Parameter
Sym.
Min.
Typ.
Max.
Unit
Logic Supply Voltage
VDD
4.5
—
5.5
V
High-Voltage Supply Voltage
VPP
0
—
240
V
High-Level Input Voltage
VIH
0.7 VDD
—
VDD
V
Low-Level Input Voltage
VIL
0
—
0.2 VDD
V
Clock Frequency
fCLK
—
—
3
MHz
Operating Ambient Temperature
TA
–40
—
+85
°C
High-Voltage Output Current
IO
—
—
±70
mA
Allowable Current through Output Diodes
IO
—
—
±300
mA
Note 1:
Conditions
Note 1
Output will not switch at VPP = 0V.
DS20005895A-page 4
2020 Microchip Technology Inc.
HV7224
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: Over recommended operating conditions unless otherwise stated, VDD = 5V, VPP = 240V,
TA = 25°C.
Parameter
Sym.
Min.
Typ. Max.
Unit
Conditions
VDD Supply Current
IDD
—
—
10
mA
fCLK = 3 MHz, VDD = 5.5V
VPP Supply Current
IPP
—
—
2
mA
All outputs low or High-Z
—
—
4
mA
One output high (Note 1)
Quiescent VDD Supply Current
IDDQ
—
—
100
µA
All VIN = GND or VDD
High-Level Logic Input Current
IIH
—
—
1
µA
VIH = VDD
Low-Level Logic Input Current
IIL
—
—
–1
µA
VIL = 0V
190
—
—
V
IO = –70 mA
4.5
—
—
V
IO = –100 µA
—
—
50
V
IO = 70 mA
—
—
0.5
V
IO = 100 µA
–80
—
—
mA
75
—
—
mA
High-Level Output Voltage
Low-Level Output Voltage
HVOUT Saturation Current
Note 1:
HVOUT
Data Out
HVOUT
Data Out
P-channel
N-channel
VOH
VOL
ISAT
Only one output can be turned on at a time.
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: VDD = 5V and TA = 25°C.
Parameter
Clock Frequency
Sym.
Min.
fCLK
—
Typ. Max. Unit
—
3
Conditions
MHz Per register, CL = 15 pF
tWL, tWH
150
—
—
ns
Data Setup Time before Clock Rises
tSUD
50
—
—
ns
Data Hold Time after Clock Rises
tHD
50
—
—
ns
HVOUT Delay from Clock Rises
(High-Z to H or L)
tSUC
—
—
1
µs
CL = 330 pF // RL = 10 kΩ
HVOUT Delay from Output Enable OE Falls
tSUE
—
—
600
ns
CL = 330 pF // RL = 10 kΩ
HVOUT Delay from Clock Rises
(H or L to High-Z)
tHC
—
—
2
µs
CL = 330 pF // RL = 10 kΩ
HVOUT Delay from Output Enable OE Falls
tHE
—
—
600
ns
CL = 330 pF // RL = 10 kΩ
Delay Time Clock to Data Output Falls
tDHL
—
—
250
ns
Delay Time Clock to Data Output Rises
tDLH
—
—
250
ns
CL = 15 pF (Note 1)
HVOUT Fall Time
tONF
—
—
2
µs
CL = 330 pF // RL = 10 kΩ
HVOUT Rise Time
tONR
—
—
2
µs
CL = 330 pF // RL = 10 kΩ
POL Pulse Width
tPOW
3
—
—
µs
Output Enable OE Pulse Width
tOEW
3
—
—
µs
SR
—
—
45
V/µs
Clock Width, High or Low
Slew Rate, VPP
Note 1:
CL = 15 pF (Note 1)
One active output driving
4.7 nF load
The delay is measured from the trailing edge of the clock but the data is triggered by the rising edge of the
clock. There is an internal delay for the data output which is equal to tWH.
2020 Microchip Technology Inc.
DS20005895A-page 5
HV7224
TEMPERATURE SPECIFICATIONS
Parameter
Sym.
Min.
Typ. Max.
Unit
TA
–40
—
+85
°C
Conditions
TEMPERATURE RANGE
Operating Ambient Temperature
TS
–65
—
+150
°C
TJ(MAX)
–65
—
+150
°C
JA
—
41
—
°C/W
Storage Temperature
Maximum Junction Temperature
PACKAGE THERMAL RESISTANCE
64-lead PQFP
Timing Waveforms
1/fCLK
tWL
tWH
VIH
CLK
50%
50%
50%
50%
VIL
Data Reset Input
(DRIOA/DRIOB)
tSUD
tHD
50%
Data
Valid
VIH
Data
Valid
50%
VIL
tDLH
tDHL
VOH
Data Reset Output
(DRIOA/DRIOB)
50%
50%
tSUC
HVOUT
(POL = H)
VOL
tHC
tONR
90%
90%
VOH
10%
High Impedance
High Impedance
90%
HVOUT
(POL = L)
10%
tONF
tSUC
10%
VOL
tHC
tPOW
50%
POL
VIH
50%
VIL
tOEW
VIH
OE
50%
50%
VIL
tSUE
tONR
tHE
VOH
90%
90%
HVOUT
10%
High Impedance
High Impedance
90%
HVOUT
10%
tSUE
tONF
DS20005895A-page 6
10%
VOL
tHE
2020 Microchip Technology Inc.
HV7224
2.0
PIN DESCRIPTION
The two pin function options for the HV7224
64-lead PQFP are specified in Table 2-1 and Table 2-2.
Refer to Package Type for the location of pins.
TABLE 2-1:
OPTION A PIN FUNCTION TABLE
Pin Number
Pin Name
1
HVOUT1/40
High-voltage output
2
HVOUT2/39
High-voltage output
3
HVOUT3/38
High-voltage output
4
HVOUT4/37
High-voltage output
5
HVOUT5/36
High-voltage output
6
HVOUT6/35
High-voltage output
7
HVOUT7/34
High-voltage output
8
HVOUT8/33
High-voltage output
9
HVOUT9/32
High-voltage output
10
HVOUT10/31
High-voltage output
11
HVOUT11/30
High-voltage output
12
HVOUT12/29
High-voltage output
13
HVOUT13/28
High-voltage output
14
HVOUT14/27
High-voltage output
15
HVOUT15/26
High-voltage output
16
HVOUT16/25
High-voltage output
17
HVOUT17/24
High-voltage output
18
HVOUT18/23
High-voltage output
19
HVOUT19/22
High-voltage output
20
HVOUT20/21
High-voltage output
21
VPP
High-voltage power supply
22
NC
No connection
23
GND (Power)
High-voltage supply ground
24
GND (Logic)
Logic supply ground
25
DIR
Direction pin
26
VDD
Logic supply voltage
27
CLK
Clock pin
28
NC
No connection
29
SHIFT
30
NC
31
DRIOA
32
NC
No connection
33
NC
No connection
34
DRIOB
Note:
Description
Shift pin
No connection
Data reset pin A
Data reset pin B
Pin designation for DIR H/L, Shift = L.
Example: For DIR = H, Pin 1 is HVOUT1
For DIR = L, Pin 1 is HVOUT40
2020 Microchip Technology Inc.
DS20005895A-page 7
HV7224
TABLE 2-1:
OPTION A PIN FUNCTION TABLE (CONTINUED)
Pin Number
Pin Name
35
OE
Output Enable pin
36
NC
No connection
37
POL
Polarity pin
38
NC
No connection
39
VDD
40
NC
41
GND (Logic)
Logic supply ground
42
GND (Power)
High-voltage supply ground
43
NC
No connection
44
VPP
High-voltage power supply
45
HVOUT21/20
High-voltage output
46
HVOUT22/19
High-voltage output
47
HVOUT23/18
High-voltage output
48
HVOUT24/17
High-voltage output
49
HVOUT25/16
High-voltage output
50
HVOUT26/15
High-voltage output
51
HVOUT27/14
High-voltage output
52
HVOUT28/13
High-voltage output
53
HVOUT29/12
High-voltage output
54
HVOUT30/11
High-voltage output
55
HVOUT31/10
High-voltage output
56
HVOUT32/9
High-voltage output
57
HVOUT33/8
High-voltage output
58
HVOUT34/7
High-voltage output
59
HVOUT35/6
High-voltage output
60
HVOUT36/5
High-voltage output
61
HVOUT37/4
High-voltage output
62
HVOUT38/3
High-voltage output
63
HVOUT39/2
High-voltage output
64
HVOUT40/1
High-voltage output
Note:
Description
Logic supply voltage
No connection
Pin designation for DIR H/L, Shift = L.
Example: For DIR = H, Pin 1 is HVOUT1
For DIR = L, Pin 1 is HVOUT40
DS20005895A-page 8
2020 Microchip Technology Inc.
HV7224
TABLE 2-2:
Pin Number
OPTION B PIN FUNCTION TABLE
Pin Name
Description
1
HVOUT20/21
High-voltage output
2
HVOUT19/22
High-voltage output
3
HVOUT18/23
High-voltage output
4
HVOUT17/24
High-voltage output
5
HVOUT16/25
High-voltage output
6
HVOUT15/26
High-voltage output
7
HVOUT14/27
High-voltage output
8
HVOUT13/28
High-voltage output
9
HVOUT12/29
High-voltage output
10
HVOUT11/30
High-voltage output
11
HVOUT10/31
High-voltage output
12
HVOUT9/32
High-voltage output
13
HVOUT8/33
High-voltage output
14
HVOUT7/34
High-voltage output
15
HVOUT6/35
High-voltage output
16
HVOUT5/36
High-voltage output
17
HVOUT4/37
High-voltage output
18
HVOUT3/38
High-voltage output
19
HVOUT2/39
High-voltage output
20
HVOUT1/40
High-voltage output
21
VPP
High-voltage power supply
22
NC
23
GND (Power)
High-voltage supply ground
No connection
24
GND (Logic)
Logic supply ground
25
DIR
Direction pin
26
VDD
Logic supply voltage
27
CLK
Clock pin
28
NC
No connection
29
SHIFT
Shift pin
30
NC
31
DRIOA
No connection
32
NC
No connection
33
NC
No connection
34
DRIOB
35
OE
Output enable pin
36
NC
No connection
37
POL
Polarity pin
38
NC
No connection
39
VDD
Data reset pin A
Data reset pin B
Logic supply voltage
Note: Pin designation for DIR H/L, Shift = H.
Example: For DIR = H, Pin 1 is HVOUT20
For DIR = L, Pin 1 is HVOUT21
2020 Microchip Technology Inc.
DS20005895A-page 9
HV7224
TABLE 2-2:
Pin Number
OPTION B PIN FUNCTION TABLE (CONTINUED)
Pin Name
Description
40
NC
41
GND (Logic)
No connection
Logic supply ground
42
GND (Power)
Ground power
43
NC
No connection
44
VPP
High-voltage power supply
45
HVOUT40/1
High-voltage output
46
HVOUT39/2
High-voltage output
47
HVOUT38/3
High-voltage output
48
HVOUT37/4
High-voltage output
49
HVOUT36/5
High-voltage output
50
HVOUT35/6
High-voltage output
51
HVOUT34/7
High-voltage output
52
HVOUT33/8
High-voltage output
53
HVOUT32/9
High-voltage output
54
HVOUT31/10
High-voltage output
55
HVOUT30/11
High-voltage output
56
HVOUT29/12
High-voltage output
57
HVOUT28/13
High-voltage output
58
HVOUT27/14
High-voltage output
59
HVOUT26/15
High-voltage output
60
HVOUT25/16
High-voltage output
61
HVOUT24/17
High-voltage output
62
HVOUT23/18
High-voltage output
63
HVOUT22/19
High-voltage output
64
HVOUT21/20
High-voltage output
Note: Pin designation for DIR H/L, Shift = H.
Example: For DIR = H, Pin 1 is HVOUT20
For DIR = L, Pin 1 is HVOUT21
DS20005895A-page 10
2020 Microchip Technology Inc.
HV7224
3.0
FUNCTIONAL DESCRIPTION
Follow the steps in Table 3-1 to power up and power
down the HV7224.
TABLE 3-1:
POWER-UP AND POWER-DOWN SEQUENCE
Power-Up
Step
Power-Down
Description
Step
1
Connect ground.
2
Apply VDD.
3
Set all inputs (Data, CLK, EN, etc.) to a known state.
4
Apply VPP. (Note 1)
Note 1: The VPP should not drop below VDD during operation.
TABLE 3-2:
Description
Remove VPP. (Note 1)
Remove all inputs.
Remove VDD.
Disconnect ground.
1
2
3
4
TRUTH FUNCTION TABLE
Inputs
I/O Relations
CLK
DIR
S/R DATA
POL
High-voltage Outputs
OE
O/P HIGH
X
X
H
H
L
H
O/P OFF
X
X
L
X
L
High-Z
O/P LOW
X
X
H
L
L
L
O/P OFF
X
X
X
X
H
All O/P High-Z
Note:
H = High-logic level
L = Low-logic level
X = Irrelevant
Data input (DRIO) loaded on the low-to-high transition of the clock.
Only one active output can be set at a time.
TABLE 3-3:
OUTPUT SEQUENCE OPERATION TABLE
DIR
SHIFT
Data Reset In
Data Reset Out
HVOUT # Sequence
L
L
DRIOB
DRIOA (Note 2)
40 → 1
H
L
DRIOA
DRIOB (Note 3)
1 → 40
L
H
DRIOB
DRIOA (Note 2)
20 → 1 → 40 → 21
H
H
DRIOA
DRIOB (Note 3)
21 → 40 → 1 → 20
Note 1:
2:
3:
Direction (Note 1)
Reference to package outline or chip layout drawing
DRIOA is DRIOB delayed by 40 clock pulses.
DRIOB is DRIOA delayed by 40 clock pulses.
VDD
VPP
VDD
DATA
OUT
GND
(Logic)
GND
(Logic)
Logic Inputs
FIGURE 3-1:
HVOUT
GND
(Power)
Logic Data Output
High Voltage Outputs
Input and Output Equivalent Circuits.
2020 Microchip Technology Inc.
DS20005895A-page 11
HV7224
4.0
PACKAGE MARKING INFORMATION
4.1
Packaging Information
64-lead PQFP
XXXXXXXX e3
YYWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS20005895A-page 12
Example
HV7224PG e3
2037682
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
2020 Microchip Technology Inc.
HV7224
64-Lead PQFP (3-Sided) Package Outline (PG)
20.00x14.00mm body, 3.40mm height (max), 0.80mm pitch, 3.90mm footprint
D
D1
L3
64
E
E1
Note 1
(Index Area
D1/4 x E1/4)
θ1
Note 2
1
e
b
Top View
L2
View B
A A2
L
L1
Seating
Plane
A1
Gauge
Plane
Seating
Plane
θ
View B
Side View
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Note:
1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEH DPROGHGPDUNLGHQWL¿HU DQHPEHGGHGPHWDOPDUNHU RU
DSULQWHGLQGLFDWRU
2. 7KHOHDGVRQWKLVVLGHDUHWULPPHG
Symbol
Dimension
(mm)
A
A1
A2
b
MIN
2.80
0.25
2.55
0.30
NOM
-
-
2.80
-
MAX
3.40
0.50
3.05
0.45
D
D1
E
E1
22.25 19.80 17.65 13.80
e
L
L1
L2
L3
ș
O
0.73
0
0.80
1.95 0.25 0.55
22.50 20.00 17.90 14.00
0.88
3.5O
BSC
REF BSC REF
22.75 20.20 18.15 14.20
1.03
7O
ș
5O
16O
Drawings not to scale.
2020 Microchip Technology Inc.
DS20005895A-page 13
HV7224
NOTES:
DS20005895A-page 14
2020 Microchip Technology Inc.
HV7224
APPENDIX A:
REVISION HISTORY
Revision A (April 2020)
• Converted Supertex Doc # DSFP-HV7224 to
Microchip DS20005895A
• Removed “HVCMOS® Technology”
in the Features section
• Changed the package marking format
• Made minor changes throughout the document
2020 Microchip Technology Inc.
DS20005895A-page 15
HV7224
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
PART NO.
Device
XX
-
Package
Options
X
-
Environmental
X
Media Type
Device:
HV7224 =
40-Channel Symmetric Row Driver
Package:
PG
=
64-lead PQFP
Environmental:
G
=
Lead (Pb)-free/RoHS-compliant Package
Media Type:
(blank)
=
66/Tray for a PG Package
DS20005895A-page 16
Example:
a) HV7224PG-G:
40-Channel Symmetric Row Driver,
64-lead PQFP, 66/Tray
2020 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, Adaptec,
AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT,
chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex,
flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck,
LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi,
Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer,
PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire,
Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST,
SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,
TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA
are registered trademarks of Microchip Technology Incorporated in
the U.S.A. and other countries.
APT, ClockWorks, The Embedded Control Solutions Company,
EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load,
IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision
Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire,
SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub,
TimePictra, TimeProvider, Vite, WinPath, and ZL are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard,
CryptoAuthentication, CryptoAutomotive, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage
Technology, and Symmcom are registered trademarks of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany
II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2020, Microchip Technology Incorporated, All Rights Reserved.
For information regarding Microchip’s Quality Management Systems,
please visit www.microchip.com/quality.
2020 Microchip Technology Inc.
ISBN: 978-1-5224-5917-0
DS20005895A-page 17
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DS20005895A-page 18
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02/28/20
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