HV853
High Voltage, Low Noise,
Inductorless EL Lamp Driver
Features
General Description
► No external components required when using an
external EL clock frequency
► Audible noise reduction with improved EMI
► EL frequency can be set by an external resistor
► DC to AC converter
► Drives up to 5.3nF (approx. 1.5in2 lamp) load
► Output voltage regulation
► Enable function
► EL Lamp dimming
► Available in 10-Lead DFN and 8-Lead MSOP
packages
The Supertex HV853 is a high voltage, low noise EL
(electroluminescent) lamp driver. It is the low noise version of
the HV852 with improved EMI performance, operating over an
input voltage range of 3.2V to 5.0V. It is designed to drive EL
lamps of up to 1.5in2, with capacitive values up to 5.3nF. The
HV853 converts a low voltage DC input to a high voltage AC
output across an EL lamp. A nominal regulated output voltage
of ±80V is applied to the EL lamp. It uses a charge pump
scheme to boost the input voltage eliminating the need for an
external inductor, diode, and high voltage capacitor commonly
found in conventional topologies.
Applications
►
►
►
►
Cellular phone keypad
Watches
Small handheld wireless devices
MP3 Players
The charge pump circuit discharges its energy into an EL lamp
through a high voltage H-bridge. Once the voltage reaches
its regulated limit, it is turned off to conserve power. The EL
lamp is then discharged to ground and the H-bridge changes
state to allow the charge pump to charge the EL lamp in the
opposite direction.
The EL lamp frequency can be set either by an external
resistor REL or by applying an external clock where the clock
frequency is divided by 128 to set the EL lamp frequency.
Typical Application Circuits
VDD = ON
VDD = ON
GND = OFF
GND = OFF
1
+
VDD
-
CDD
REL 2
3
4
VDD
VA
REL
VB
EN
GND
CLKIN
CLKEN
8
7
6
5
HV853MG
EL Lamp Frequency set by REL
EL
LAMP
1
+
VDD
-
CDD
2
3
4
VDD
GND
VDD
REL
EN
CLKIN
VA
VB
GND
CLKEN
8
7
6
5
EL
LAMP
VDD
HV853MG
EL Lamp Frequency set by External Clock
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
HV853
Ordering Information
Pin Configurations
Package Options
DEVICE
HV853
10-Lead DFN
VDD 1
8-Lead MSOP
3.00x3.00mm body
0.80mm height (max)
0.50mm pitch
3.00x3.00mm body
1.10mm height (max)
0.65mm pitch
HV853K7-G
HV853MG-G
10 VA
REL
2
9
EN
3
8 GND
CLKIN
4
7 GND
NC
5
6
-G indicates package is RoHS compliant (‘Green’)
VB
CLKEN
VDD 1
8 VA
REL 2
7 VB
EN 3
6 GND
CLKIN 4
10-Lead DFN (K7)
(top View)
Note:
Pads are at the bottom of the package.
Center heat slug should be connected to
GND or left floating.
5 CLKEN
8-Lead MSOP (MG)
(top view)
Product Marking
Absolute Maximum Ratings
Parameter
Y = Last Digit of Year Sealed
W = Code for Week Sealed
L = Lot Number
= “Green” Packaging
H853
YWLL
Value
10-Lead DFN (K7)
-0.5V to 6.5V
VDD, supply voltage
Top Marking
-65°C to +150°C
Storage temperature
Power dissipation (10-Lead DFN)
Power dissipation (8-Lead MSOP)
H853
LLLL
1.6W
300mW
Absolute Maximum Ratings are those values beyond which damage to
the device may occur. Functional operation under these conditions is not
implied. Continuous operation of the device at the absolute rating level
may affect device reliability. All voltages are referenced to device ground.
Bottom Marking
YYWW
L = Lot Number
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
8-Lead MSOP(MG)
Recommended Operating Conditions
Sym
Parameter
Min
Typ
Max
Units
VDD
Input voltage
3.2
-
5.0
V
---
fEL
EL lamp frequency
50
-
500
Hz
---
EL lamp capacitance
0
-
5.3
nF
---
-25
-
+85
O
C
---
Min
Typ
Max
Units
-
-
150
nA
Peak output voltage
68
80
92
V
Peak to peak output voltage
136
160
184
V
-
15
30
mA
Peak output voltage
68
80
92
V
Peak to peak output voltage
136
160
184
V
EL lamp frequency
240
280
320
Hz
Cload
TA
Operating temperature
Conditions
Electrical Characteristics
(Over recommended operating conditions unless otherwise specified, TA = 25ºC)
Sym
Parameter
IDDQ
Quiescent current
VA or VB
VA-VB
IDD
VA or VB
VA-VB
fEL
Operating current
Conditions
EN = 0V
No load
See Figure 1
VDD = 3.5V
REL = 1.5MΩ
Load = 3.3nF + 1.0kΩ
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
2
HV853
Electrical Characteristics (cont.)
(Over recommended operating conditions unless otherwise specified, TA = 25ºC)
Sym
Parameter
Min
Typ
Max
Units
Conditions
trout
Output voltage rise time
-
450
-
µs
1.0in2 lamp
0V to 90% of final value
tfout
Output voltage fall time
150
-
-
µs
90% to 10% of final value
Logic Inputs
VIL
Input logic low voltage
0
-
0.5
V
---
VIH
Input logic high voltage
2.0
-
VDD
V
---
IIL
Input logic low current
-
-
1.0
µA
---
IIH
Input logic high current
-
-
1.0
µA
--Using external R-C circuit,
see Figure 2
ENrise
Enable input rise time (for delay turn off)
0.01
-
10
ms
ENfall
Enable input fall time (for delay turn off)
10µ
-
5.0
s
-
-
10
pF
VSENSE
High
Voltage
Level
Translators
Cin
Logic input capacitance
---
Typical Output Waveform
Functional Block Diagram
VDD
EN
VDD
Capacitor
Charge
Pump Circuit
VA
Feedback
CLKIN
VDD
CLKEN
EL
Oscillator
VB
MOSFET
Full Bridge
REL
GND
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
3
HV853
Typical Performance
(The following was the observed performance when driving a 1.0in2 green lamp)
REL
Load
VDD
(MΩ)
3.3nF + 1.0kΩ
1.5
(V)
(mA)
IDD
VA-VB
3.2
13.1
158
3.5
12.9
158
3.8
12.7
158
4.2
12.5
158
5.0
12.3
158
(V)
Figure 1: Typical Application
+
CDD
VDD
-
1
REL 2
3
4
VDD = ON
GND = OFF
VDD
VA
REL
VB
EN
CLKIN
GND
CLKEN
8
EL
Lamp
7
6
5
HV853MG
Figure 2: Push Button Turn on with Delay Turn off
1
+
VDD
-
REL
Push Button
Turn On
2
3
CDD
4
C
R
VDD
REL
EN
CLKIN
VA
VB
GND
CLKEN
8
EL
Lamp
7
6
5
HV853MG
RC time constant
will set Turn OFF
Delay time
Figure 3: Independent Programmable Output Frequency (fEL)
+
VDD
-
CDD
VDD = ON
GND = OFF
1
2
3
4
VDD
REL
EN
CLKIN
VA
8
VB
7
GND
CLKEN
EL
Lamp
6
5
VDD
HV853MG
GND
Note: fEL = fCLK/128
VDD
fCLK
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
4
fEL
(Hz)
294
HV853
EL Lamp Dimming Using PWM
EL lamp dimming can be achieved by applying a PWM signal to the ENABLE pin. This is done by pulse skipping the output pulses. The PWM frequency should be kept below the EL frequency but above 50Hz to avoid flickering.
Figure 4: PWM Dimming Circuit
+
VDD
PWM
Signal
CDD
VDD
R EL
1 VDD
VA 8
2 REL
VB 7
3 EN
GND
4 CLKIN
EL Lamp
GND 6
CLKEN 5
HV853MG
Pin Descriptions: 10-Lead DFN (K7) / 8-Lead MSOP (MG)
K7
MG
Pin
Name
1
VDD
Input supply voltage pin.
REL
An external resistor to VDD will set the EL lamp frequency. The EL frequency is inversely
proportional to the REL resistor value. A 1.5MΩ resistor would provide a nominal lamp frequency of 280Hz
fEL = (1.5MΩ)(280Hz) / (REL)
Pin #
1
2
2
Description
When using an external clock to set the EL lamp frequency, the REL pin should be connected to ground.
3
3
EN
Enable input pin. Logic high will turn the device on. An external R-C circuit can be added for
a delayed turn off.
Logic input pin. An external logic clock applied to this pin can be used to set the EL lamp
frequency (see Figure 3). The EL lamp frequency is the external clock frequency divided by
128. This is useful for applications requiring the EL lamp to be synchronized to a system
clock. Connect to ground when not in use.
4
4
CLKIN
5
-
NC
6
5
CLKEN
7,8
6
GND
9
7
VB
EL lamp driver output pin. The EL lamp is connected across VA and VB terminals.
10
8
VA
EL lamp driver output pin. The EL lamp is connected across VA and VB terminals.
No connect.
Logic input pin. Logic high will cause the EL lamp frequency to be set by the CLKIN input.
Logic low will cause the EL lamp frequency to be set by the external REL resistor.
IC ground pin.
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
5
HV853
10-Lead DFN Package Outline (K7)
3.00x3.00mm body, 0.80mm height (max), 0.50mm pitch
D2
D
10
10
E
E2
Note 1
(Index Area
D/2 x E/2)
1
Top View
1
e
b
Note 1
(Index Area
D/2 x E/2)
View B
Bottom View
Note 3
θ
A
A3
L
Seating
Plane
L1
Note 2
A1
View B
Side View
Notes:
1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or
a printed indicator.
2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present.
3. The inner tip of the lead may be either rounded or square.
Symbol
Dimension
(mm)
A
A1
MIN
0.70
0.00
NOM
0.75
0.02
MAX
0.80
0.05
A3
0.20
REF
b
D
D2
E
E2
0.18
2.85*
2.20
2.85*
1.40
0.25
3.00
-
3.00
-
0.30
3.15*
2.70
3.15*
1.75
e
0.50
BSC
L
L1
θ
0.30
0.00*
0O
0.40
-
-
0.50
0.15
14O
JEDEC Registration MO-229, Variation WEED-5, Issue C, Aug. 2003.
* This dimension is not specified in the original JEDEC drawing. The value listed is for reference only.
Drawings not to scale.
Supertex Doc.#: DSPD-10DFNK73X3P050, Version C101008.
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
6
HV853
8-Lead MSOP Package Outline (MG)
3.00x3.00mm body, 1.10mm height (max), 0.65mm pitch
D
θ1 (x4)
8
E
E1
L
1
Seating
Plane
θ
L1
Top View
View B
A
A
Gauge
Plane
L2
Note 1
(Index Area
D/2 x E1/2)
View B
A2
b
e
A1
A
Seating
Plane
View A-A
Side View
Note:
1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or
a printed indicator.
Symbol
Dimension
(mm)
A
A1
A2
b
D
E
E1
MIN
0.75*
0.00
0.75
0.22
2.80*
4.65*
2.80*
NOM
-
-
0.85
-
3.00
4.90
3.00
MAX
1.10
0.15
0.95
0.38
3.20*
5.15*
3.20*
e
0.65
BSC
L
0.40
0.60
0.80
L1
0.95
REF
L2
0.25
BSC
θ
θ1
0
5O
O
-
-
8
15O
O
JEDEC Registration MO-187, Variation AA, Issue E, Dec. 2004.
* This dimension is not specified in the original JEDEC drawing. The value listed is for reference only.
Drawings are not to scale.
Supertex Doc. #: DSPD-8MSOPMG, Version G101008.
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an
adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the
replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications
are subject to change without notice. For the latest product specifications refer to the Supertex inc. website: http//www.supertex.com.
©2008
All rights reserved. Unauthorized use or reproduction is prohibited.
Doc.# DSFP-HV853
B110308
7
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
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