IS1870/71
Bluetooth® Low Energy SoC
Features
Radio Frequency (RF)/Analog Features
• Bluetooth smart 5.0 Bluetooth Low Energy compliant
• 256 Kbytes embedded Flash memory
• UART/SPI/I2C interface supported
• Integrated crystal oscillator operates with 32 MHz
external crystal
• Temperature sensor supported
• 31 general purpose I/O (GPIO) pins for
IS1870 SoC and 15 GPIO pins for IS1871 SoC
• Supports 4-channel pulse-width modulation
(PWM) for IS1870 SoC and 1-channel PWM for
IS1871 SoC
• Supports 12-bit ADC (ENOB=10 or 8 bits) for battery and voltage detection
• 16-channel ADC for IS1870 SoC and 6-channel
ADC for IS1871 SoC are provided
• AES-CMAC hardware engine
• Beacon support
• Low power consumption
• Compact size:
- IS1871: 4 mm x 4 mm 32QFN package
- IS1870: 6 mm x 6 mm 48QFN package
• ISM band: 2.402 GHz to 2.480 GHz operation
• Channels: 0 to 39
• Rx sensitivity: -90 dBm in Bluetooth Low Energy
mode
• Tx power: 0 dBm (typical)
• Received Signal Strength Indicator (RSSI) monitor
Operating Conditions
• Operating voltage: 1.9V to 3.6V
• Operating temperature: -40°C to +85°C
Applications
•
•
•
•
•
•
•
•
Internet of Things (IoT)
Wearable, fitness or healthcare
Weighing scale
Proximity/Find Me services
Secure payment
Digital beacons
Consumer appliances or home automation
Industrial
Packages
Type
Pin count
IS1870
IS1871
48
32
I/O pins (up to)
31
15
Contact/lead pitch
0.4
0.4
Dimensions
6x6x0.9
4x4x0.9
Package
QFN48
QFN32
Note: All dimensions are in millimeters (mm) unless specified.
2015-2021 Microchip Technology Inc.
Advanced
DS60001371G-Page 1
IS1870/71
NOTES:
DS60001371G-Page 2
Advanced
2015-2021 Microchip Technology Inc.
IS1870/71
Table of Contents
1.0 Device Overview .............................................................................................................................................................................. 5
2.0 System Block Details ..................................................................................................................................................................... 13
3.0 Electrical Characteristics................................................................................................................................................................ 17
4.0 Package Information ...................................................................................................................................................................... 21
5.0 Reflow Profile and Storage Condition ............................................................................................................................................ 27
6.0 Ordering Guide .............................................................................................................................................................................. 31
Appendix A: Reference Circuit ............................................................................................................................................................. 33
Appendix B: Layout Guidelines ............................................................................................................................................................ 37
Appendix C: Revision History .............................................................................................................................................................. 39
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2015-2021 Microchip Technology Inc.
Advanced
DS60001371G-Page 3
IS1870/71
NOTES:
DS60001371G-Page 4
Advanced
2015-2021 Microchip Technology Inc.
IS1870/71
1.0
DEVICE OVERVIEW
The IS1870/71 SoC contains a 2.4 GHz transceiver, a
Power Management Unit (PMU), Microchip’s Bluetooth
Low Energy software stack and an RF power amplifier.
The default factory configuration is designed to work
with a host MCU to provide the user with an embedded
Bluetooth Low Energy design setup for the IoT application domain.
Note:
Flexibility of the IS1870/71 SoC enables
the user to work in a host-less
implementation. In this configuration, the
user can embed a full application into the
IS1870/71 SoC. Contact your local
Microchip representative for further
guidance on obtaining this setup.
The IS1870/71 SoC provides:
• Simple integration and programming
• Reduced development time
• Superior Bluetooth Low Energy solution with
low-cost system
• Interoperability with Apple® iOS and Android™
OS
• Wide range of application support
With the default factory configuration, the IS1870/71
SoC supports Beacon technology, where the
automation
of
Bluetooth
Low
Energy
connection/control and cloud connectivity are common.
The IS1870/71 SoC is optimized to maintain a low
power wireless connection. The low power
consumption and flexible power management maximize the IS1870/71 SoC lifetime in battery operated
devices. A wide operating temperature range enables
its applications in indoor and outdoor environments
(industrial temperature range is -40°C to +85°C).
The small form factor package size of the IS1870/71
SoC is designed for wearable applications. The solution providers can minimize the module size to meet
the market requirements, which is commonly seen in
the IoT application domain.
To operate in the 2.4 GHz ISM band radio, the
IS1870/71 SoC is certified for the Bluetooth v5.0 core
specification, including support for the enhanced
throughput and the Federal Information Processing
Standard (FIPS) compliant encryption support for
secure data connections.
The IS1870/71 SoC integrates transceiver and baseband functions to decrease external components.
Microchip provides free Bluetooth stack firmware to
build an embedded Bluetooth Low Energy solution,
using the IS1870/71 SoC.
2015-2021 Microchip Technology Inc.
Advanced
DS60001371G-Page 5
IS1870/71
Figure 1-1 illustrates a typical block diagram of the
IS1870 SoC.
FIGURE 1-1:
BLOCK DIAGRAM OF THE IS1870 SOC
Note 1: Users can enable other peripheral (SPI and I2C) functions of the IS1870/71 IC by changing the default
factory firmware. For more details, contact local Microchip representatives.
2: An external host MCU is required when using the default factory firmware.
DS60001371G-Page 6
Advanced
2015-2021 Microchip Technology Inc.
IS1870/71
Figure 1-2 illustrates a typical block diagram of the
IS1871 SoC-based system.
FIGURE 1-2:
IS1871 SOC-BASED SYSTEM BLOCK DIAGRAM
Note 1: Users can enable other peripheral (SPI and I2C) functions of the IS1870/71 IC by changing the default
factory firmware. For more details, contact your local Microchip representatives.
2: An external host MCU is required when using the default factory firmware.
Table 1-1 provides the key features of the IS1870/71
SoC.
TABLE 1-1:
KEY FEATURES
Features
IS1870
IS1871
UART
1
1
GPIO
31
15
12-bit ADC channels
16
6
PWM
4
1
SPI (see Note 1)
2
1
I2C (see Note 1)
1
1
Pins
48
32
Size
6x6x0.9 mm
4x4x0.9 mm
Event counter
2
0
AES-CMAC H/W engine
Yes
Yes
Note 1: To make these peripherals available to a designer, contact your local Microchip representative.
2015-2021 Microchip Technology Inc.
Advanced
DS60001371G-Page 7
IS1870/71
Pin Description
Figure 1-3 and Figure 1-4 illustrate the IS1870 and
IS1871 pin assignment details.
FIGURE 1-3:
DS60001371G-Page 8
IS1870 SOC PIN ASSIGNMENT
Advanced
2015-2021 Microchip Technology Inc.
IS1870/71
FIGURE 1-4:
IS1871 SOC PIN ASSIGNMENT
2015-2021 Microchip Technology Inc.
Advanced
DS60001371G-Page 9
IS1870/71
Table 1-2 provides the functions of the various pins in
the IS1870/71 SoC.
TABLE 1-2:
IS1870/71 SOC PIN DESCRIPTION
IS1870
Pin No.
IS1871
Pin No.
Pin Name
Type
1
32
P1_0
DIO
AI
GPIO: P1_0
ADC input: AD8
TX_CLS1: Class 1 RF Tx Control
2
—
P1_1
DIO
AI
DI
GPIO: P1_1
ADC input: AD9
SPI bus: MISO2: Second SPI bus (Central mode)
3
1
P1_2
DIO
AI
I/O
GPIO: P1_2
ADC input: AD10
I2C SCL
4
2
P1_3
DIO
AI
DIO
GPIO: P1_3
ADC input: AD11
I2C SDA
5
—
P1_4
DIO
AI
DI
GPIO: P1_4
ADC input: AD12
Event Counter
6
—
P1_5
DIO
AI
DI
GPIO: P1_5
ADC input: AD13
Event Counter
7
3
P1_7
DIO
AO
GPIO: P1_7
External 32.768 kHz Crystal Output: XO32K
8
4
P1_6
DIO
AI
GPIO: P1_6
External 32.768 kHz Crystal Input: XI32K
Description
9
5
HCI_TXD
DO
HCI UART TXD
10
6
HCI_RXD
DI
HCI UART RXD
11
—
P3_0
DIO
GPIO: P3_0
12
7
P3_1
DIO
DO
GPIO: P3_1
SPI bus: NCS, SPI Flash: CSN
13
8
P3_2
DIO
DI
GPIO: P3_2
SPI bus: MISO, SPI Flash: SDO
14
9
P3_3
DIO
DO
GPIO: P3_3
SPI bus: MOSI, SPI Flash: SDI
15
10
P3_4
DIO
DO
GPIO: P3_4
SPI bus: SCLK, SPI Flash: SCK
16
—
P3_5
DIO
AI
GPIO: P3_5
LED1
17
11
P3_6
DIO
DO
DO
GPIO: P3_6
UART flow-control RTS
PWM0
18
12
RST_N
DI
19
13
P0_0
DIO
AI
DI
GPIO: P0_0
ADC input: AD0
UART flow-control CTS
20
—
P0_1
DIO
AI
GPIO: P0_1
ADC input: AD1
Legend:
A = Analog
DS60001371G-Page 10
D = Digital
External Reset
I = Input
Advanced
O = Output
P = Power
2015-2021 Microchip Technology Inc.
IS1870/71
TABLE 1-2:
IS1870/71 SOC PIN DESCRIPTION (CONTINUED)
IS1870
Pin No.
IS1871
Pin No.
Pin Name
Type
21
14
P0_2
DIO
AI
AI
GPIO: P0_2
ADC input: AD2
LED0
22
—
P0_3
DIO
AI
GPIO:P0_3
ADC input: AD3
23
—
P0_4
DIO
AI
GPIO:P0_4
ADC input: AD4
24
—
P0_5
DIO
AI
GPIO:P0_5
ADC input: AD5
25
—
P0_6
DIO
AI
GPIO:P0_6
ADC input: AD6
26
—
P0_7
DIO
AI
GPIO:P0_7
ADC input: AD7
27
15
BK_O
P
1.55V buck regulator output. For internal use, do not connect to
external devices)
28
16
BK_LX
P
1.55V buck regulator output. For internal use, do not connect to
external devices
29
17
BK_IN
P
Buck input. Voltage Range: 1.9V to 3.6V
30
18
VBAT
P
Battery input. Voltage Range: 1.9V to 3.6V. Connect to BK_IN
and a 10 μF decoupling capacitor, as illustrated in Figure A-1
and Figure A-3.
Description
31
19
AVDD
P
Input of LDOs: CLDO, PALDO and RFLDO
32
20
CLDO_O
P
1.2V CLDO Output: Core-logic and memories supply, connect to
1 μF (X5R/X7R) capacitor
33
21
ULPC_O
P
1.2V Programmable ULPC Output: Always On logic and retention memory supply (for internal use, do not connect to external
devices)
34
22
VREF
P
PMU band-gap reference voltage output for LDOs and buck (for
internal use, do not connect to external devices)
35
23
XO_N
A
32 MHz crystal input negative
36
24
XO_P
A
32 MHz crystal input positive
37
25
VCC_RF
P
Power input for VCO and RF (1.28V). Connect to 1 μF
(X5R/X7R) capacitor
38
26
Rx
AI
RF receive path
39
27
Tx
AO
RF transmit path
40
28
VCC_PA
P
41
29
P2_0
DIO
Mode Configuration
H: Application mode
L: Test mode
42
—
P2_1
DIO
DO
GPIO: P2_1
PWM0
43
—
P2_2
DIO
DO
GPIO: P2_2
PWM1
44
—
P2_3
DIO
DO
GPIO: P2_3
PWM2
Legend:
A = Analog
D = Digital
2015-2021 Microchip Technology Inc.
Power supply for power amplifier (1.55V). Connect to 0.22 μF
X5R/X7R
I = Input
Advanced
O = Output
P = Power
DS60001371G-Page 11
IS1870/71
TABLE 1-2:
IS1870/71 SOC PIN DESCRIPTION (CONTINUED)
IS1870
Pin No.
IS1871
Pin No.
Pin Name
Type
45
30
P2_4
DIO
GPIO: P2_4
TX_CLS1: Class 1 RF RX Control
46
—
P2_5
DIO
AI
DO
GPIO: P2_5
ADC input: AD15
PWM3
47
—
P2_6
DIO
P26
48
31
P2_7
DIO
AI
DO
GPIO: P27
ADC input: AD14
SPI bus: NCS2, second SPI bus (Central mode)
Legend:
A = Analog
DS60001371G-Page 12
D = Digital
Description
I = Input
Advanced
O = Output
P = Power
2015-2021 Microchip Technology Inc.
IS1870/71
2.0
SYSTEM BLOCK DETAILS
2.1
System Block Descriptions
This section provides a description of the blocks used
in the IS1870/71 SoC.
in various modes, controlling the amount of time the
peak current is active, maximizing the battery life. The
factory firmware enables the designer to perform the
calibration for the internal LDOs to compensate for
variations in the board design and other
manufacturing-related artifacts.
2.1.1
Figure 2-1 illustrates the power tree diagram of the
IS1870/71 SoC.
PMU
The IS1870/71 SoC includes a DC-DC converter and
four LDOs. Microchip's Bluetooth Low Energy software
stack is used for controlling and operating these LDOs
FIGURE 2-1:
2.1.2
IS1870/71 SOC POWER TREE DIAGRAM
ALWAYS ON LOGIC
2.1.4
Always On (AON) is the hardware-based state
machine, which is controlled by Microchip's Bluetooth
stack. Together, the software and hardware logic maintain the power-up, power-down and low power
sequences of the IS1870/71 SoC, by providing optimal
device performance. It includes an RTC timer and I/O
detector to wake-up the system from Power-Saving
mode using time out or external general I/O transition.
This allows the SoC to run in Power-Saving mode while
maintaining an active connection with a peer device
and minimizing power consumption.
2.1.3
MCU
Microchip provides the Bluetooth Low Energy software
stack, which runs on the IS1870/71 SoC’s internal 8051
core. The stack resides in a combination of ROM, RAM
and embedded Flash. The software stack is
responsible for scheduling the Bluetooth Low Energy
tasks and for processing the Bluetooth Low Energy
protocol and profiles.
RF
This SoC is controlled by Microchip’s Bluetooth stack,
which contains an on-chip RF circuit, a controller and a
modulator (Tx)/demodulator (Rx). The Tx is used to
control the synthesizer's phase and output power and
modulate the data based on the Bluetooth Low Energy
specifications. The Rx is used to decode the Bluetooth
signal and optimize the performance, such as
IQ-imbalance, suppress DC and flick noise. It is also
used to compensate the frequency drift and offset, and
filter out interference to maximize receiver sensitivity.
2015-2021 Microchip Technology Inc.
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DS60001371G-Page 13
IS1870/71
2.2
System Block Specification
2.2.4
The following are the system block specifications.
Note:
2.2.1
The system blocks which make up the
IS1870/71 SoC are listed below. However,
some of the blocks used in the IS1870/71
SoC are controlled by the default factory
firmware and are not available to the
designer.
RF
• Bluetooth BT5.0 LE compliant SoC
• Frequency: 2.402 GHz to 2.480 GHz
• Programmable transmit output power up to
+3 dBm maximum
• -25 dBm minimum Tx power to search nearby
devices
• -90 dBm typical receiver power sensitivity
• Digital RSSI indicator (-50 dBm to -90 dBm)
• -40°C to +85°C Bluetooth Low Energy RF certified
2.2.2
•
•
•
•
Note:
PMU
MCU
The Microchip provided Bluetooth Low
Energy stack uses a portion of the available memory listed above. With the
default factory firmware, the amount of
memory used is fixed and the free memory is not available to the designer. As it is
expected, the application will reside in the
external host MCU. For details on altering
the default factory setup, please contact
your local Microchip representative.
DS60001371G-Page 14
This peripheral is not available with the
default factory firmware. For details on
altering this default factory setup, contact
your local Microchip representative.
• Three wire serial interface (compatible to SPI)
8051 core with scalable clock
ROM: 32 KB
Main SRAM: 24 KB
Embedded Flash: 256 KB for Device Firmware
Upgrade (DFU) and run-time data storage
Note:
• Flexible GPIO pin configuration
• ADC:
- 0V to 3.6V, 12-bit SDM-ADC with 16-channel
(IS1870) or 6-Channel (IS1871) hybrid-I/O
(Multi-Function). It can be configured as ADC
or GPIO input
• Internal 1.9V to 3.6V battery voltage monitor
• Precision Temperature Sensor (PTS) for ambient
temperature detection
• 4 MHz clock-rate full duplex 4-wire SPI with 256
bytes buffer DMA
• HCI over UART up to 921600 bps with flow-control
• Two wire serial interface (compatible to I2C)
Note:
• Operating battery input voltage range: 1.9V to
3.6V
• 1.28V RFLDO: RF IP power supply
• 1.55V PALDO: RF Tx power amplify supply
• 1.2V CLDO: Core-logic and memories supply
• 1.55V DC-DC switching buck converter
• 1.2V programmable ULPC to supply AON-logic
and retention memory
• AON-logic to control power-up, power-down and
wake-up procedures
• Internal 32 kHz (±250 ppm) ultra-low power oscillator
• Power-on Reset
2.2.3
PERIPHERALS
This peripheral is not available with the
default factory firmware. For details on
altering this default factory setup, please
contact
your
local
Microchip
representative.
• GPIO pins with input internal pull up /Hi-Z selectable
• 24-bit low-power Real Time Counter (RTC) for
background timer in Standby mode
• Watchdog timer
• Event Counter option (P1_4 and P1_5) provides
capture/counter function to external events for frequency calculation. It provides 1K/32K/1M/16M
clock rate option to count the frequency range
from 60 Hz to 1 MHz. The continuous/one shot
count mode can be selected
• Specific GPIO pins (P1_6 and P1_7) support
external 32.768 kHz crystal option for RTC; however, the default from the factory is set to use the
internal 32 kHz ultra low-power oscillator
• PWM:
- 16-bit PWM design
- Four Individual frequency and individual duty
cycle channel outputs multiplexed with GPIO
pins (P2_1, P2_2, P2_3 and P2_5)
- Three clock source (32K, 1M and 16M)
selections to program frequency range from
0.488 Hz to 8 MHz
- Double buffers output compare registers and
top register to avoid glitch
- Two pair output configurable as inverse channel
Advanced
2015-2021 Microchip Technology Inc.
IS1870/71
2.3
Host MCU Interface Over UART
Figure 2-2 illustrates IS1870/71 SoC application block
diagram. In the diagram the power supply (3.3V),
UART interface and GPIO control and indication are
listed.
FIGURE 2-2:
IS1870/71 SOC APPLICATION BLOCK DIAGRAM WITH MCU
Note 1: Ensure BAT_IN (I/O voltage) and MCU VDD voltage are compatible.
2: The control and indication ports are configurable in Microchip provided PC tool, referred to as the
UI tool, see the product webpage for additional information.
3: Default factory firmware configuration enables the designer to control GPIO functions, ADC, PTS and
PWM peripherals. The I2C and SPI peripherals are not available with the default firmware. Contact your
local Microchip representative for more details.
4: The GPIO applications of the IS1871 SoC have a reduced pin count, and some of the GPIO pins are not
supported in the IS1871 SoC.
2015-2021 Microchip Technology Inc.
Advanced
DS60001371G-Page 15
IS1870/71
NOTES:
DS60001371G-Page 16
Advanced
2015-2021 Microchip Technology Inc.
IS1870/71
3.0
ELECTRICAL CHARACTERISTICS
This section provides an overview of the IS1870/71 SoC electrical characteristics. Additional information will be
provided in future revisions of this document.
Absolute maximum ratings for the IS1870/71 devices are listed below. Exposure to the maximum rating conditions for
extended periods may affect device reliability. Functional operation of the device at these or any other conditions, above
the parameters indicated in the operation listings of this specification, is not implied.
Absolute Maximum Ratings
(See Note)
Ambient temperature under bias with parts ending with 102 ....................................................................-20°C to +70°C
Ambient temperature under bias with parts ending with 202 ....................................................................-40°C to +85°C
Storage temperature .............................................................................................................................. -40°C to +125°C
Voltage on VDD with respect to VSS ......................................................................................................... -0.3V to +3.6V
Voltage on any pin with respect to VSS .......................................................................................... -0.3V to (VDD + 0.3V)
Maximum output current sunk by any I/O pin..........................................................................................................12 mA
Maximum output current sourced by any I/O pin....................................................................................................12 mA
ESD (according to machine model, JEDEC EIA/JESD22-A115-C)
Maximum output for all pins, excluding RF Tx pin .................................................................................................±200V
Maximum output for all pins ....................................................................................................................................±150V
Maximum output (human-body model)......................................................................................................................±2 kV
Maximum output (charge-device model).................................................................................................................±150V
Note:
Stresses listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This
is a stress rating only. The functional operation of the device at those or any other conditions, and those
indicated in the operation listings of this specification, is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
2015-2021 Microchip Technology Inc.
Advanced
DS60001371G-Page 17
IS1870/71
Table 3-1 provides the recommended operating conditions
of the IS1870/71 SoC.
TABLE 3-1:
RECOMMENDED OPERATING CONDITIONS
Symbol
Min.
Typ.
Max.
PMU
VDD (VBAT, BK_IN, AVDD)
1.9V
3.0V
3.6V
RST_N
1.9V
3.0V
3.6V
Other I/O
1.9V
—
3.6V
0.7 VDD
—
VDD
VSS
—
0.3 VDD
0.8 VDD
—
VDD
GPIO
VIH (Input High Voltage)
VIL (Input Low Voltage)
VOH (Output High Voltage) (High drive, 12 mA)
VOL (Output Low Voltage) (High drive, 12 mA)
Pull up Resistance
Pull down Resistance
VSS
—
0.2 VDD
34 kOhm
48 kOhm
74 kOhm
29 kOhm
47 kOhm
86 kOhm
Supply Current (see Note 1)
Tx mode peak current at VDD=3V,
Tx=0 dBm, Buck mode
—
10 mA at +25°C
13 mA at
+70°C/+85°C
Rx mode peak current at VDD=3V, Buck mode
—
10 mA at +25°C
13 mA at
+70°C/+85°C
“Reduced current consumption” low power mode current (see Note 2)
—
60 μA at +25°C
—
1.0 μA
—
2.9 μA
“Shutdown” low power mode current (see Note 2)
Analog-to-Digital Converter (ADC) for IS1870/71-202
Full scale (BAT_IN)
0V
3.0V
3.6V
Full scale (AD0 to AD15)
0V
—
3.6V
Operating Temperature Range
-40°C
25°C
85°C
Operating current
—
—
500 μA
DNL (ENOB 10-bit, ADC in 32 KHz Mode)
(see Note 3 and 4)
-1
—
+1.5
INL (ENOB 10-bit, ADC in 32 KHz Mode)
(see Note 3 and 4)
-2 LSB
—
+2 LSB
Precise Temperature Sensor (PTS) for IS1870/71-202
Detect range
-40°C
—
+85°C
Digital Output
1160
—
2649
—
12-bit/°C
—
-3°C
—
+3°C
Resolution
Accuracy
Note 1: The current measurements are characterized across a sample of the BM70/71 module at room temperature
(+25°C), unless otherwise noted.
2: For more details on “Reduced current consumption” or “Shutdown” low power modes, refer to the “BM70/71
Bluetooth® Low Energy Module User's Guide” (DS50002542). This rating is part of the characterization of
the default factory firmware.
3: ADC performance characterized with V1.06 production firmware across a set of IC's are not tested during
production.
4: Calculated DNL/INL values are determined using “Best Fit” method.
DS60001371G-Page 18
Advanced
2015-2021 Microchip Technology Inc.
IS1870/71
Table 3-2 provides the RF specifications of the
IS1870/71 SoC.
TABLE 3-2:
RF SPECIFICATIONS
Parameter
Min.
Typ.
Max.
2402 MHz
—
2480 MHz
—
0 dBm
—
-25 dBm
—
3 dBm
Transmitter
Frequency
Output Power
RF Power Control Range
In-band Spurious (N±2)
—
-38.5 dBm
—
In-band Spurious (N±3)
—
-43.25 dBm
—
Modulation Characteristic - Frequency
Deviation (see Note 1)
—
247 kHz
—
2402 MHz
—
2480 MHz
Sensitivity Level (Interference active)
—
-90 dBm
—
Interference Performance
Co-channel
—
17 dB
—
Adjacent
± 1 MHz
—
0 dB
—
Adjacent
± 2 MHz
—
-25 dB
—
Adjacent >=
± 3 MHz
—
-32 dB
—
—
-37.5 dBm
—
Receiver
Frequency
Intermodulation Characteristic (n=3,4,5)
Maximum Usable Level
0 dBm
Note 1: Tested with a known pattern of ‘00001111’b being transmitted.
2015-2021 Microchip Technology Inc.
Advanced
DS60001371G-Page 19
IS1870/71
3.1
3.1.1
Current Consumption Details
The peak current of the VBAT input is 12 mA and the
average current is around 230 μA. In this example the
advertising interval is 100 ms and current consumption
is measured at 3.3V VBAT input.
Tx/Rx CURRENT CONSUMPTION
DETAILS
Figure 3-1 illustrates the average current consumption
of an advertising event during Bluetooth Low Energy
operation of the IS1870/71 SoC.
FIGURE 3-1:
DS60001371G-Page 20
AVERAGE CURRENT CONSUMPTION DURING ADVERTISING
Advanced
2015-2021 Microchip Technology Inc.
IS1870/71
4.0
PACKAGE INFORMATION
Figure 4-1 through Figure 4-5 illustrate the package
marking information of the IS1870SF IC.
4.1
48QFN, 6x6 mm SoC Outline (IS1870SF)
FIGURE 4-1:
48QFN, 6X6 MM PACKAGE INFORMATION (IS1870SF)
2015-2021 Microchip Technology Inc.
Advanced
DS60001371G-Page 21
IS1870/71
48QFN, 6X6 MM FOOTPRINT INFORMATION (IS1870SF)
DS60001371G-Page 22
FIGURE 4-2:
Advanced
2015-2021 Microchip Technology Inc.
IS1870/71
4.2
32QFN, 4x4 mm SoC Outline (IS1871SF)
FIGURE 4-3:
32QFN, 4X4 MM PACKAGE SIZE INFORMATION (IS1871SF)
2015-2021 Microchip Technology Inc.
Advanced
DS60001371G-Page 23
IS1870/71
32QFN FOOTPRINT INFORMATION (IS1871SF)
DS60001371G-Page 24
FIGURE 4-4:
Advanced
2015-2021 Microchip Technology Inc.
IS1870/71
FIGURE 4-5:
PACKAGE MARKING INFORMATION
2015-2021 Microchip Technology Inc.
Advanced
DS60001371G-Page 25
IS1870/71
NOTES:
DS60001371G-Page 26
Advanced
2015-2021 Microchip Technology Inc.
IS1870/71
5.0
REFLOW PROFILE AND
STORAGE CONDITION
pad size on the PCB
- Oval-shape opening is used to get the optimum paste release
- Rounded corners to minimize the clogging
- Positive taper walls (5° tapering) with the
bottom opening larger than the top opening
Figure 5-1 and Figure 5-2 illustrate the reflow profiles
and stencil information of the IS1870/71 SoC.
5.1
5.1.1
Stencil of SMT Assembly
Suggestion
5.1.3
STENCIL TYPE AND THICKNESS
• Laser cutting
• Stainless steel
• Thickness: 0.5 mm pitch, thickness more than
0.15 mm
5.1.2
APERTURE SIZE AND SHAPE FOR
TERMINAL PAD
APERTURE DESIGN FOR THERMAL
PAD
• Small multiple openings are used instead of one
big opening, see Figure 5-1
• 60 to 80% solder paste coverage
• Rounded corners to minimize clogging
• Positive taper walls (5° tapering) with the bottom
opening larger than the top opening, see
Figure 5-2
• Aspect ratio (width/thickness) more than 1.5
• Aperture shape
- The stencil aperture is designed to match the
FIGURE 5-1:
REFLOW PROFILE
Do not recommend
Coverage 91%
FIGURE 5-2:
Recommend
Coverage 77%
Recommend
Coverage 65%
STENCIL TYPE
2015-2021 Microchip Technology Inc.
Advanced
DS60001371G-Page 27
IS1870/71
5.2
Reflow Profile
Figure 5-3 illustrates the reflow profile and the following
are its specific features:
• Standard Condition: IPC/JEDEC J-STD-020
• Preheat: +150 ℃ to +200 ℃ for 60 to 120 seconds
• Average ramp-up rate (+217℃ to peak): +3℃/sec
max
FIGURE 5-3:
DS60001371G-Page 28
• Temperature maintained above +217 ℃ :
60 to 150 seconds
• Time within +5 ℃ of peak temperature:
30 to 40 seconds
• Peak temperature: +260 ℃ with 5/-0 ℃ tolerance
• Ramp-down rate (peak to +217℃): +6℃/sec. max
• Time within +25℃ to peak temperature: 8 minutes
max
• Cycle interval: 5 minutes
REFLOW PROFILE
Advanced
2015-2021 Microchip Technology Inc.
IS1870/71
5.3
Storage Condition
Users are required to follow these specific storage
conditions for the IS1870/71 SoC.
• The calculated shelf life in the sealed bag is
24 months at
