KSZ9893RNXI

KSZ9893RNX 3-Port Gigabit Ethernet Switch with RGMII/MII/RMII Interface Highlights • Non-blocking wire-speed Ethernet switching fabric • Full-featured forwarding and filtering control, including Access Control List (ACL) filtering • Full VLAN and QoS support • Two ports with integrated 10/100/1000BASE-T PHYs • One port with 10/100/1000 Ethernet MAC and configurable RGMII/MII/RMII interface • IEEE 802.1X port-based authentication support • EtherGreen™ power management features, including low power standby and IEEE 802.3az • Flexible management interface options: SPI, I2C, MIIM, and in-band management via any port • Commercial/Industrial temperature range support • 64-pin VQFN (8 x 8mm) lead-free package Target Applications • • • • • • • • Stand-alone 10/100/1000Mbps Ethernet switches VoIP infrastructure switches Broadband gateways/firewalls Wi-Fi access points Integrated DSL/cable modems Security/surveillance systems Industrial control/automation switches Networked measurement and control systems Features • Switch Management Capabilities - 10/100/1000Mbps Ethernet switch basic functions: frame buffer management, address look-up table, queue management, MIB counters - Non-blocking store-and-forward switch fabric assures fast packet delivery by utilizing 4096 entry forwarding table with 128kByte frame buffer - Jumbo packet support up to 9000 bytes - Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port - MIB counters for fully-compliant statistics gathering 34 counters per port - Tail tagging mode (one byte added before FCS) support at host port to inform the processor which ingress port receives the packet and its priority - Loopback modes for remote failure diagnostics - Rapid spanning tree protocol (RSTP) support for topology management and ring/linear recovery - Multiple spanning tree protocol (MSTP) support  2016 Microchip Technology Inc. • Two Integrated PHY Ports - 1000BASE-T/100BASE-TX/10BASE-T IEEE 802.3 Fast Link-up option significantly reduces link-up time Auto-negotiation and Auto-MDI/MDI-X support Energy-Efficient Ethernet (EEE) support with lowpower idle mode and clock stoppage - On-chip termination resistors and internal biasing for differential pairs to reduce power - LinkMD® cable diagnostic capabilities for determining cable opens, shorts, and length • One Configurable External MAC Port - Reduced Gigabit Media Independent Interface (RGMII) v2.0 - Reduced Media Independent Interface (RMII) v1.2 with 50MHz reference clock input/output option - Media Independent Interface (MII) in PHY/MAC mode • Advanced Switch Capabilities - IEEE 802.1Q VLAN support for 128 active VLAN groups and the full range of 4096 VLAN IDs - IEEE 802.1p/Q tag insertion/removal on per port basis - VLAN ID tag/untag options on per port or VLAN basis - IEEE 802.3x full-duplex flow control and half-duplex back pressure collision control - IEEE 802.1X (Port-Based Network Access Control) - IGMP v1/v2/v3 snooping for multicast packet filtering - IPv6 multicast listener discovery (MLD) snooping - IPv4/IPv6 QoS support, QoS/CoS packet prioritization - 802.1p QoS packet classification with 4 priority queues - Programmable rate limiting at ingress/egress ports - Broadcast storm protection - Four priority queues with dynamic packet mapping for IEEE 802.1p, IPv4 DIFFSERV, IPv6 Traffic Class - MAC filtering function to filter or forward unknown unicast, multicast and VLAN packets - Self-address filtering for implementing ring topologies • Comprehensive Configuration Registers Access - High-speed 4-wire SPI (up to 50MHz), I2C interfaces provide access to all internal registers - MII Management (MIIM, MDC/MDIO 2-wire) Interface provides access to all PHY registers - In-band management via any of the three ports - I/O pin strapping facility to set certain register bits from I/O pins at reset time - On-the-fly configurable control registers • Power Management - IEEE 802.3az Energy Efficient Ethernet (EEE) Energy detect power-down mode on cable disconnect Dynamic clock tree control Unused ports can be individually powered down Full-chip software power-down Wake-on-LAN (WoL) standby power mode DS00002318A-page 1 KSZ9893RNX TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors@microchip.com. We welcome your feedback. Most Current Documentation To obtain the most up-to-date version of this documentation, please register at our Worldwide Web site at: http://www.microchip.com You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000). Errata An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. 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DS00002318A-page 2  2016 Microchip Technology Inc. KSZ9893RNX 1.0 INTRODUCTION 1.1 General Description The KSZ9893RNX is a highly-integrated, IEEE 802.3 compliant networking device that incorporates a layer-2+ managed Gigabit Ethernet switch, two 10BASE-T/100BASE-TX/1000BASE-T physical layer transceivers (PHYs) and associated MAC units, and one MAC port with a configurable RGMII/MII/RMII interface for direct connection to a host processor/controller, another Ethernet switch, or an Ethernet PHY transceiver. The KSZ9893RNX is built upon industry-leading Ethernet technology, with features designed to offload host processing and streamline the overall design: • • • • • • Non-blocking wire-speed Ethernet switch fabric Full-featured forwarding and filtering control, including port-based Access Control List (ACL) filtering Full VLAN and QoS support Traffic prioritization with per-port ingress/egress queues and by traffic classification Spanning Tree support for RSTP and MSTP IEEE 802.1X port-based authentication support A host processor can access all KSZ9893RNX registers for control over all PHY, MAC, and switch functions. Full register access is available via the integrated SPI or I2C interfaces, and by in-band management via any one of the data ports. PHY register access is provided by a MIIM interface. Flexible digital I/O voltage allows the MAC port to interface directly with a 1.8/2.5/3.3V host processor/controller/FPGA. Additionally, a robust assortment of power-management features including IEEE 802.3az Energy-Efficient Ethernet (EEE) for power savings with idle link, and Wake-on-LAN (WoL) for low power standby operation, have been designed to satisfy energy-efficient system requirements. The KSZ9893RNX is available in commercial (0°C to +70°C) and industrial (-40°C to +85°C) temperature ranges. An internal block diagram of the KSZ9893RNX is shown in Figure 1-1. FIGURE 1-1: INTERNAL BLOCK DIAGRAM Port 2 10/100/1000 PHY 1 10/100/1000 PHY 2 GMAC 1 GMAC 2 Control Registers KSZ9893RNX  2016 Microchip Technology Inc. Switch Engine Port 1 Queue Management, QoS, Etc. GMAC 3 RGMII/MII/RMII Address Lookup MIB Counters Frame Buffers Queue Mgmt. SPI/I2C/MIIM DS00002318A-page 3 KSZ9893RNX 2.0 PACKAGE INFORMATION 2.1 Package Drawings Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging FIGURE 2-1: PACKAGE (DRAWING) 64-Lead Very Thin Plastic Quad Flat, No Lead Package (JXX) - 8x8 mm Body [VQFN] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D NOTE 1 A SEE DETAIL A B N 1 2 E (DATUM B) (DATUM A) 2X 0.10 C 2X A 0.10 C 0.10 C TOP VIEW 64X 0.08 C C 0.10 C A B SIDE VIEW D2 0.10 SEATING PLANE C A B E2 e 2 K 2 1 NOTE 1 N L e 64X b 0.07 0.05 C A B C BOTTOM VIEW Microchip Technology Drawing C04-437A Sheet 1 of 2  2016 Microchip Technology Inc. DS00002318A-page 4 KSZ9893RNX FIGURE 2-2: PACKAGE (DIMENSIONS) 64-Lead Very Thin Plastic Quad Flat, No Lead Package (JXX) - 8x8 mm Body [VQFN] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (A3) C A SEATING PLANE A1 DETAIL A Units Dimension Limits Number of Terminals N e Pitch Overall Height A Standoff A1 A3 Terminal Thickness Overall Length D Exposed Pad Length D2 Overall Width E E2 Exposed Pad Width b Terminal Width Terminal Length L K Terminal-to-Exposed-Pad MIN 0.80 0.00 6.40 6.40 0.15 0.35 0.25 MILLIMETERS NOM 64 0.40 BSC 0.85 0.02 0.20 REF 8.00 BSC 6.50 8.00 BSC 6.50 0.20 0.40 - MAX 0.90 0.05 6.60 6.60 0.25 0.45 - Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-437A Sheet 2 of 2 DS00002318A-page 5  2016 Microchip Technology Inc. KSZ9893RNX FIGURE 2-3: PACKAGE (LAND PATTERN) 64-Lead Very Thin Plastic Quad Flat, No Lead Package (JXX) - 8x8 mm Body [VQFN] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging C1 X2 EV 64 1 2 ØV C2 Y2 EV G1 X1 Y1 E SILK SCREEN RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Optional Center Pad Width X2 Optional Center Pad Length Y2 Contact Pad Spacing C1 Contact Pad Spacing C2 Contact Pad Width (X64) X1 Contact Pad Length (X64) Y1 Contact Pad to Center Pad (X64) G1 Thermal Via Diameter V Thermal Via Pitch EV MIN MILLIMETERS NOM 0.40 BSC MAX 6.60 6.60 7.90 7.90 0.20 0.80 0.20 0.33 1.20 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. 2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process Microchip Technology Drawing C04-2437A  2016 Microchip Technology Inc. DS00002318A-page 6 KSZ9893RNX APPENDIX A: TABLE A-1: PRODUCT BRIEF REVISION HISTORY REVISION HISTORY Revision DS00002318A (12-16-16)  2016 Microchip Technology Inc. Section/Figure/Entry Correction Initial Document Release DS00002318A-page 7 KSZ9893RNX THE MICROCHIP WEB SITE Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: • Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software • General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions. CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • • • • Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://www.microchip.com/support  2016 Microchip Technology Inc. DS00002318A-page 8 KSZ9893RNX PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. XX Device Package [XX]( 1) X Examples: Temp. Tape & Reel Range Option a) b) Device: KSZ9893R = 3-Port Switch with 1 RGMII/MII/RMII Interface Package: NX = 64-pin VQFN Temperature Range: C I = 0C to = -40C to Tape and Reel Option: Blank -TR = Standard packaging (tray) = Tape and Reel (Note 1)  2016 Microchip Technology Inc. +70C +85C KSZ9893RNXC 64-pin VQFN package, Commercial temperature, Standard packaging KSZ9893RNXI-TR 64-pin VQFN package, Industrial temperature, Tape and reel (Commercial) (Industrial) Note 1: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. DS00002318A-page 9 KSZ9893RNX Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2016, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 9781522411130 QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 ==  2016 Microchip Technology Inc. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. 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