LPC47M182
Advanced I/O Controller with Motherboard GLUE Logic
Product Features
• 3.3V Operation (5V tolerant)
• LPC Interface
- Multiplexed Command, Address and Data
Bus
- Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems
• ACPI 1.0b/2.0 Compliant
• Programmable Wake-up Event Interface
• PC99a/PC2001 Compliant
• General Purpose Input/Output Pins (13)
• Fan Tachometer Inputs (2)
• Green and Yellow Power LEDs
• ISA Plug-and-Play Compatible Register Set
• Motherboard GLUE Logic
- 5V Reference Generation
- 5V Standby Reference Generation
- IDE Reset/Buffered PCI Reset Outputs
- Power OK Signal Generation
- Power Sequencing
- Power Supply Turn On Circuitry
- Resume Reset Signal Generation
- Hard Drive Front Panel LED
- Voltage Translation for DDC to VGA Monitor
- SMBus Isolation Circuitry
- CNR Dynamic Down Control
• 2.88MB Super I/O Floppy Disk Controller
- Licensed CMOS 765B Floppy Disk Controller
- Software and Register Compatible with
Microchip's Proprietary 82077AA Compatible
Core
- Supports One Floppy Drive
- Configurable Open Drain/Push-Pull Output
Drivers
- Supports Vertical Recording Format
• 16-Byte Data FIFO
- 100% IBM Compatibility
- Detects All Overrun and Underrun Conditions
• Sophisticated Power Control Circuitry (PCC)
Including Multiple Powerdown Modes for
Reduced Power Consumption
- DMA Enable Logic
- Data Rate and Drive Control Registers
• 480 Address, Up to Eight IRQ and Three DMA
Options
2007 - 2014 Microchip Technology Inc.
• Enhanced Digital Data Separator
- 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250
Kbps Data Rates
- Programmable Precompensation Modes
• Keyboard Controller
- 8042 Software Compatible
- 8 Bit Microcomputer
- 2k Bytes of Program ROM
- 256 Bytes of Data RAM
- Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface
- Asynchronous Access to Two Data Registers
and One Status Register
- Supports Interrupt and Polling Access
- 8 Bit Counter Timer
- Port 92 Support
- Fast Gate A20 and KRESET Outputs
• Serial Ports
- Two Full Function Serial Ports
- High Speed 16C550A Compatible UART with
Send/Receive 16-Byte FIFOs
- Supports 230k and 460k Baud
- Programmable Baud Rate Generator
- Modem Control Circuitry
- 480 Address and 15 IRQ Options
• Infrared Port
- Multiprotocol Infrared Interface
- 32-Byte Data FIFO
- IrDA 1.0 Compliant
- SHARP ASK IR
- HP-SIR
- 480 Address, Up to 15 IRQ and Three DMA
Options
• Multi-Mode Parallel Port with ChiProtect
- Standard Mode IBM PC/XT, PC/AT, and PS/2
Compatible Bi-directional Parallel Port
- Enhanced Parallel Port (EPP) Compatible EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant)
- IEEE 1284 Compliant Enhanced Capabilities
Port (ECP)
- ChiProtect Circuitry for Protection
- 960 Address, Up to 15 IRQ and Three DMA
Options
• Interrupt Generating Registers
- Registers Generate IRQ1 – IRQ15 on Serial
IRQ Interface.
• XOR-Chain Board Test
• 128-Pin QFP RoHS Compliant Package, 3.2 mm
Footprint
DS00001809A-page 1
LPC47M182
Description
The LPC47M182 is a 3.3V (5V tolerant) PC99a/PC2001 compliant Advanced I/O controller for Desktop PCs. The
device, which implements the Low Pin Count (LPC) interface, includes I/O functionality as well as Motherboard GLUE
logic into a 128-pin package. This is a space saving solution on the motherboard resulting in lower cost. The
LPC47M182 also provides 13 general purpose pins, which offer flexibility to the system designer, and two Fan
Tachometer Inputs. The LPC47M182’s LPC interface supports LPC I/O and DMA cycles.
The LPC47M182 includes complete legacy I/O: a keyboard interface; Microchip's true CMOS 765B floppy disk
controller with advanced digital data separator; two 16C550A compatible UARTs; one Multi-Mode parallel port
including ChiProtect circuitry plus EPP and ECP. The true CMOS 765B core provides 100% compatibility with IBM PC/
XT and PC/AT architectures, in addition, it provides data overflow and underflow protection. The Microchip’s patented
advanced digital data separator allows for ease of testing and use. The parallel port is compatible with IBM PC/AT
architecture, as well as IEEE 1284 EPP and ECP. The LPC47M182 incorporates sophisticated power control circuitry
(PCC) which includes support for keyboard and mouse wake up events as well as PME support. The PCC supports
multiple low power-down modes. The LPC47M182 is ACPI 1.0b/2.0 compatible.
The Motherboard GLUE logic includes various power management logic; including generation of nRSMRST, Power
OK signal generation, 5V main and standby reference generation. There are also three LEDs to indicate power status
and hard drive activity. The translation circuit converts 3.3V signals to 5V signals. Also included is SMBus main power
well to resume power well isolation circuitry.
The LPC47M182 supports the ISA Plug-and-Play Standard register set (Version 1.0a). The I/O Address, DMA
Channel and hardware IRQ of each logical device in the LPC47M182 may be reprogrammed through the internal
configuration registers. There are up to 480 (960 for Parallel Port) I/O address location options, a Serialized IRQ
interface, and three DMA channels. On chip, Interrupt Generating Registers enable external software to generate IRQ1
through IRQ15 on the Serial IRQ Interface.
The LPC47M182’s Enhanced Digital Data Separator does not require any external filter components and is therefore
easy to use and offers lower system costs and reduced board area. The LPC47M182 is register compatible with Microchip’s proprietary 82077AA core.
DS00001809A-page 2
2007 - 2014 Microchip Technology Inc.
LPC47M182
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at docerrors@microchip.com. We welcome your feedback.
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
using.
Customer Notification System
Register on our web site at www.microchip.com to receive the most current information on all of our products.
2007 - 2014 Microchip Technology Inc.
DS00001809A-page 3
LPC47M182
BLOCK DIAGRAM
SER_IRQ
SERIAL IRQ /
Interrupt
Generating
Registers
LAD[3:0]
LPC
Bus Interface
nLDRQ
PME /
Power Control
nIO_PME
(GP20-GP23)*
GP24*
GPIOs
VCC (3.3V)
F_CAP
Resume Reset
Generation
REF5V
Multi-Mode
Parallel Port with
ChiProtectTM
High-Speed
16550A UART
PORT
VTR (3.3V)
V_5P0_STBY
High-Speed
16550A UART
PORT 2
W/ Infrared
5V Reference
Generation
REF5V_STBY
nAUD_LINK_RST
nCDC_DWN_ENAB*
CNR Logic
Configuration
Registers
nCDC_DWN_RST
nPCI_RST_OUT
BUSY, SLCT, PE,
nERROR, nACK
nSTROBE, nINITP,
nSLCTIN, nALF
RXD
TXD
nCTS
nRTS
nDSR
nDTR*
nDCD
nRI
RXD2
TXD2
nCTS2
nRTS2
nDSR2
nDTR2
nDCD2
nRI2
IRRX2
IRTX2
KDAT, MDAT
Buffered
PCI Reset
nIDE_RSTDRV
nPCI_RESET
Keyboard/Mouse
8042 Controller
nPRIMARY_HD
WDATA
nFPRST
WCLOCK
RCLOCK
nWGATE, nHDSEL
nTRK0, nDSKCHG,
nINDEX, nWRTPRT
DRVDEN0, DRVDEN1
RDATA
DIGITAL DATA
SEPARATOR
WITH WRITE
PRECOMPENSATION
nRDATA
SMSC PROPRIETARY
82077 COMPATIBLE
VERTICAL FLOPPYDISK
CONTROLLER CORE
nDIR, nSTEP,
nDS0, nMTR0
DDCSDA_3V*
DDCSCL_3V*
VGA
Voltage
Translation
DDCSCL_5V*
SMB_CLK_R
SMB_DAT_R
SMB_DAT_M
SMBus
Isolation
SMB_CLK_M
nSLP_S3
nSLP_S5
nCPU_PRESENT
PWRGD_PLATFORM
Power
Sequencing
nPS_ON
PWRGD_PS
DDCSDA_5V*
nBACKFEED_CUT
LATCHED_BF_CUT
SCK_BJT_GATE
KCLK, MCLK
GA20M
nKBDRST
Hard Drive
Front Panel
LED
nSECONDARY_HD
nSCSI
nHD_LED
nWDATA
nPCI_RST_OUT2
DS00001809A-page 4
XOR*
TEST_EN
FAN_TACH2*
FAN_TACH1*
PD[7:0]
LPC47M182
(128 QFP)
GP10-GP15, GP16*, GP17*
nRSMRST
XOR-Chain
Internal Bus
(Data, Address, and Control lines)
nLPCPD
V_5P0_STBY
FAN
Monitoring
Power LED
nLFRAME
nPCI_RESET
YLW_LED
CLOCKI
CLOCK
GEN
nSLP_S5
PCI_CLK
GRN_LED
LPC47M182 BLOCK DIAGRAM
CLOCKI32
FIGURE 1:
Note 1: This diagram shows the
various functions available on the chip
(not pin layout). The block diagram
should not be used for pin count.
Note 2: Functions with asterisks (*)
are located on multifunctional pins.
2007 - 2014 Microchip Technology Inc.
LPC47M182
PACKAGE OUTLINE
Note:
For the most current package drawings, see the Microchip Packaging Specification at:
http://www.microchip.com/packaging.
FIGURE 2:
A
A1
A2
D
D1
E
E1
H
L
L1
e
θ
W
R1
R2
ccc
128-PIN QFP PACKAGE, 14 X 20 X 2.7 MM BODY, 3.2 MM FOOTPRINT
MIN
~
0.05
2.55
23.00
19.90
17.00
13.90
0.09
0.73
~
0o
0.10
0.08
0.08
~
NOMINAL
~
~
~
23.20
20.00
17.20
14.00
~
0.88
1.60
0.50 Basic
~
~
~
~
~
MAX
3.4
0.5
3.05
23.40
20.10
17.40
14.10
0.20
1.03
~
7o
0.30
~
0.30
0.08
REMARKS
Overall Package Height
Standoff
Body Thickness
X Span
X body Size
Y Span
Y body Size
Lead Frame Thickness
Lead Foot Length
Lead Length
Lead Pitch
Lead Foot Angle
Lead Width
Lead Shoulder Radius
Lead Foot Radius
Coplanarity
Note 1: Controlling Unit: millimeter.
2: Tolerance on the position of the leads is ± 0.04 mm maximum.
3: Package body dimensions D1 and E1 do not include the mold protrusion.
Maximum mold protrusion is 0.25 mm.
4: Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane.
5: Details of pin 1 identifier are optional but must be located within the zone indicated.
2007 - 2014 Microchip Technology Inc.
DS00001809A-page 5
LPC47M182
APPENDIX A:
TABLE A-1:
PRODUCT BRIEF REVISION HISTORY
REVISION HISTORY
Revision
DS00001809A (08-27-14)
DS00001809A-page 6
Section/Figure/Entry
Correction
Replaces previous SMSC version Rev. 1.9 (03-23-07)
2007 - 2014 Microchip Technology Inc.
LPC47M182
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Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make
files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information:
• Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s
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• General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion
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CUSTOMER CHANGE NOTIFICATION SERVICE
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To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions.
CUSTOMER SUPPORT
Users of Microchip products can receive assistance through several channels:
•
•
•
•
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales
offices are also available to help customers. A listing of sales offices and locations is included in the back of this document.
Technical support is available through the web site at: http://www.microchip.com/support
2007 - 2014 Microchip Technology Inc.
DS00001809A-page 7
LPC47M182
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.(1)
-
Device
Device:
Package:
Tape and Reel
Option:
XXX(2)
Package
[X](3)
-
Tape and Reel
Option
Example:
LPC47M182-NW = 128-pin QFP
LPC47M182 (1)
128-pin QFP (2)
NW
=
Blank
TR
= Tray packaging
= Tape and Reel (3)
DS00001809A-page 8
Note 1:
These products meet the halogen maximum
concentration values per IEC61249-2-21.
Note 2:
All package options are RoHS compliant.
For RoHS compliance and environmental
information, please visit http://www.microchip.com/pagehandler/en-us/aboutus/
ehs.html .
Note 3:
Tape and Reel identifier only appears in the
catalog part number description. This identifier is used for ordering purposes and is not
printed on the device package. Check with
your Microchip Sales Office for package
availability with the Tape and Reel option.
2007 - 2014 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be
superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO
REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold
harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or
otherwise, under any Microchip intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck,
MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and
UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
The Embedded Control Solutions Company and mTouch are registered trademarks of Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, KleerNet, KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK,
MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, RightTouch logo, REAL ICE, SQI, Serial
Quad I/O, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
other countries.
All other trademarks mentioned herein are property of their respective companies.
© 2007 - 2014, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 9781632764973
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
2007 - 2014 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS00001809A-page 9
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DS00001809A-page 10
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2007 - 2014 Microchip Technology Inc.
