LPC47N217
64-Pin Super I/O with LPC Interface
Product Features
• 3.3 Volt Operation (5V tolerant)
• Programmable Wakeup Event Interface
(IO_PME# Pin)
• SMI Support (IO_SMI# Pin)
• GPIOs (14)
• Two IRQ Input Pins
• XNOR Chain
• PC99a, PC2001
• ACPI 2.0 Compliant
• 64-pin STQFP RoHS Compliant Package
• Intelligent Auto Power Management
• Serial Ports
- One Full Function Serial Port
- High Speed 16C550A Compatible UART with
Send/Receive 16-Byte FIFO
- Supports 230k and 460k Baud
- Programmable Baud Rate Generator
- Modem Control Circuitry
• Infrared Communications Controller
- IrDA v1.2 (4Mbps), HPSIR, ASKIR, Consumer IR Support
- 1 IR Port
- 96 Base I/O Address, 15 IRQ Options and 3
DMA Options
• Multi-Mode Parallel Port with ChiProtectTM
- Standard Mode IBM PC/XT, PC/AT, and PS/2
Compatible Bidirectional Parallel Port
- Enhanced Parallel Port (EPP) Compatible EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant)
- IEEE 1284 Compliant Enhanced Capabilities
Port (ECP)
- ChiProtect Circuitry for Protection Against
Damage Due to Printer Power-On
- 192 Base I/O Address, 15 IRQ and 3 DMA
Options
• LPC Bus Host Interface
- Supports LPC Bus frequencies of 19.2 MHz
to 33 MHz
- Multiplexed Command, Address and Data
Bus
- 8-Bit I/O Transfers
- 8-Bit DMA Transfers
- 16-Bit Address Qualification
2006 - 2014 Microchip Technology Inc.
- Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems
- PCI CLKRUN# Support
- Power Management Event (IO_PME#) Interface Pin
Description
The Microchip LPC47N217 is a 3.3V PC 99, PC2001,
and ACPI 2.0 compliant Super I/O Controller. The
LPC47N217 implements the LPC interface, a pin
reduced ISA interface which provides the same or better performance as the ISA/X-bus with a substantial
savings in pins used. The part also includes 14 GPIO
pins.
The LPC47N217 incorporates a 16C550A compatible
UART and one Multi-Mode parallel port with ChiProtect
circuitry plus EPP and ECP support. This device also
offers a full 16-bit internally decoded address bus, a
Serial IRQ interface with PCI CLKRUN# support, relocatable configuration ports, and three DMA channel
options.
The on-chip UART is compatible with the 16C550A.
There is a dedicated Serial Infrared interface UART,
which complies with IrDA v1.2 (Fast IR), HPSIR, and
ASKIR formats (used by Sharp and other PDAs), as
well as Consumer IR.
The parallel port is compatible with IBM PC/AT architectures, as well as IEEE 1284 EPP and ECP. The parallel port ChiProtect circuitry prevents damage caused
by an attached powered printer when the LPC47N217
is not powered.
The LPC47N217 features Software Configurable Logic
(SCL) for ease of use. SCL allows programmable system configuration of key functions such as the parallel
port and UART.
The LPC47N217 supports the ISA Plug-and-Play Standard register set (Version 1.0a) and provides the recommended functionality to support Windows operating
systems, PC99, and PC2001. The I/O Address, DMA
Channel, and Hardware IRQ of each device in the
LPC47N217 may be reprogrammed through the internal configuration registers. There are multiple I/O
address location options, a Serialized IRQ interface,
and three DMA channels.
DS00001810A-page 1
LPC47N217
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced.
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Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
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DS00001810A-page 2
2006 - 2014 Microchip Technology Inc.
LPC47N217
BLOCK DIAGRAM
FIGURE 1:
LPC47N217 BLOCK DIAGRAM
PD[0:7],
IO_SMI#*
IO_PME#
MULTI-MODE
PARALLEL
PORT
SMI PME WDT
CONTROL, ADDRESS, DATA
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#
PCI_RESET#
SERIAL
IRQ
CONFIGURATION
REGISTERS
nSLCTIN, nALF
nINIT, nSTROBE
GP10, GP11,
GP12*, GP13*,
GP14*,
GP23*,
GP4[0:7]
GENERAL
PURPOSE
I/O
SER_IRQ
PCI_CLK
BUSY, SLCT,
PE, nERROR, nACK
IRQIN1*, IRQIN2*
ACPI
BLOCK
TXD1, nRTS1, nDTR1
16C550
COMPATIBLE
SERIAL
PORT 1
LPC BUS
INTERFACE
nCTS1, RXD1,
nDSR1, nDCD1, nRI1
LPCPD#
CLKRUN#
IRTX2, IRMODE*
INFRARED
INTERFACE
CLOCK
GEN
V TR Vcc Vss
IRRX2, IRRX3*
CLOCKI
* Denotes Multifunction Pins
2006 - 2014 Microchip Technology Inc.
DS00001810A-page 3
LPC47N217
PACKAGE OUTLINE
Note:
For the most current package drawings, see the Microchip Packaging Specification at http://www.microchip.com/packaging.
FIGURE 2:
A
A1
A2
D
D1
E
E1
H
L
L1
e
θ
W
ccc
64-PIN STQFP PACKAGE, 7 X 7 X 1.4 BODY, 2 MM FOOTPRINT
Min
~
0.05
1.35
8.80
6.80
8.80
6.80
0.09
0.45
~
0o
0.13
~
Nominal
~
~
1.40
9.00
7.00
9.00
7.00
~
0.60
1.00 REF.
0.40 Basic
~
0.18
~
Max
1.60
0.15
1.45
9.20
7.20
9.20
7.20
0.20
0.75
~
7o
0.23
0.08
Remarks
Overall Package Height
Standoff
Body Thickness
X Span
X body Size
Y Span
Y body Size
Lead Frame Thickness
Lead Foot Length
Lead Length
Lead Pitch
Lead Foot Angle
Lead Width
Coplanarity
Note 1: Controlling Unit: millimeter.
2: Tolerance on the true position of the leads is ± 0.035 mm maximum.
3: Package body dimensions D1 and E1 do not include the mold protrusion.
Maximum mold protrusion is 0.25 mm per side. D1 and E1 dimensions determined at datum plane H.
4: Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane.
5: Details of pin 1 identifier are optional but must be located within the zone indicated.
DS00001810A-page 4
2006 - 2014 Microchip Technology Inc.
LPC47N217
APPENDIX A:
TABLE A-1:
PRODUCT BRIEF REVISION HISTORY
REVISION HISTORY
Revision
DS00001810A (08-07-14)
Section/Figure/Entry
Correction
Replaces previous SMSC version Rev.0.2 (09-21-06)
2006 - 2014 Microchip Technology Inc.
DS00001810A-page 5
LPC47N217
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files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information:
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To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions.
CUSTOMER SUPPORT
Users of Microchip products can receive assistance through several channels:
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Distributor or Representative
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Field Application Engineer (FAE)
Technical Support
Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales
offices are also available to help customers. A listing of sales offices and locations is included in the back of this document.
Technical support is available through the web site at: http://www.microchip.com/support
DS00001810A-page 6
2006 - 2014 Microchip Technology Inc.
LPC47N217
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.(1)
-
Device
Device:
Package:
Tape and Reel
Option:
XXX(2)
Package
[X](3)
-
Tape and Reel
Option
Example:
LPC47N217-JV = 64-pin STQFP
LPC47N217 (1)
64-pin STQFP (2)
JV
=
Blank
TR
= Tray packaging
= Tape and Reel (3)
2006 - 2014 Microchip Technology Inc.
Note 1:
These products meet the halogen maximum
concentration values per IEC61249-2-21.
Note 2:
All package options are RoHS compliant.
For RoHS compliance and environmental
information, please visit http://www.microchip.com/pagehandler/en-us/aboutus/
ehs.html .
Note 3:
Tape and Reel identifier only appears in the
catalog part number description. This identifier is used for ordering purposes and is not
printed on the device package. Check with
your Microchip Sales Office for package
availability with the Tape and Reel option.
DS00001810A-page 7
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be
superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO
REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR
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harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or
otherwise, under any Microchip intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck,
MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and
UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
The Embedded Control Solutions Company and mTouch are registered trademarks of Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, KleerNet, KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK,
MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, RightTouch logo, REAL ICE, SQI, Serial
Quad I/O, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
other countries.
All other trademarks mentioned herein are property of their respective companies.
© 2006 - 2014, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 9781632765093
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS00001810A-page 8
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
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DS00001810A-page 9
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