LPC47N237-MT

LPC47N237 3.3v I/O Controller for Port Replicators and Docking Stations Product Features Description • 3.3 Volt Operation (5V Tolerant) • 32 SMBus-Hosted General Purpose Input/Output Pins - SMBus Slave Controller Enables Read/Write Access to GPIO Ports - SMBus Runs on and GPIO Pins are Driven by Suspend Supply (VTR) - SMBus Interrupt Pin - SMBus Isolation Circuitry • PC99a/PC2001 Compliant • ACPI 1.0/2.0 Compliant • Power Management Interface • LPC Interface - Multiplexed Command, Address and Data Bus - Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems - nIO_PME pin for UART Ring Indicate - PCI Clock Run Support • 4 LPC-Hosted General Purpose Input/Output Pins • Serial Port - Full Function Serial Port - High Speed 16C550A Compatible UART with 16-Byte Send/Receive FIFOs - Programmable Baud Rate Generator supports 230k and 460k Baud - Modem Control Circuitry - 480 Address and 15 IRQ Options - Ring Indicator Wakeup Event • Multi-Mode™ Parallel Port with ChiProtect™ - Standard Mode IBM PC/XT®, PC/AT®, and PS/2™ Compatible Bidirectional Parallel Port - Enhanced Parallel Port (EPP) Compatible EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) - IEEE 1284 Compliant Enhanced Capabilities Port (ECP) - ChiProtect Circuitry for Protection - 480 Address, Up to 15 IRQ and Three DMA Options • XNOR-Chain • 100 pin TQFP RoHS Compliant Package The LPC47N237 is a 3.3V (5V Tolerant) PC99a/ PC2001 compliant Docking I/O controller. The device, which implements the LPC interface, includes I/O functionality. LPC47N237’s LPC interface supports LPC I/O and DMA cycles. There is also a SMBus hosted GPIO Block.  2006 - 2014 Microchip Technology Inc. The LPC47N237 provides 4 LPC general purpose pins which offer flexibility to the system designer. The legacy I/O included in the LPC47N237 are: a 16C550A compatible UART; one Multi-Mode parallel port including ChiProtect circuitry plus EPP and ECP. The parallel port is compatible with IBM PC/AT architecture, as well as IEEE 1284 EPP and ECP. The LPC47N237 incorporates sophisticated power control circuitry (PCC) which includes support for PME. The PCC supports multiple low power-down modes. The LPC47N237 is ACPI 1.0b/2.0 compatible. The I/O Address, DMA Channel and hardware IRQ of each logical device in the LPC47N237 may be reprogrammed through the internal configuration registers. There are up to 480 (960 for Parallel Port) I/O address location options, a Serialized IRQ interface, and three DMA channels. The SMBus hosted GPIO Block includes 32 GPIOs that are powered by standby supply. The GPIOs can be used to assert an interrupt on a change in state of a GPIO. These events are indicated on the nSMBINT pin. DS00001811A-page 1 LPC47N237 TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors@microchip.com. We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: http://www.microchip.com You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000). Errata An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision of silicon and revision of document to which it applies. To determine if an errata sheet exists for a particular device, please check with one of the following: • Microchip’s Worldwide Web site; http://www.microchip.com • Your local Microchip sales office (see last page) When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are using. Customer Notification System Register on our web site at www.microchip.com to receive the most current information on all of our products. DS00001811A-page 2  2006 - 2014 Microchip Technology Inc. LPC47N237 BLOCK DIAGRAM FIGURE 1: LPC47N237 BLOCK DIAGRAM 16C550A UART nSTROBE nALF nERROR nACK PE BUSY SLCT PD[7:0] nSLCTIN nINIT nRI nDCD nCTS nDTR nRTS TXD nDSR RXD VTR IBM XT/AT-COMPATIBLE PARALLEL PORT PCI_CLK nPCI_RESET LGP44-LGP47 LAD[3:0] LPC GPIO nLFRAME nLDRQ Clock nLPCPD VTR 24MHz_OUT CONFIGURATION REGISTERS nCLKRUN VCC nIO_PME XTAL2 VTR XTAL1 LPC BUS SER_IRQ VTR 24MHz Clock SMB_A0 VTR SMBUS GPIO VTR  2006 - 2014 Microchip Technology Inc. GP50-GP57 GP30-GP37 GP20-GP27 GP10-GP17 SDAT_2 SCLK_2 SMBus Isolation Circuitry SCLK_1 nSMBINT SDAT_1 VTR SCLK SDAT VTR DS00001811A-page 3 LPC47N237 PACKAGE OUTLINE Note: For the most current package drawings, see the Microchip Packaging Specification at http://www.microchip.com/packaging. FIGURE 2: A A1 A2 D D1 E E1 H L L1 e θ W R1 R2 ccc 1. 2. 3. 4. 5. LPC47N237 100-PIN TQFP PACKAGE Min ~ 0.05 1.35 15.80 13.90 15.80 13.90 0.09 0.45 ~ 0o 0.17 0.08 0.08 ~ Nominal ~ ~ ~ ~ ~ ~ ~ ~ 0.60 1.00 0.50 Basic ~ 0.22 ~ ~ ~ Max 1.60 0.15 1.45 16.20 14.10 16.20 14.10 0.20 0.75 ~ 7o 0.27 ~ 0.20 0.08 Remarks Overall Package Height Standoff Body Thickness X Span X body Size Y Span Y body Size Lead Frame Thickness Lead Foot Length Lead Length Lead Pitch Lead Foot Angle Lead Width Lead Shoulder Radius Lead Foot Radius Coplanarity Controlling Unit: millimeter. Tolerance on the position of the leads is ± 0.04 mm maximum. Package body dimensions D1 and E1 do not include the mold protrusion. Maximum mold protrusion is 0.25 mm. Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane. Details of pin 1 identifier are optional but must be located within the zone indicated. DS00001811A-page 4  2006 - 2014 Microchip Technology Inc. LPC47N237 APPENDIX A: TABLE A-1: PRODUCT BRIEF REVISION HISTORY REVISION HISTORY Revision DS00001811A (08-07-14) Section/Figure/Entry Correction Replaces previous SMSC version Rev. 0.3 (03-30-07)  2006 - 2014 Microchip Technology Inc. DS00001811A-page 5 LPC47N237 THE MICROCHIP WEB SITE Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: • Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software • General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions. CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • • • • Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://www.microchip.com/support DS00001811A-page 6  2006 - 2014 Microchip Technology Inc. LPC47N237 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO.(1) - Device Device: Package: Tape and Reel Option: XXX(2) Package [X](3) - Tape and Reel Option Example: LPC47N237-MT = 100-pin TQFP LPC47N237 (1) MT = 100-pin TQFP (2) Blank TR = Tray packaging = Tape and Reel (3)  2006 - 2014 Microchip Technology Inc. Note 1: These products meet the halogen maximum concentration values per IEC61249-2-21. Note 2: All package options are RoHS compliant. For RoHS compliance and environmental information, please visit http://www.microchip.com/pagehandler/en-us/aboutus/ ehs.html . Note 3: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. DS00001811A-page 7 Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. The Embedded Control Solutions Company and mTouch are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet, KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, RightTouch logo, REAL ICE, SQI, Serial Quad I/O, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2006 - 2014, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 9781632765123 QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == DS00001811A-page 8 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. 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