dsPIC30F
Family Overview
dsPIC® High-Performance 16-bit
Digital Signal Controller
© 2005 Microchip Technology Inc.
DS70043F
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
its use. Use of Microchip’s products as critical components in
life support systems is not authorized except with express
written approval by Microchip. No licenses are conveyed,
implicitly or otherwise, under any Microchip intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
PICMASTER, SEEVAL, SmartSensor and The Embedded
Control Solutions Company are registered trademarks of
Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Linear Active Thermistor,
MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM,
PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo,
PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode,
Smart Serial, SmartTel, Total Endurance and WiperLock are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2005, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS70043F-page ii
© 2005 Microchip Technology Inc.
dsPIC30F
dsPIC® High-Performance 16-bit
Digital Signal Controller Family Overview
Operating Range:
On-Chip Flash, Data EEPROM and SRAM:
• DC – 30 MIPS (30 MIPS @ 4.5-5.5V, -40 to 85°C)
• Wide VDD range: 2.5-5.5V
• Ind. (-40 to 85°C) and Ext. (-40 to 125°C)
• Flash program memory: up to 144 Kbytes:
- 10,000 erase/write cycles, min. (-40 to 85°C)
- 100,000 erase/write cycles, typical
• Data EEPROM: up to 4 Kbytes:
- 100,000 erase/write cycles, min. (-40 to 85°C)
- 1M erase/write cycles, typical
- Data EEPROM retention > 20 years
• Data SRAM: up to 8 Kbytes
High-Performance DSC CPU:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Modified Harvard architecture
C compiler optimized instruction set
16-bit wide data path
24-bit wide instructions
Linear program memory addressing up to 4M
instruction words
Linear data memory addressing up to 64 Kbytes
84 base instructions: mostly 1 word/1 cycle
16 16-bit General Purpose Registers (GPR)
2 40-bit accumulators:
- With rounding and saturation options
Flexible and powerful addressing modes:
- Indirect, Modulo and Bit-Reversed
Software stack
16 x 16 fractional/integer multiply operations
32/16 and 16/16 divide operations
Single cycle multiply-and-accumulate:
- Accumulator write back for DSP operations
- Dual data fetch
40-stage barrel shifter
System Management:
• Flexible clock options:
- External, crystal, resonator, internal RC
- Fully integrated PLL (4X, 8X, 16X)
- Extremely low jitter PLL
• Programmable Power-up Timer
• Oscillator start-up timer/stabilizer
• Watchdog Timer with its own RC oscillator
• Fail-Safe Clock Monitor
• Reset by multiple sources
Power Management:
•
•
•
•
Switch between clock sources in real time
Programmable low-voltage detect
Programmable Brown-out Reset
Idle and Sleep modes with fast wake-up
Interrupt Controller:
Timers/Capture/Compare/PWM:
•
•
•
•
• Timer/counters: up to 5 16-bit timers:
- Can pair up to make 32-bit timers
- 1 timer can run as real-time clock with external
32 KHz oscillator
- Programmable prescaler
• Input capture: up to 8 channels:
- Capture on up, down or both edges
- 16-bit Capture input functions
- 4-deep FIFO on each capture
• Output compare: up to 8 channels:
- Single or dual 16-bit Compare mode
- 16-bit glitchless PWM mode
5-cycle latency
Up to 45 interrupt sources, up to 5 external
7 programmable priority levels
4 processor exceptions
Digital I/O:
• Up to 54 programmable digital I/O pins
• Wake-up/Interrupt-on-change on up to 24 pins
• 25 mA sink and source on all I/O pins
© 2005 Microchip Technology Inc.
DS70043F-page 1
dsPIC30F
Communication Modules:
• 3-wire SPI™: up to 2 modules:
- Framing supports I/O interface to simple
codecs
- Supports 8-bit and 16-bit data
- Supports all serial clock formats and
sampling modes
• I2C™ full multi-master Slave mode support:
- 7-bit and 10-bit addressing
- Bus collision detection and arbitration
• UART: up to 2 modules:
- Interrupt-on-address bit detect
- Wake-up on Start bit from Sleep mode
- 4-character TX and RX FIFO buffers
• Data Conversion Interface (DCI) module
- Codec interface
- Supports I2S and AC’97 protocols
- Up to 16-bit data words, up to 16 words per
frame
- 4-word deep TX and RX buffers
• CAN 2.0B active: up to 2 modules:
- 3 transmit and 2 receive buffers
- 6 receive filters and 2 masks
- Loopback, Listen Only and Listen All
Messages modes for diagnostics and bus
monitoring
- Wake-up on CAN message
Motor Control Peripherals:
• Motor Control PWM: up to 8 channels:
- 4 duty cycle generators
- Independent or Complementary mode
- Programmable dead time and output polarity
- Edge or center aligned
- Manual output override control
- Up to 2 Fault inputs
- Trigger for A/D conversions
- PWM Frequency for 16-bit resolution
(@ 30 MIPS) = 915 Hz for Edge-Aligned
mode, 457.5 Hz for Center-Aligned mode
- PWM Frequency for 11-bit resolution
(@ 30 MIPS) = 29.3 KHz for Edge-Aligned
mode, 14.65 KHz for Center-Aligned mode
• Quadrature Encoder Interface module:
- Phase A, Phase B and index pulse input
- 16-bit up/down position counter
- Count direction status
- Position Measurement (x2 and x4) mode
- Programmable digital noise filters on inputs
- Alternate 16-bit Timer/Counter mode
- Interrupt on position counter rollover/
underflow
Analog-to-Digital Converters:
• 10-bit 1 Msps A/D Converter module:
- 2 or 4 simultaneous samples
- Up to 16 input channels with auto scanning
- 16 deep result buffer
- Conversion start can be manual or
synchronized with 1 of 4 trigger sources
- Conversion possible in Sleep mode
- ±1 LSB max. integral non-linearity
- ±1 LSB max. differential non-linearity
• 12-bit 200 ksps A/D Converter module:
- Up to 16 input channels with auto scanning
- 16 deep result buffer
- Conversion start can be manual or
synchronized with 1 of 3 trigger sources
- Conversion possible in Sleep mode
- ±1 LSB max. integral non-linearity
- ±1 LSB max. differential non-linearity
CMOS Flash Technology:
•
•
•
•
•
Low-power, high-speed Flash technology
Fully static design
Wide operating voltage range (2.5V to 5.5V)
Industrial and extended temperature ranges
Low-power consumption
Packaging:
•
•
•
•
•
•
80-pin TQFP (12x12x1 mm, 14x14x1 mm)
64-pin TQFP (10x10x1 mm, 14x14x1 mm)
40-pin DIP, 44-pin TQFP
28-pin DIP (300 mil), 28-pin SOIC
28-pin QFN
18-pin DIP (300 mil), 18-pin SOIC
Note:
DS70043F-page 2
See Table 1-1, Table 1-2 and Table 1-3 for
exact peripheral features per device.
© 2005 Microchip Technology Inc.
dsPIC30F
1.0
dsPIC30F PRODUCT FAMILIES
1.1
General Purpose Family
The dsPIC30F General Purpose Family (Table 1-1)
is ideal for a wide variety of 16-bit MCU embedded
applications. The variants with codec interfaces are
well suited for audio applications.
TABLE 1-1:
dsPIC30F GENERAL PURPOSE FAMILY VARIANTS
EEPROM
Bytes
Timer 16-bit
Input Capture
Output Compare
Std. PWM
Codec
Interface
A/D 12-bit
200 ksps
UART
SPI™
I2C™
CAN
I/O Pins (Max.)(1)
Packages (2)
40/44
24K
8K
2048
1024
3
2
2
—
13 ch
2
1
1
—
30
PG, PT
dsPIC30F4013
40/44
48K
16K
2048
1024
5
4
4
AC’97, I2S
13 ch
2
1
1
1
30
PG, PT
dsPIC30F5011
64
66K
22K
4096
1024
5
8
8
AC’97, I2S
16 ch
2
2
1
2
52
PT
dsPIC30F6011(3)
dsPIC30F6011A
64
132K
44K
6144
2048
5
8
8
—
16 ch
2
2
1
2
52
PF, PT
64
144K
48K
8192
4096
5
8
8
AC’97, I2S
16 ch
2
2
1
2
52
PF, PT
dsPIC30F5013
80
66K
22K
4096
1024
5
8
8
AC’97, I2S
16 ch
2
2
1
2
68
PT
dsPIC30F6013(3)
dsPIC30F6013A
80
132K
44K
6144
2048
5
8
8
—
16 ch
2
2
1
2
68
PF, PT
80
144K
48K
8192
4096
5
8
8
AC’97, I2S
16 ch
2
2
1
2
68
PF, PT
Pins
dsPIC30F6012(3)
dsPIC30F6012A
Instructions
dsPIC30F3014
Device
Bytes
SRAM Bytes
Program
Memory
(3)
dsPIC30F6014
dsPIC30F6014A
Motor Control and Power
Conversion Family
motors, and switched reluctance motors. They are also
well suited for Uninterrupted Power Supply (UPS),
inverters, switched mode power supplies and power
factor correction, and also for controlling the Power
Management module in servers, telecommunication
equipment and other industrial equipment.
These variants of dsPIC30F controllers (Table 1-2)
support a variety of motor control applications such as
brushless DC motors, single and 3-phase induction
Packages (2)
CAN
I/O Pins (Max.)(1)
I2C™
SPI™
UART
Quad Enc.
Output Compare/
Std. PWM
Input Capture
SRAM
Bytes
Pins
Instructions
Device
Bytes
Program
Memory
Timer 16-bit
dsPIC30F MOTOR CONTROL AND POWER CONVERSION FAMILY VARIANTS
EEPROM
Bytes
TABLE 1-2:
A/D
10-bit 1 Msps
1.2
Maximum I/O pin count includes pins shared by the peripheral functions.
All 28- and 40-pin devices may be offered in ML packages in the future, depending on die size.
This device is not recommended for new designs..
Motor Control PWM
Note 1:
2:
3:
dsPIC30F2010
28
12K
4K
512
1024
3
4
2
6 ch
6 ch
1
1
1
1
—
20
dsPIC30F3010
28
24K
8K
1024
1024
5
4
2
6 ch
6 ch
1
1
1
1
—
20
SOG, PG
dsPIC30F4012
28
48K
16K
2048
1024
5
4
2
6 ch
6 ch
1
1
1
1
1
20
SOG, PG
dsPIC30F3011
40/44
24K
8K
1024
1024
5
4
4
6 ch
9 ch
1
2
1
1
—
30
PG, PT
dsPIC30F4011
40/44
48K
16K
2048
1024
5
4
4
6 ch
9 ch
1
2
1
1
1
30
PG, PT
dsPIC30F5015
64
66K
22K
2048
1024
5
4
4
8 ch
16 ch
1
1
2
1
1
52
PT
dsPIC30F6015
64
144K
48K
8192
4096
5
8
8
8 ch
16 ch
1
2
2
1
2
52
PT
dsPIC30F6010(3)
dsPIC30F6010A
80
144K
48K
8192
4096
5
8
8
8 ch
16 ch
1
2
2
1
2
68
PF, PT
Note 1:
2:
3:
SOG, PG, ML
Maximum I/O pin count includes pins shared by the peripheral functions.
All 28- and 40-pin devices may be offered in ML packages in the future, depending on die size.
This device is not recommended for new designs.
© 2005 Microchip Technology Inc.
DS70043F-page 3
dsPIC30F
1.3
Sensor Family
The dsPIC30F Sensor Family products (Table 1-3)
have features that support high-performance, low-cost
embedded control applications. The 18- and 28-pin
packages are designed to fit space-critical applications.
SRAM
Bytes
EEPROM
Bytes
Timer 16-bit
Input Capture
Output Compare
Std. PWM
A/D 12-bit
200 Ksps
UART
SPI™
I2C™
I/O Pins ( Wn)
1
1 (2 or 3)
CPSLT
Wb,Wn
Signed Compare Wb with Wn, Skip if Less Than (Wb < Wn)
1
1 (2 or 3)
CPSNE
Wb,Wn
Signed Compare Wb with Wn, Skip if Not Equal (Wb ≠ Wn)
1
1 (2 or 3)
Note 1:
2:
Bit positions are specified by bit4 (0:15) for word operations.
Conditional skip instructions execute in 1 cycle if the skip is not taken, 2 cycles if the skip is taken over a
one-word instruction and 3 cycles if the skip is taken over a two-word instruction.
DS70043F-page 40
© 2005 Microchip Technology Inc.
dsPIC30F
TABLE 10-9:
PROGRAM FLOW INSTRUCTIONS
Assembly
Syntax
BRA
Expr
Branch unconditionally
BRA
Wn
Computed branch
1
2
BRA
C,Expr
Branch if Carry (no Borrow)
1
1 (2)
BRA
GE,Expr
Branch if greater than or equal
1
1 (2)
BRA
GEU,Expr
Branch if unsigned greater than or equal
1
1 (2)
BRA
GT,Expr
Branch if greater than
1
1 (2)
BRA
GTU,Expr
Branch if unsigned greater than
1
1 (2)
BRA
LE,Expr
Branch if less than or equal
1
1 (2)
BRA
LEU,Expr
Branch if unsigned less than or equal
1
1 (2)
BRA
LT,Expr
Branch if less than
1
1 (2)
BRA
LTU,Expr
Branch if unsigned less than
1
1 (2)
BRA
N,Expr
Branch if Negative
1
1 (2)
BRA
NC,Expr
Branch if not Carry (Borrow)
1
1 (2)
BRA
NN,Expr
Branch if not Negative
1
1 (2)
BRA
NOV,Expr
Branch if not Overflow
1
1 (2)
BRA
NZ,Expr
Branch if not Zero
1
1 (2)
BRA
OA,Expr
Branch if Accumulator A Overflow
1
1 (2)
BRA
OB,Expr
Branch if Accumulator B Overflow
1
1 (2)
BRA
OV,Expr
Branch if Overflow
1
1 (2)
BRA
SA,Expr
Branch if Accumulator A Saturate
1
1 (2)
BRA
SB,Expr
Branch if Accumulator B Saturate
1
1 (2)
BRA
Z,Expr
Branch if Zero
1
1 (2)
CALL
Expr
Call subroutine
2
2
CALL
Wn
Call indirect subroutine
1
2
DO
#lit14,Expr
Do code through PC + Expr, (lit14 + 1) times
2
2
DO
Wn,Expr
Do code through PC + Expr, (Wn + 1) times
2
2
GOTO
Expr
Go to address
2
2
GOTO
Wn
Go to address indirectly
1
2
RCALL
Expr
Relative call
1
2
RCALL
Wn
Computed call
1
2
REPEAT
#lit14
Repeat next instruction (lit14 + 1) times
1
1
REPEAT
Wn
Repeat next instruction (Wn + 1) times
1
1
Return from interrupt enable
1
3 (2)
Return with lit10 in Wn
1
3 (2)
Return from subroutine
1
3 (2)
RETFIE
RETLW
#lit10,Wn
RETURN
Note 1:
2:
Description
Words
Cycles
1
2
Conditional branch instructions execute in 1 cycle if the branch is not taken, or 2 cycles if the branch is
taken.
RETURN normally executes in 3 cycles. However, it executes in 2 cycles if an interrupt is pending.
© 2005 Microchip Technology Inc.
DS70043F-page 41
dsPIC30F
TABLE 10-10: SHADOW/STACK INSTRUCTIONS
Assembly
Syntax
LNK
#lit14
POP
POP
POP.D
Words
Cycles
Link Frame Pointer
1
1
f
Pop TOS to f
1
1
Wd
Pop TOS to Wd
1
1
Wnd
Double pop from TOS to Wnd:Wnd + 1
1
2
Pop shadow registers
1
1
POP.S
Description
PUSH
f
Push f to TOS
1
1
PUSH
Ws
Push Ws to TOS
1
1
PUSH.D
Wns
Push double Wns:Wns + 1 to TOS
1
2
PUSH.S
Push shadow registers
1
1
ULNK
Unlink Frame Pointer
1
1
Words
Cycles
TABLE 10-11: CONTROL INSTRUCTIONS
Assembly
Syntax
Description
Clear Watchdog Timer
1
1
Disable interrupts for (lit14 + 1) instruction cycles
1
1
NOP
No operation
1
1
NOPR
No operation
1
1
CLRWDT
DISI
PWRSAV
#lit14
#lit1
RESET
Enter Power-Saving mode lit1
1
1
Software device Reset
1
1
Words
Cycles
TABLE 10-12: DSP INSTRUCTIONS
Assembly
Syntax
ADD
Acc
Add accumulators
1
1
ADD
Ws,#Slit4,Acc
16-bit signed add to Acc
1
1
CLR
Acc,Wx,Wxd,Wy,Wyd,AWB
Clear Acc
1
1
ED
Wm*Wm,Acc,Wx,Wy,Wxd
Euclidean distance (no accumulate)
1
1
EDAC
Wm*Wm,Acc,Wx,Wy,Wxd
Euclidean distance
1
1
LAC
Ws,#Slit4,Acc
Load Acc
1
1
MAC
Wm*Wn,Acc,Wx,Wxd,Wy,Wyd,AWB
Multiply and accumulate
1
1
MAC
Wm*Wm,Acc,Wx,Wxd,Wy,Wyd
Square and accumulate
1
1
MOVSAC
Acc,Wx,Wxd,Wy,Wyd,AWB
Move Wx to Wxd and Wy to Wyd
1
1
MPY
Wm*Wn,Acc,Wx,Wxd,Wy,Wyd
Multiply Wn by Wm to Acc
1
1
MPY
Wm*Wm,Acc,Wx,Wxd,Wy,Wyd
Square to Acc
1
1
MPY.N
Wm*Wn,Acc,Wx,Wxd,Wy,Wyd
-(Multiply Wn by Wm) to Acc
1
1
MSC
Wm*Wn,Acc,Wx,Wxd,Wy,Wyd,AWB
Multiply and subtract from Acc
1
1
NEG
Acc
Negate Acc
1
1
SAC
Acc,#Slit4,Wd
Store Acc
1
1
SAC.R
Acc,#Slit4,Wd
Store rounded Acc
1
1
SFTAC
Acc,#Slit6
Arithmetic shift Acc by Slit6
1
1
SFTAC
Acc,Wn
Arithmetic shift Acc by (Wn)
1
1
SUB
Acc
Subtract accumulators
1
1
DS70043F-page 42
Description
© 2005 Microchip Technology Inc.
dsPIC30F
11.0
MICROCHIP DEVELOPMENT
TOOL SUPPORT
Microchip offers comprehensive development tools
and libraries to support the dsPIC30F architecture. In
addition, the company is partnering with many third
TABLE 11-1:
dsPIC30F DEVELOPMENT TOOLS
Development
Tool
Essential
Software Tools
party tools manufacturers for additional dsPIC30F
device support. Table 11-1 lists development tools that
support the dsPIC30F family. The paragraphs that
follow describe each of the tools in more detail.
Part #
From
List
Price*
MPLAB® IDE 6.xx Integrated Development Environment
(see 11.1)
—
Microchip
Free
MPLAB ASM30
(see 11.2)
Assembler (included in MPLAB IDE)
—
Microchip
Free
MPLAB SIM30
(see 11.3)
Software Simulator (Included in MPLAB IDE)
—
Microchip
Free
MPLAB VDI
(see 11.4)
Visual Device Initializer for dsPIC30F
(included in MPLAB IDE)
—
Microchip
Free
MPLAB C30
(see 11.5)
ANSI C Compiler, Assembler, Linker and Librarian
SW006012
Microchip
$895
MPLAB ICD 2
(see 11.6)
In-Circuit Debugger and Device Programmer
DV164005
Microchip
$159
In-Circuit Debugger and Device Programmer
With dsPIC30F “Getting Started” Development Board
DV164030
Microchip
$209
Description
In-Circuit Emulator Pod
ICE4000
Microchip
$2560
PMF30XA1
Microchip
$595
Device Adapter for 80L TQFP Devices
DAF30-2
Microchip
$295
Device Adapter for 64L TQFP Devices
DAF30-2
Microchip
$295
Device Adapter for 44L TQFP Devices
DAF30-3
Microchip
$295
Device Adapter for 18L/28L/40L DIP Devices
DAF30-4
Microchip
$295
Processor Module for dsPIC30F
Essential Hardware Tools
MPLAB ICE 4000
(see 11.7)
MPLAB
PRO MATE® II
(see 11.8)
MPLAB PM3
(see 11.9)
Full Featured Device Programmer, Base Unit
DV007003
Microchip
$695
ICSP Socket Module
AC004004
Microchip
$349
Socket Module for 18L DIP/SOIC Devices
AC30F005
Microchip
$189
Socket Module for 28L DIP/SOIC Devices
AC30F004
Microchip
$189
Socket Module for 40L DIP Devices
AC30F003
Microchip
$159
Socket Module for 44L TQFP Devices
AC30F006
Microchip
$159
Socket Module for 64L TQFP Devices (14 mm x 14 mm)
AC30F002
Microchip
$159
Socket Module for 80L TQFP Devices (14 mm x 14 mm)
AC30F001
Microchip
$159
Full Featured Device Programmer, Base Unit
DV007004
Microchip
$895
Socket Module for 18/28/40L DIP Devices
AC164301
Microchip
$189
Socket Module for 18L SOIC Devices
AC164302
Microchip
$189
Socket Module for 28L SOIC Devices
AC164302
Microchip
$189
Socket Module for 44L TQFP Devices
AC164305
Microchip
$189
Socket Module for 64L TQFP Devices (14 mm x 14 mm)
AC164313
Microchip
$189
Socket Module for 80L TQFP Devices (14 mm x 14 mm)
AC164314
Microchip
$189
* List Prices are subject to change without notice. Visit www.microchip.com for the latest information.
© 2005 Microchip Technology Inc.
DS70043F-page 43
dsPIC30F
11.1
MPLAB® Integrated Development
Environment V6.XX Software
The MPLAB Integrated Development Environment
(IDE) is available at no cost. The MPLAB IDE lets you
edit, compile and emulate from a single user interface,
as depicted in Figure 11-1. You can design and develop
code for the dsPIC devices in the same design
environment as PICmicro microcontrollers. The
MPLAB IDE is a 32-bit Windows® based application
that provides many advanced features for the
demanding engineer in a modern, easy-to-use
interface. MPLAB IDE integrates:
•
•
•
•
Full featured, color coded text editor
Easy-to-use project manager with visual display
Source level debugging
Enhanced source level debugging for ‘C’
(structures, automatic variables, etc.)
• Customizable toolbar and key mapping
• Dynamic status bar displays processor condition
• Context sensitive, interactive on-line help
FIGURE 11-1:
• Integrated MPLAB SIM30 instruction simulator
• User interface for PRO MATE II and PICSTART
Plus device programmers (sold separately)
• User interface for MPLAB ICE 4000 In-Circuit
Emulator (sold separately)
• User interface for MPLAB ICD 2 In-Circuit
Debugger (sold separately)
The MPLAB IDE allows:
• Editing of source files in either assembly or ‘C’
• One-touch compiling and downloading to dsPIC
emulator or simulator
• Debugging using:
- Source files
- Machine code
- Mixed mode source and machine code
The ability to use the MPLAB IDE with multiple
development and debugging targets provides easy
transition from the cost effective simulator to MPLAB
ICD 2 or to a full featured emulator with minimal
retraining.
MPLAB IDE DESKTOP
Powerful Project Manager handles
multiple projects and all file types
Color keyed editor makes
source code debug easier
Set break/trace points with
a click of the mouse
Simply move your mouse over a
variable to view or modify
Fully customizable watch windows
to view and modify registers and
memory locations
Status bar updates on
singlestep or run
DS70043F-page 44
© 2005 Microchip Technology Inc.
dsPIC30F
11.2
MPLAB ASM30 Assembler/Linker/
Librarian
MPLAB ASM30 is a full-featured Macro Assembler.
User-defined macros, conditional assembly and a
variety of assembler directives make the MPLAB
ASM30 a powerful code generation tool.
The accompanying MPLAB LINK30 Linker and MPLAB
LIB30 Librarian modules allow efficient linking, library
creation and maintenance.
Notable features of the assembler include:
•
•
•
•
•
•
•
Support for the entire dsPIC instruction set
Support for fixed-point and floating-point data
Available for Windows
Command Line Interface
Rich Directive Set
Flexible Macro Language
MPLAB IDE compatibility
Notable features of the linker include:
• Automatic or user-defined stack allocation
• Supports dsPIC Program Space Visibility (PSV)
window
• Available for Windows
• Command Line Interface
• Linker scripts for all dsPIC devices
• MPLAB IDE compatibility
11.3
MPLAB SIM30 Software Simulator
The MPLAB SIM30 software simulator provides code
development for the dsPIC30F family in a PC-hosted
environment by simulating the dsPIC30F device on an
instruction level. On any instruction you can examine or
modify the data areas and apply stimuli to any of the
pins from a file or by pressing a user-defined key
•
•
•
•
Motor Control PWM
UART
I/O Ports
Program Flash and Data EEPROM
11.4
MPLAB Visual Device Initializer
The MPLAB Visual Device Initializer (VDI) simplifies
the task of configuring the dsPIC30F. MPLAB VDI
software allows you to configure the entire processor
graphically (see Figure 11-2). And when you’re done, a
mouse click generates your code in Assembly or
C code. MPLAB VDI performs extensive error checking
on assignments and conflicts on pins, memories and
interrupts as well as selection of operating conditions.
Generated code files are integrated seamlessly with
the rest of our application code through MPLAB
Project.
Detailed resource assignment and configuration
reports simplify project documentation. Key features of
MPLAB VDI include:
•
•
•
•
Drag-and-drop feature selection
One click configuration
Extensive error checking
Generates initialization code in the form of a
C-callable assembly function
• Integrates seamlessly in MPLAB Project
• Printed reports ease project documentation
requirements
• MPLAB Visual Device Initializer is an MPLAB
plug-in and can be installed independently of
MPLAB
FIGURE 11-2:
MPLAB VDI DISPLAY
The execution can be performed in Single Step,
Execute Until Break or Trace mode. The MPLAB
SIM30 software simulator fully supports symbolic
debugging using the MPLAB C30 compiler and
assembler. The software simulator gives you the
flexibility to develop and debug code outside of the
laboratory environment, making it an excellent multiproject software development tool. Complex stimuli
can be injected from files, synchronous clocks or userdefined keys. Output files log register activity for
sophisticated post analysis.
Besides modeling the behavior of the CPU, MPLAB
SIM 30 also supports the following peripherals:
•
•
•
•
Timers
Input Capture
12-bit ADC
10-bit ADC
© 2005 Microchip Technology Inc.
DS70043F-page 45
dsPIC30F
11.5
MPLAB C30 Compiler/Linker/
Librarian
The MPLAB C30 has these characteristics:
• 16-bit native data types
• Efficient use of register based, 3-operand
instructions
• Complex addressing modes
• Efficient multi-bit shift operations
• Efficient signed/unsigned comparisons
The Microchip Technology MPLAB C30 provides C
language support for the dsPIC30F family. This C
compiler is a fully ANSI compliant product with
standard libraries. It is highly optimizing for the
dsPIC30F family and takes advantage of many
dsPIC30F architecture specific features to help you
generate very efficient software code. Figure 11-3
illustrates the code size efficiency relative to several
competitors.
MPLAB C30 comes complete with its own assembler,
linker and librarian. These allow mixed-mode C and
assembly programs and link the resulting object files
into a single executable file. The compiler is sold
separately. The assembler, linker and librarian are
available for free with MPLAB C30.
MPLAB C30 also provides extensions that allow for
excellent support of the hardware, such as interrupts
and peripherals. It is fully integrated with the MPLAB
IDE for high level, source debugging.
FIGURE 11-3:
MPLAB C30 also includes the Math Library, Peripheral
Library, DSP Library and standard C libraries.
RELATIVE CODE SIZE (IN BYTES)
Relative Code Size
16-bit Applications (~ 40KB code)
32-bit Applications (~ 50KB code)
221%
190%
154%
155%
157%
159%
138%
114%
115%
115%
100%
100%
A
MPLAB C30
v1.20
DS70043F-page 46
B
C
D
(Leading Competitors)
E
A
MPLAB C30
v1.20
B
C
D
E
(Leading Competitors)
© 2005 Microchip Technology Inc.
dsPIC30F
11.6
MPLAB ICD 2 In-Circuit Debugger
The MPLAB ICD 2 In-Circuit Debugger is a powerful, low
cost, run-time development tool that uses in-circuit
debugging capability built into the dsPIC30F Flash
devices. This feature, along with Microchip’s In-Circuit
Serial ProgrammingTM protocol, gives you cost effective,
in-circuit debugging from the graphical user interface of
MPLAB. It lets you develop and debug source code by
watching variables, single-stepping and setting
breakpoints as well as run at full speed to test hardware
in real time.
The MPLAB ICD 2 has these features:
•
•
•
•
Full speed operation to the range of the device
Serial or USB PC connector
USB powered from PC interface
Low noise power (VPP and VDD) for use with
analog and other noise sensitive applications
• Operation down to 2.0V
• Can be used as debugger and inexpensive serial
programmer
• Some device resources required (RAM and 2
pins)
FIGURE 11-4:
MPLAB ICD 2 IN-CIRCUIT
DEBUGGER
11.7
MPLAB ICE 4000 In-Circuit
Emulator
The MPLAB ICE 4000 In-Circuit Emulator gives you a
complete hardware design tool for dsPIC30F devices.
Software control of the emulator by MPLAB IDE lets
you edit, build, download and source debug from a
single environment. The MPLAB ICE 4000 is a full
featured emulator system with enhanced trace, trigger
and data monitoring features. Interchangeable
processor modules allow you to easily reconfigure the
system to emulate different processors. In addition to
the dsPIC30F family of digital signal controllers, the
MPLAB ICE 4000 supports the extended, high-end
PICmicro microcontrollers, the PIC18CXXX and
PIC18FXXX devices. The modular architecture of the
MPLAB ICE in-circuit emulator allows expansion to
support new devices.
The MPLAB ICE in-circuit emulator system has been
designed as a real-time emulation system, with
advanced features that are generally found on more
expensive development tools.
• Full speed emulation, up to 50 MHz bus speed, or
200 MHz external clock speed
• Low voltage emulation down to 1.8 volts
• Configured with 2 Mb program emulation memory,
additional modular memory up to 16 Mb
• 64K x 216-bit wide Trace Memory
• Unlimited software breakpoints
• Complex break, trace and trigger logic
• Multi-level trigger up to 4 levels
• Filter trigger functions to trace specific event
• 16-bit Pass counter for triggering on sequential
events
• 16-bit Delay counter
• 48-bit time-stamp
• Stopwatch feature
• Time between events
• USB and parallel printer port PC connection
FIGURE 11-5:
© 2005 Microchip Technology Inc.
MPLAB ICE 4000
IN-CIRCUIT EMULATOR
DS70043F-page 47
dsPIC30F
11.8
PRO MATE® II Universal Device
Programmer
The PRO MATE II universal device programmer is a
full-featured, CE-compliant programming tool, capable
of operating in both stand-alone and PC-hosted
modes. The PRO MATE II universal device
programmer has programmable VDD and VPP supplies,
which allow it to verify programmed memory at VDDMIN
and VDDMAX for maximum reliability. It has an LCD to
display instructions and error messages, keys to enter
commands and interchangeable socket modules for all
package types. In Stand-Alone mode, the PRO MATE
II universal device programmer can read, verify or
program PICmicro and dsPIC30F devices. It can also
set code protection in this mode. PRO MATE II features
include:
•
•
•
•
•
Runs under MPLAB IDE
Field upgradable firmware
Host, Safe and “Stand-Alone” operation
Automatic downloading of object file
SQTPSM serialization adds unique serial number
to each device programmed
• In-Circuit Serial Programming™ Kit (sold
separately)
• Interchangeable socket modules supports all
package options (sold separately)
If you already own a PRO MATE II universal device
programmer, the dsPIC30F family is fully supported
through a new set of socket modules.
11.9
MPLAB PM3 Universal Device
Programmer
When connected to a PC-host system, the MPLAB
PM3 programmer is seamlessly integrated with the
MPLAB Integrated Development Environment (IDE),
providing a user-friendly programming interface.
Key features of the MPLAB PM3 Programmer include:
• RS-232 or USB interface
• Integrated In-Circuit Serial Programming™
(ICSP™) interface
• Fast programming time
• Three operating modes:
- PC Host mode for full control
- Safe mode for secure data
- Stand-Alone mode for programming without a
PC
• Complete line of interchangeable socket modules
to support all Microchip devices and package
options (sold separately)
• SQTPsm serialization for programming unique
serial numbers while in PC Host mode.
• An alternate DOS command line interface for
batch control
• Supports PROMATE II socket modules via
adapter (sold separately)
• Large easy-to-read display
• Field upgradeable firmware allows quick new
device support
• Secure Digital (SD) and Multimedia Card (MMC)
external memory support
• Buzzer notification for noisy environments
FIGURE 11-6:
MPLAB PM3 DEVICE
PROGRAMMER
The MPLAB PM3 Universal Device Programmer is
easy to use with a PC or as a stand-alone unit to
program Microchip’s entire line of PICmicro devices as
well as the latest dsPIC30F DSC devices. The MPLAB
PM3 features a large and bright LCD unit (128x64
pixels) to display easy menus, programming statistics
and status information.
The MPLAB PM3 programmer has exceptional
programming speed to allow high production
throughput, especially important for large memory
devices. It also includes a Secure Digital/Multimedia
Card slot for easy and secure data storage and
transfer.
The MPLAB PM3 programmer is designed with 40
programmable socket pins, allowing each socket
module to be configured to support many different
devices. As a result, fewer socket modules are required
to support the entire line of Microchip parts. The socket
modules use multi-pin connectors for high reliability
and quick interchange. An adapter allows current
PROMATE® II socket modules to be used.
DS70043F-page 48
© 2005 Microchip Technology Inc.
dsPIC30F
12.0
dsPIC30F DEVELOPMENT TOOLS
AND APPLICATION LIBRARIES
Microchip offers a comprehensive set of tools and
libraries to help with rapid development of dsPIC30F
based application(s). Also, Microchip partners with key
third party tool manufacturers to develop quality
hardware and software tools in support of the
dsPIC30F product family.
TABLE 12-1:
SOFTWARE DEVELOPMENT TOOLS AND APPLICATION LIBRARIES
Development Tool
Software Libraries and Application Development Tools
Table 12-1 summarizes available and planned
dsPIC30F software tools and libraries. Microchip also
provides value added services such as skilled/certified
technical application contacts, reference designs and
hardware and software developers.
Description
Part #
From
List
Price*
dsPIC30F Math
Library (see 12.1)
Double Precision and Floating Point Library
(ASM, C Wrapper)
SW300020
Microchip
Free
dsPIC30F
Peripheral Library
(see 12.2)
Peripheral Initialization, Control and Utility Routines (C)
SW300021
Microchip
Free
dsPIC30F DSP
Library (see 12.3)
Essential DSP algorithm suite (Filters, FFT)
SW300022
Microchip
Free
dsPICworks™
(see 12.4)
Graphical data analysis and conversion tool for DSP
algorithms
SW300023
Microchip
Free
Digital Filter
Design (see 12.5)
Graphical IIR and FIR filter design package for
dsPIC30F
SW300001
Microchip
$249
CMX-RTX™
for dsPIC®
(see12.6)
Fully preemptive Real-Time Operating System (RTOS)
for dsPIC30F (from CMX)
CMX-RTX
for dsPIC
CMX
$4000
Fully preemptive Real-Time Operating System (RTOS)
for dsPIC30F
SW300031
Microchip
$4000
CMX-Tiny+™
for dsPIC
(see 12.6)
Preemptive Real-Time Operating System (RTOS)
for dsPIC30F (from CMX)
CMX-Tiny+
for dsPIC
CMX
$3000
Preemptive Real-Time Operating System (RTOS)
for dsPIC30F
SW300032
Microchip
$3000
CMX Scheduler™
(see 12.6)
Multi-tasking, preemptive scheduler for dsPIC30F
SW300030
Microchip
Free
TCP/IP Stack
(see 12.7)
CMX-MicroNet™ for dsPIC30F
TCP/IP connectivity and protocol support
CMXMicroNet
for dsPIC30F
CMX
Contact
Vendor
Soft Modem
Library
(see 12.8)
V.22bis/V.22 Soft Modem Library
SW300002
Microchip
Free
V.32bis/V.32 Soft Modem Library
SW300003
Microchip
Contact
Microchip
VOCAL
Technologies
Contact
Vendor
C, C++ Compilers and
IDE from Development
Partners
V.32 (non-trellis) Soft Modem Library
CANbedded
for dsPIC
(see12.9)
CAN Driver Library for dsPIC30F
Vector
Informatik
Contact
Vendor
osCAN for dsPIC
(see 12.10)
OSEK/VDX v2.2
Vector
Informatik
Contact
Vendor
Embedded
Workbench for
dsPIC30F
ISO/ANSI C and Embedded C++ Compiler in a
professional, extensible IDE (Windows 98/ME/NT4/
2000/XP) Special DSP support library
EWdsPIC 1
IAR
Contact
Vendor
C Compiler
ANSI C Compiler for dsPIC30F
dsPICC
HI-TECH
$950
C Compiler
C Compiler for dsPIC30F
PCDSP
CCS
$200
C Compiler
with IDE
C Compiler for dsPIC30F with IDE
PCWHD
CCS
$550
* Prices are subject to change without notice
© 2005 Microchip Technology Inc.
DS70043F-page 49
dsPIC30F
12.1
TABLE 12-2:
Math Library
The dsPIC30F Math Library is the compiled version of
the math library that is distributed with the highly
optimized, ANSI-compliant dsPIC30F MPLAB® C30
compiler (SW006012). It contains advanced single and
double-precision
floating-point
arithmetic
and
trigonometric functions from the standard C header file
. The library delivers small program code size
and data size, reduced cycles and high accuracy.
Memory Usage (bytes)(1)(2)
Code size
5250
Data size
4
Performance (cycles)(1)(3)
Features
• The Math library is callable from either MPLAB
C30 or dsPIC30F assembly language.
• The functions are IEEE-754 compliant, with
signed zero, signed infinity, NaN (Not a Number)
and denormal support and operated in the “round
to nearest” mode.
• Compatible with MPLAB ASM30 and MPLAB
LINK30, which are available at no charge from
Microchip’s web site.
add
122
sub
124
mul
109
div
361
Rem
385
Sqrt
492
Note 1:
2:
Table 12-2 shows the memory usage and performance
of the Math Library. Table 12-3 lists the math functions
that are included.
TABLE 12-3:
MEMORY USAGE AND
PERFORMANCE
3:
Results are based on using dsPIC30F
MPLAB C30 Compiler (SW006012)
version 1.20.
Maximum “Memory Usage” when all
functions in the library are loaded. Most
applications will use less.
Average 32-bit floating-point performance results.
MATH FUNCTIONS
Single and Double-Precision Floating-Point Functions
Arithmetic functions
Add, subtract, multiply, divide, remainder
Root and Power Functions
pow, sqrt
Trigonometric and Hyperbolic Functions
acos, asin, atan, atan2, cos, cosh, sin, sinh, tan, tanh
Logarithmic and Exponential Functions
exp, log, log10, frexp, ldexp
Rounding Functions
ceil, floor
Absolute Value Functions
fabs
Modular Arithmetic Functions
fmod, modf
Comparison and Conversions
Comparison, integer and floating-point conversions
DS70043F-page 50
© 2005 Microchip Technology Inc.
dsPIC30F
12.2
Peripheral Driver Library
12.3
DSP Algorithm Library
Microchip offers a free peripheral driver library that
supports the setup and control of dsPIC30F hardware
peripherals, including, but not limited to:
The free DSP library supports multiple filtering,
convolution, vector and matrix functions. Among the
supported functions are:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Analog-to-Digital Converter
Motor Control PWM
Quadrature Encoder Interface
UART
SPI
Data Converter Interface
I2C
General Purpose Timers
Input Capture
Output Compare/Simple PWM
CAN
I/O Ports and External Interrupts
Reset
In addition to the hardware peripherals, the library
supports software generated peripherals, such as
standard LCD drivers, which support a Hitachi style
controller.
The peripheral library consist of more than 270
functions as well as several macros for simple tasks
such as enabling and disabling interrupts. All peripheral
driver routines are developed and optimized using the
MPLAB C30 C Compiler. Electronic documentation
accompanies the peripheral library to help you become
familiar with and implement the library functions.
Key features of the dsPIC30F Peripheral Library
include:
• A library file for each individual device from the
dsPIC30F family, including functions
corresponding to peripherals present in that
particular device.
• C include files that let you take advantage of
pre-defined constants for passing parameters to
various library functions. There is an include file
for each peripheral module.
• Since the functions are in the form of precompiled
libraries, they can be called from a user
application program written in either MPLAB C30
or dsPIC30F assembly language.
• Included C source code allows you to customize
peripheral functions to suit your specific
application requirements.
• Predefined constants in the C include files
eliminate the need to refer to the details and
structure of every Special Function Register while
initializing peripherals or checking Status bits.
© 2005 Microchip Technology Inc.
Cascaded Infinite Impulse Response (IIR) Filters
Correlation
Convolution
Finite Impulse Response (FIR) Filters
Windowing Functions
FFTs
LMS Filter
Vector Addition and Subtraction
Vector Dot Product
Vector Power
Matrix Addition and Subtraction
Matrix Multiplication
Some DSP functions use double precision and floating
point arithmetic. All DSP routines are developed and
optimized in dsPIC30F assembly language and are
callable from both assembly and C language. The
Microchip MPLAB C30 and IAR C compilers are
supported.
Key features of the DSP Algorithm Library include:
• 49 total functions
• Full compliance with the Microchip dsPIC30F C30
Compiler, Assembler and Linker
• Simple user interface – just one library file and
one header file
• Functions are both C and assembly callable
• FIR filtering functions include support for Lattice,
Decimating, Interpolating and LMS filters
• IIR filtering functions include support for Canonic,
Transposed Canonic and Lattice filters
• FIR and IIR functions may be used with the filter
files generated by the dsPIC30F Filter Design
program
• Transform functions include support for in-place
and out-of-place DCT, FFT and IFFT transforms
• Window functions include support for Bartlett,
Blackman, Hamming, Hanning and Kaiser
windows
• Support for Program Space Visibility
• Complete function profile information including
register usage, cycle count and function size
information
• Electronic documentation is included to help you
comprehend and use the library functions
DS70043F-page 51
dsPIC30F
TABLE 12-4:
FUNCTION EXECUTION TIMES
Function
Cycle Count
Equation
Conditions(1)
Number of
Cycles(2)
Execution Time
@30 MIPS
Complex FFT(3)
-
N=64
3739
124.6 μs
(3)
-
N=128
8485
282.8 μs
Complex FFT(3)
-
N=256
19055
635.2 μs
Block FIR
53+N(4+M)
N=32, M=32
1205
40.2 μs
Block FIR Lattice
41+N(4+7M)
N=32, M=32
7337
244.6 μs
Complex FFT
Block IIR Canonic
Block IIR Lattice
Matrix Add
Matrix Transpose
36+N(8+7S)
N=32, S=4
1188
39.6 μs
46+N(16+7M)
N=32, M=8
2350
78.3 μs
20+3(C*R)
C=8, R=8
212
7.1 μs
16+C(6+3(R-1))
C=8, R=8
232
7.7 μs
17+3N
N=32
113
3.8 μs
19+7(N-2)
N=32
229
7.6 μs
Vector Multiply
17+4N
N=32
145
4.8 μs
Vector Power
16+2N
N=32
80
2.7 μs
Vector Dot Product
Vector Max
Note 1:
2:
3:
12.4
C = #columns, N = # samples, M = #taps, S = #sections, R = #rows
1 cycle = 33 nanoseconds @30 MIPS
Complex FFT routine inherently prevents overflow
dsPICworks™ Data Analysis and
DSP Software
FIGURE 12-1:
dsPICworks is a free data analysis and signal
processing package for use with Microsoft Windows
9x, NT, 2000 and XP platforms. It provides an extensive
number of functions encompassing:
• Wide variety of signal generators – Sine, Square,
Triangular, Window functions, Noise
• Extensive DSP functions – FFT, DCT, Filtering,
Convolution, Interpolation
• Extensive arithmetic functions – Algebraic
expressions, data-scaling, clipping etc.
• 1-D, 2-D and 3-D displays
• Multiple data quantization and saturation options
• Multi-channel data support
• Automatic “script file”-based execution options
available for any user-defined sequence of
dsPICworks functions
• File Import/Export interoperable with MPLAB IDE
• Digital filtering options support filters generated by
dsPIC Filter Design
• ASM30 assembler file option to export data tables
into dsPIC30F RAM.
DS70043F-page 52
12.4.1
dsPICworks Data
Analysis and DSP
Software
SIGNAL GENERATION:
dsPICworks™ Data Analysis and DSP Software
supports an extensive set of signal generators
including basic sine, square and triangle wave
generators as well as advanced generators for window
functions, unit step, unit sample, sine, exponential and
noise functions. Noise, with specified distribution, can
be added to any signal. Signals can be generated as 32
bit floating-point or as 16-bit fractional fixed point
values for any desired sampling rate. The length of the
generated signal is limited only by available disk space.
Signals can be imported or exported from or to MPLAB
file-register windows. Multi-channel data can be
created by a set of multiplexing functions.
© 2005 Microchip Technology Inc.
dsPIC30F
12.4.2
DIGITAL SIGNAL PROCESSING
(DSP) AND ARITHMETIC
OPERATIONS:
dsPICworks Data Analysis and DSP Software has a
wide range of DSP and arithmetic functions that can be
applied to signals. Standard DSP functions include
transform operations – FFT and DCT, convolution and
correlation, signal decimation, signal interpolation
sample rate conversion and digital filtering. Digital
filtering is an important part of dsPICworks. It uses
filters designed by the sister-application, dsPIC Filter
Design, and applies them to synthesized or imported
signals. dsPICworks also features special operations
such as signal clipping, scaling, and quantization – all
of which are vital in real practical analysis of DSP
algorithms.
12.4.3
DISPLAY AND MEASUREMENT:
dsPICworks Data Analysis and DSP Software has a
wide variety of display and measurement options.
Frequency domain data may be plotted in the form of
2-dimensional ‘spectrogram’ and 3-dimensional
‘waterfall’ options. The signals can be measured
accurately by a simple mouse-click. The log window
shows current cursor coordinates as well as derived
values such as difference from last position and signal
frequency. Signal strength can be measured over a
particular range of frequencies. Special support also
exists for displaying multi-channel and multiplexed
data. Graphs allow zoom options. The user can choose
from a set of color scheme options to customize display
settings.
12.4.4
12.5
Digital Filter Design Software
Utility
The Digital Filter Design tool for the dsPIC30F 16-bit
Digital Signal Controllers makes designing, analyzing
and implementing Finite Impulse Response (FIR) and
Infinite Impulse Response (IIR) digital filters easy
through a menu-driven, user-intuitive interface. This
tool performs complex mathematical computations for
filter design, provides superior graphical displays and
generates comprehensive design reports. Desired filter
frequency specifications are entered, and the tool
automatically generates the filter code and coefficient
files ready to use in the MPLAB® Integrated
Development Environment (IDE). System analysis of
the filter transfer function is supported with multiple
generated graphs such as: magnitude, phase, group
delay, log magnitude, impulse response and pole/zero
locations.
FIGURE 12-2:
DIGITAL FILTER DESIGN
TOOL INTERFACE
FILE IMPORT/EXPORT – MPLAB
AND MPLAB ASM30 SUPPORT:
dsPICworks Data Analysis and DSP Software allows
data to be imported from the external world in the form
of ASCII-text or binary files. Conversely, it also allows
data to be exported out in the form of files. dsPICworks
supports all file formats supported by the MPLAB
Import/Export Table. This feature allows the user to
bring real-world data from MPLAB into dsPICworks for
analysis. dsPICworks can also create ASM30
assembler files that can be included into the MPLAB
workspace.
© 2005 Microchip Technology Inc.
Key features of the Digital Filter Design tool include:
Finite Impulse Response Filter Design
• Design Method Selection:
- FIR Windows Design
- FIR Equiripple Design (Parks-McClellan)
• Lowpass, Highpass, Bandpass and Bandstop
filters
• FIR filters can have up to 513 taps
DS70043F-page 53
dsPIC30F
• The following window functions are supported:
- Rectangular
- Hanning (Hann)
- Hamming
- Triangular
- Blackman
- Exact Blackman
- 3 Term Cosine
- 3 Term Cosine with continuous 3rd Derivative
- Minimum 3 Term Cosine
- 4 Term Cosine
- 4 Term Cosine with continuous 5th Derivative
- Minimum 4 Term Cosine
- Good 4 Term Blackman Harris
- Harris Flat Top
- Kaiser
- Dolph-Tschebyscheff
- Taylor
- Gaussian
• Reports show design details such as window
coefficients and Impulse Response prior to
multiplying by the window function
Infinite Impulse Response Filter Design
• Lowpass, Highpass, Bandpass and Bandstop
Filters
• Filter orders up to 10 for Lowpass and Highpass
Filters
• Filter orders up to 20 for Bandpass and Bandstop
Filters
• Five Analog Prototype Filters are available:
- Butterworth
- Tschebyscheff
- Inverse Tschebyscheff
- Elliptic
- Bessel
• Digital Transformations are performed by Bilinear
Transformation Method
• Reports show design details such as all
transformations from normalized lowpass filter to
desired filter
Code Generation Features
• Generated files are compliant with the Microchip
dsPIC30F C30 Compiler, Assembler and Linker
• Choice of placement of coefficients in Program
Space or Data Space
• C wrapper/header code generation
DS70043F-page 54
Graphs
•
•
•
•
•
•
•
Magnitude Response vs. Frequency
Log Magnitude vs. Frequency
Phase Response vs. Frequency
Group Delay vs. Frequency
Impulse Response vs. Time (per sample)
Step Response vs. Time (per sample)
Pole and Zero Locations (IIR only)
12.6
Real-Time Operating Systems
Real-Time Operating System (RTOS) solutions for the
dsPIC30F product family provide the necessary
function calls and operating system routines to enable
you to write efficient C and/or assembly code for multitasking applications. RTOS is especially suited for
applications where program, and, more importantly,
data memory resources, are limited. Configurable and
optimized kernels support various RTOS application
requirements.
The dsPIC30F RTOS solutions are three-tiered:
• CMX-RTX™ full-featured fully-preemptive
multitasking RTOS
• CMX-Tiny+™ fully-preemptive scaled-down
version of CMX-RTX
• CMX-Scheduler™ fully-preemptive, multitasking,
mini RTOS (FREE)
12.6.1
CMX-RTX™
In some cases, well-structured linear programming is
sufficient for a product. However, in most cases,
programmers appreciate not having to worry about
structuring their code to perform all necessary tasks in
a timely manner. CMX-RTX helps by allowing tasks
(pieces of code that do specific duties) to run quasiconcurrently. That is, tasks seem to run at the same
time – doing many specific jobs simultaneously
CMX-RTX takes the headaches out of real-time
programming. The software lets the programmer
concentrate on the overall application while it takes
care of the details. CMX-RTX lets you finish projects
faster and more efficiently.
Some real-time operating systems offer only
cooperative scheduling, which means that the running
task is required to call the scheduler to perform a task
switch. Others offer time slicing in which each task runs
for a given period of time and then must switch tasks,
regardless of conditions. Still others claim to be fully
preemptive, yet they do not allow any interrupt to cause
a preemption. All of these models will fail at one point
or another.
© 2005 Microchip Technology Inc.
dsPIC30F
CMX-RTX allows a task of higher priority that is able to
run (whether starting or resuming) to preempt the
running task. The scheduler saves the context of the
running (lower priority) task and restores the context of
the higher priority task so that it is now running. A truly
preemptive RTOS allows interrupts to cause an
immediate task switch, which means that the interrupts
now have the added ability of using the RTOS’s
functions.
FIGURE 12-3:
FIGURE 12-4:
CMX-TINY+
CONFIGURATION
MANAGER
CMX-RTX
CONFIGURATION
MANAGER
12.6.2
CMX-TINY+™
CMX-Tiny+ is a compact, real-time operating system
that allows tasks to run quasi-concurrently, seeming to
process multiple jobs simultaneously. CMX-Tiny+ has
been especially designed to offer such a small Flash/
RAM footprint that it can be used with only the on-board
Flash/RAM of the dsPIC30F as a single-chip solution.
Based upon a scaled-down version of the popular
CMX-RTX, CMX-Tiny+ retains most of the power of
CMX-RTX, including its more frequently used
functions.
Key features of the CMX-RTX™ for dsPIC30F include:
•
•
•
•
•
•
•
•
•
•
•
•
The smallest footprint
The fastest context switch times
The lowest interrupt latency times
True preemption
Scheduler and interrupt handler written in
assembly for speed and code-size optimization
Optional cooperative and time-slicing scheduling
Nested interrupts
All functions contained in a library
Interrupt-callable functions
Scalability
Free source code provided
Integrated with CMX-MicroNet™ for optional
networking connectivity
© 2005 Microchip Technology Inc.
Like its larger counterpart, CMX-Tiny+ takes the headaches out of real-time programming. The software lets
the programmer concentrate on the overall embedded
application while taking care of the real-time program
details. The result is projects that are finished faster
and more efficiently.
CMX-Tiny+ allows a task of higher priority that is ready
to run (whether starting or resuming) to preempt the
running task. The scheduler saves the context of the
running (lower priority) task and restores the context of
the higher priority task so that it is now running. With
CMX-Tiny+, an interrupt can immediately preempt the
current task to ensure that a higher priority application
condition is handled. In other words, CMX-Tiny+ gives
interrupts the added capability of influencing the RTOS.
DS70043F-page 55
dsPIC30F
Key features of the CMX-Tiny+™ for dsPIC30F
include:
•
•
•
•
•
•
•
•
•
Extremely small Flash/RAM footprint
Truly preemptive RTOS
Low-Power mode supported
Full source code with every purchase
Free technical support and updates
Low, economical pricing
No royalties on shipped products
Backward compatible with CMX-Scheduler™
Integrated with CMX-MicroNet™ for optional
networking connectivity
12.6.3
CMX-SCHEDULER™
CMX-Scheduler is the result of a special collaboration
between CMX and Microchip. Available in object code
only, CMX-Scheduler is available for FREE to
embedded systems designers using the dsPIC
microcontrollers. CMX-Scheduler is specially designed
for developers whose designs do not require a fullblown RTOS and/or who are wondering if a kernel
might help their application. The perfect entry-level
kernel, CMX-Scheduler, is intuitive to use and easy to
implement.
CMX-Scheduler offers many growth paths for future
designs. User applications developed with the CMXScheduler kernel are upwardly compatible with the
popular CMX-Tiny+™ or CMX-RTX™. CMX-Scheduler
also is tightly integrated with the unique CMXMicroNet™ TCP/IP stack for those applications that
require networking connectivity.
CMX-Scheduler software and documentation is
delivered in electronic format and is freely licensed for
unlimited product usage on the dsPIC devices.
12.7
TCP/IP Stack (CMX-Micronet™)
CMX-Micronet is an embedded TCP/IP stack that is
specifically designed for optimized use of Flash and
RAM resources on dsPIC30F devices. The software
runs directly on the dsPIC30F with no gateways or PCs
required. The stack can be run in Stand-Alone mode or
work in conjunction with an RTOS. Using only industry
standard protocols, CMX-MicroNet offers true TCP/IP
networking via Direct, Dial Up or Ethernet connectivity
and Wireless Ethernet (802.11b) as well.
Up to 127 sockets can be open at a time. They can be
ethernet sockets and/or either PPP or SLIP sockets.
PPP and SLIP cannot be used at the same time. An
HTTP Web server, FTP server, SMTP client and DHCP
client are also available. The RS-232 link, if used, can
either be a direct cable link or through a modem.
Key features of CMX-MicroNet include:
• Tested and proven with hundreds of design wins
around the world
• Extremely small Flash/RAM requirements
• Software solution does not require additional
processor
• Web pages may contain CGI calls and Server
Side Includes
• FTP files, including new firmware
• Send e-mail
• Can serve up Java applets
• No proprietary protocols
• Runs stand-alone or with any RTOS
• Economical one-time fee
• Full source code provided
• No royalties on shipped products
• Excellent documentation and support
Key features of the CMX-Scheduler include:
•
•
•
•
•
•
•
•
•
•
FREE for use on any dsPIC device
Easy to learn and use
Truly preemptive kernel
Supports up to five tasks
Fast performance
Free bug fixes and updates
No royalties on shipped products
Compatible with CMX-Tiny+ and CMX-RTX
Complete electronic documentation
Integrated with CMX-MicroNet for optional
networking connectivity
DS70043F-page 56
FIGURE 12-5:
CMX-MICRONET USER
INTERFACE
© 2005 Microchip Technology Inc.
dsPIC30F
Supported Protocols
12.8
•
•
•
•
•
•
•
•
•
•
Microchip offers V.22/V.22bis (1200/2400 bps) and
V.32/V.32bis (9600/14400 bps) ITU-T specifications to
support a range of “connected” applications.
TCP
PPP
UDP
SLIP
IP
HTTP Web Server
DHCP
FTP
TFTP
SMTP
Applications that will benefit from these modem
specifications include:
•
•
•
•
•
•
•
•
•
Connectivity
•
•
•
•
Ethernet
Wireless Ethernet
Dial Up
Direct
Memory Requirements
Flash
UDP/IP + core
4470 bytes
TCP/IP + core
7827 bytes
UDP/TCP/IP + core
8685 bytes
PPP
6681 bytes
Modem
447 bytes
HTTP Server
3888 bytes
Virtual File
885 bytes
Ethernet
2652 bytes
DHCP Client
2202 bytes
FTP Server
3657 bytes
TFTP Client
723 bytes
BOOTP
684 bytes
SMTP
1918 bytes
Utility
1314 bytes
RAM (not including buffer sizes)
UDP/SLIP
Soft Modem Application Library
56 bytes
TCP/HTTP/PPP
304 bytes
Ethernet
38 bytes
Internet-enabled home security systems
Internet-connected power, gas and water meters
Internet-connected vending machines
Smart Appliances
Industrial Monitoring
POS Terminals
Set Top Boxes
Drop Boxes
Fire Panels
The ITU-T specification modules are written in C and
Assembly language, yielding optimal performance.
Some specific dsPIC30F hardware peripherals and key
transmitter and receiver filtering routines use assembly
language to optimize code size and execution time.
Electronic documentation accompanies the modem
library to help you become familiar with and implement
the library functions.
12.9
CAN Driver Library
Microchip offers a CAN driver library that supports the
dsPIC30F CAN peripheral. Some of the CAN functions
supported include:
•
•
•
•
•
•
•
•
•
Initialize CAN Module
Set CAN Operational Mode
Set CAN Baud Rate
Set CAN Mask
Set CAN Filter
Send CAN Message
Receive CAN Message
Abort CAN Sequence
Provide error notification
All CAN driver routines are developed and optimized in
dsPIC30F C language and are callable from C
language. Support for the Microchip MPLAB C30 C
Compiler is provided.
Electronic documentation accompanies the CAN
library to help you become familiar with and implement
the library functions.
Vector Informatik GmbH, a dsPIC30F development
partner, has created a dsPIC30F architecture version
of their CANbedded® tool, along with various support
utilities.
© 2005 Microchip Technology Inc.
DS70043F-page 57
dsPIC30F
12.10 OSEK Operating Systems
The dsPIC30F product family supports Operating
Systems for the OSEK/VDX vehicle software standard.
The functionality of OSEK “Offene Systeme und deren
Schnittstellen für die Elektronik im Kraftfahrzeug” (open
systems and the corresponding interfaces for
automotive electronics) is harmonized with VDX
“Vehicle Distributed eXecutive” yielding OSEK/VDX.
Microchip also provides Internal and External CAN
driver support. The physical layer is integrated into the
communication controller’s hardware and is not
covered by the OSEK specifications.
Vector Informatik GmbH has created a dsPIC30F
architecture version of their osCAN® operating system,
along with various support utilities.
Structured
and
modular
RTOS
software
implementations are provided based on standardized
interfaces and protocols. Structured and modular
implementations
provide
for
portability
and
extendability for distributed control units for vehicles.
DS70043F-page 58
© 2005 Microchip Technology Inc.
dsPIC30F
13.0
dsPIC30F HARDWARE
DEVELOPMENT BOARDS
Microchip provides several hardware development
boards that help you quickly prototype and validate key
design requirements. Each board features key
TABLE 13-1:
HARDWARE DEVELOPMENT BOARDS
Development Tool
Development Boards and
Reference Designs
dsPIC30F peripherals and supports Microchip’s
MPLAB In-Circuit Debugger (ICD 2) tool for cost
effective debugging and programming of the dsPIC30F
device. These boards are shown in Table13-1.
Description
From
List
Price*
80-Pin Starter
Demo Board (see
13.1)
dsPICDEM 80-pin Starter Demonstration Board
dsPIC30F6014A General Purpose device
DM300019
Microchip
$79.99
28-Pin Starter
Demo Board (see
13-2)
dsPICDEM Starter Demonstration Board with 28-pin
dsPIC30F2010 Motor Control device
DM300017
Microchip
$79
General Purpose
Development (see
13.3)
dsPICDEM™ 1.1 Development Board for 80L TQFP
devices
DM300014
Microchip
$299
Motor Control
and
Power Conversion
Development
(see 13.4)
dsPICDEM MC1 Motor Control Development Board
DM300020
Microchip
$300
dsPICDEM MC1H 3-Phase High-Voltage Power Module
DM300021
Microchip
$800
3-Phase ACIM High-Voltage Motor (208/460V)
AC300021
Microchip
$120
dsPICDEM MC1L 3-Phase Low-Voltage Power Module
DM300022
Microchip
$700
3-Phase BLDC Low-Voltage Motor (24V)
Plug-in
Samples
Part #
AC300020
Microchip
$120
Connectivity
Development
(see 13.5)
dsPICDEM.net™ 1 with FCC/JATE and Ethernet NIC
support (Global compliant)
DM300004-1
Microchip
$389
dsPICDEM.net 2 with PSTN and Ethernet NIC support
(Global compliant)
DM300004-2
Microchip
$389
Plug-in Sample
(see 13.6)
Daughter PC board with 80-pin dsPIC30F6010 motor
control MCU sample. Easy to plug in and remove from
development board.
MA300013
Microchip
$25
Daughter PC board with 80-pin dsPIC30F6014A general
purpose MCU sample. Easy to plug in and remove from
development board.
MA300014
Microchip
$25
* Prices are subject to change without notice.
© 2005 Microchip Technology Inc.
DS70043F-page 59
dsPIC30F
13.1
dsPICDEM™ 80-Pin Starter
Development Board
This development board offers a very economical way
to evaluate both the dsPIC30F and dsPIC33F General
Purpose and Motor Control Family devices. This board
is an ideal prototyping tool to help you quickly develop
and validate key design requirements.
Some key features and attributes of the dsPICDEM
80-Pin Starter Development Board include:
• Includes an 80-pin dsPIC30F6014A plug-in
module (MA300014)
• Power input from 9V supply
• Selectable voltage regulator outputs of 5V
and 3.3V
• LEDs, switches, potentiometer, UART interface
• A/D input filter circuit for speech band signal input
• On-board DAC and filter for speech band signal output
• Circuit prototyping area
• Assembly language demonstration program and
tutorial
• Can accommodate 80-pin dsPIC30F6010 plug-in
module (MA300013)
• Can accommodate 100 to 80-pin adapter
dsPIC33F plug-in module (MA330012)
FIGURE 13-1:
dsPICDEM™ 80-PIN
STARTER DEVELOPMENT
BOARD
13.2
dsPICEM 28-Pin Starter Demo
Board
The dsPICDEM 28-Pin Starter Demo Board is a
development kit and evaluation tool for the
dsPIC30F2010 High-Performance Digital Signal
Controller. The following items comprise the
dsPICDEM 28-Pin Starter Demo Board Development
Kit:
• The dsPICDEM 28-Pin Starter Demo Board
printed circuit board (see Figure 13-3)
• A preprogrammed dsPIC30F2010 device
• The dsPICDEM 28-Pin Starter Demo Board CDROM containing this manual, dsPIC30F
documentation and demonstration program code
The dsPICDEM 28-Pin Starter Demo Board is a simple
tool that allows you to begin development with
dsPIC30F devices.
Development board power includes an on-board +5V
regulator for VDD and AVDD with direct input from 9V
AC or DC wall adapter, a 9V DC power source input
jack for the development board and a LED power-on
indicator.
MPLAB ICD 2 Connections include an MPLAB ICD 2
programming connector and pad locations for 28-pin
SOIC or SDIP packages. Also included are a single
RS-232 communication channel, 7.37 MHz crystal for
dsPIC device clocking, and two crystal locations on the
board to support either SDIP or SOIC packages.
Other features include:
• Reset push button for resetting the dsPIC device
• LED connected to pin RD0 for status indicator
• All device I/O pins are brought out to a header for
test point and prototyping access
• Prototype area for user hardware
FIGURE 13-2:
DS70043F-page 60
dsPICDEM 28-PIN
STARTER DEMO BOARD
© 2005 Microchip Technology Inc.
dsPIC30F
13.3
dsPICDEM 1.1 Development
Board
The dsPICDEM 1.1 Development Board is a low cost
development tool that lets you familiarize yourself with
the dsPIC30F 16-bit architecture, high performance
peripherals and powerful instruction set. This
development board is an ideal prototyping tool to help
you quickly develop and validate key design
requirements.
Some key features and attributes of the dsPICDEM 1.1
development board include:
•
•
•
•
•
•
•
•
•
•
•
Supports dsPIC30F6014A device
CAN communication channel
RS-232 and RS-485 communication channels
Voice band codec interface with line in/out jacks
In-Circuit Debugger interface (MPLAB ICD 2)
ICE 4000 Emulator interface
Microchip temperature sensor
Microchip Digital Potentiometer
122x32 Dot Addressable LCD
General purpose prototyping area
Various LEDS, switches and potentiometers
The general purpose development board is shipped
with a 9V power supply, RS-232 I/O cable,
preprogrammed dsPIC30F device, example software
and appropriate documentation to enable you
to exercise the development board demonstration
programs.
FIGURE 13-3:
dsPICDEM 1.1
DEVELOPMENT BOARD
13.4
Motor Control Development Board
The dsPIC30F Motor Control Development Board
provides three main components for quick prototyping
and validation of BLDC, PMAC and ACIM applications:
• dsPIC30F Motor Control Main Board
• 3-phase Low-Voltage Power module
• 3-phase High-Voltage Power module
The main control board supports the dsPIC30F6010
device, various peripheral interfaces and a custom
interface header system, which allows different motor
power modules to be connected to the PCB. The
control board also has connectors for mechanical
position sensors, such as incremental rotary encoders
and Hall effect sensors, and a breadboard area for
custom circuits. The main control board receives its
power from a standard plug-in transformer.
The Low-Voltage Power module is optimized for 3phase motor applications that require a DC bus voltage
less than 50 volts and can deliver up to 400 watts
power output. The 3-phase Low-Voltage Power module
is intended to power BLDC and PMAC motors.
The High-Voltage Power module is optimized for
3-phase motor applications that require DC bus
voltages up to 400 volts and can deliver up to 1 Kw
power output. The high-voltage module has an active
power factor correction circuit that is controlled by the
dsPIC30F device. This power module is intended for
AC induction motor and power inverter applications.
Both power modules have automatic Fault protection
and the high-voltage module is electrically isolated
from the control interface. Both power module boards
provide pre-conditioned voltage and current signals to
the main control board. All position feedback devices
that are isolated from the motor control circuitry, such
as incremental encoders, Hall effect sensors or
tachometer sensors, can be directly connected to the
main control board. Both modules are equipped with
motor braking circuits.
Some key features and attributes of the motor control
main development board are:
• dsPIC30F Motor Control Main Board supporting
the dsPIC30F6010A
• RS-232 and RS-485 interface channels
• 2x16 LCD
• In-Circuit Debugger interface (MPLAB ICD 2)
• ICE 4000 Emulator interface
• General purpose prototyping area
• Custom interface header system
• Various LEDs, switches and potentiometers
© 2005 Microchip Technology Inc.
DS70043F-page 61
dsPIC30F
FIGURE 13-4:
dsPIC30F MOTOR
CONTROL DEVELOPMENT
SYSTEM
•
•
•
•
•
•
•
•
•
•
In-Circuit Debugger interface (MPLAB ICD 2)
ICE 4000 Emulator interface
Microchip temperature sensor
Microchip Dual Channel Digital Potentiometer
2x16 LCD
General purpose prototyping area
Various LEDs, switches and potentiometers
External 64K x 16 SRAM
External EE memory for storing HTML pages
Expansion header for user applications
The connectivity development board is shipped with a
9V power supply, RS-232 I/O cable, pre-programmed
dsPIC30F devices with example connectivity software
and appropriate documentation to enable you to
exercise the development board connectivity demo
program.
FIGURE 13-5:
dsPICDEM.net™
CONNECTIVITY
DEVELOPMENT BOARD
The motor control development system is shipped with
a 9V power supply for the control board, RS-232 I/O
cable, pre-programmed dsPIC30F device, example
software and documentation that allows you to
exercise the development board demo programs. A list
of motors that are compatible with the development
system is also provided to facilitate rapid evaluation.
13.5
dsPICDEM.net™ Connectivity
Development Board
The dsPICDEM.net Connectivity Development Board
provides you with a basic platform for developing and
evaluating various connectivity solutions, implementing
TCP/IP protocol layers, combined with V.32/V.32bis
and V.22/V.22bis ITU-T specifications over PSTN or
Ethernet communication channels.
Some key features and attributes of the dsPICDEM.net
development board are:
•
•
•
•
Supports dsPIC30F6014A device
10-Base T Ethernet support
PSTN interface with DAA/AFE
RS-232 and RS-485 communication channels
DS70043F-page 62
13.6
Plug-in Modules
The various dsPIC30F development boards may use
the plug-in modules for the dsPIC30F silicon devices.
Since the boards support the ICE 4000 Emulator
Device Adapter through the use of header pins on the
PCB, they also are used to provide flexibility for the
replacement of the dsPIC30F silicon. There are
presently two different plug-in sample types that
support the 80-pin TQFP package types, for general
purpose (dsPIC30F6014A) and motor control
dsPIC30F6010A samples. The use of plug-in samples
is considered to be an interim development board
mechanization.
© 2005 Microchip Technology Inc.
dsPIC30F
APPENDIX A:
TABLE A-1:
DEVICE I/O PINOUTS
AND FUNCTIONS
FOR GENERAL
PURPOSE AND
SENSOR FAMILY
Table A-1 provides a brief description of device I/O
pinouts and functions that can be multiplexed to a port
pin. Multiple functions may exist on one port pin. When
multiplexing occurs, the peripheral module’s functional
requirements may force an override of the data
direction of the port pin.
PINOUT I/O DESCRIPTIONS
Pin
Type
Input Buffer
Type
AN0-AN15
I
Analog
AVDD
P
P
Positive supply for Analog module.
AVSS
P
P
Ground reference for Analog module.
CLKI
I
ST/CMOS
CLKO
O
—
CN0-CN23
I
ST
Input change notification inputs. Can be software programmed for
internal weak pull-ups on all inputs.
COFS
CSCK
CSDI
CSDO
I/O
I/O
I
O
ST
ST
ST
—
Data Converter Interface frame synchronization pin.
Data Converter Interface serial clock input/output pin.
Data Converter Interface serial data input pin.
Data Converter Interface serial data output pin.
C1RX
C1TX
C2RX
C2TX
I
O
I
O
ST
—
ST
—
CAN1 bus receive pin.
CAN1 bus transmit pin.
CAN2 bus receive pin.
CAN2 bus transmit pin.
EMUD
EMUC
EMUD1
EMUC1
EMUD2
EMUC2
EMUD3
EMUC3
I/O
I
I/O
I
I/O
I
I/O
I
ST
ST
ST
ST
ST
ST
ST
ST
Primary data I/O pin for ICD Communication Channel.
Primary clock input pin for ICD Communication Channel.
Alternate 1 data I/O pin for ICD Communication Channel.
Alternate 1 clock input pin for ICD Communication Channel.
Alternate 2 data I/O pin for ICD Communication Channel.
Alternate 2 clock input pin for ICD Communication Channel.
Alternate 3 data I/O pin for ICD Communication Channel.
Alternate 3 clock input pin for ICD Communication Channel.
Pin Name
Description
Analog input channels.
AN0 and AN1 are also used for device programming data and clock
inputs, respectively.
External clock source input. Always associated with OSC1 pin
function.
Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC modes.
Always associated with OSC2 pin function.
IC1-IC8
I
ST
Capture inputs 1 through 8.
INT0
INT1
INT2
INT3
INT4
I
I
I
I
I
ST
ST
ST
ST
ST
External interrupt 0.
External interrupt 1.
External interrupt 2.
External interrupt 3.
External interrupt 4.
LVDIN
I
Analog
MCLR
I/P
ST
Master Clear (Reset) input or programming voltage input. This pin is
an active low Reset to the device.
OCFA
OCFB
OC1-OC8
I
I
O
ST
ST
—
Compare Fault A input (for Compare channels 1, 2, 3 and 4).
Compare Fault B input (for Compare channels 5, 6, 7 and 8).
Compare outputs 1 through 8.
OSC1
I
ST/CMOS
OSC2
I/O
—
Legend:
Low Voltage Detect input.
Oscillator crystal input. ST buffer when configured in RC mode;
CMOS otherwise.
Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC modes.
CMOS = CMOS compatible input or output Analog = Analog input
ST = Schmitt Trigger input with CMOS levels O = Output I = Input P = Power
© 2005 Microchip Technology Inc.
DS70043F-page 63
dsPIC30F
TABLE A-1:
PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin
Type
Input Buffer
Type
PGD
PGC
I/O
I
ST
ST
In-Circuit Serial Programming data input/output pin.
In-Circuit Serial Programming clock input pin.
RA6-RA7
RA9-RA10
RA12-RA15
I/O
I/O
I/O
ST
ST
ST
PORTA is a bidirectional I/O port.
Pin Name
Description
RB0-RB15
I/O
ST
PORTB is a bidirectional I/O port.
RC1-RC4
RC13-RC15
I/O
I/O
ST
ST
PORTC is a bidirectional I/O port.
RD0-RD15
I/O
ST
PORTD is a bidirectional I/O port.
RF0-RF8
I/O
ST
PORTF is a bidirectional I/O port.
RG0-RG3
RG6-RG9
RG12-RG15
I/O
I/O
I/O
ST
ST
ST
PORTG is a bidirectional I/O port.
SCK1
SDI1
SDO1
SS1
SCK2
SDI2
SDO2
SS2
I/O
I
O
I
I/O
I
O
I
ST
ST
—
ST
ST
ST
—
ST
Synchronous serial clock input/output for SPI1.
SPI1 Data In.
SPI1 Data Out.
SPI1 Slave Synchronization.
Synchronous serial clock input/output for SPI2.
SPI2 Data In.
SPI2 Data Out.
SPI2 Slave Synchronization.
SCL
SDA
I/O
I/O
ST
ST
Synchronous serial clock input/output for I2C.
Synchronous serial data input/output for I2C.
SOSCI
SOSCO
I
O
ST/CMOS
—
T1CK
T2CK
T3CK
T4CK
T5CK
I
I
I
I
I
ST
ST
ST
ST
ST
Timer1 external clock
Timer2 external clock
Timer3 external clock
Timer4 external clock
Timer5 external clock
U1RX
U1TX
U1ARX
U1ATX
U2RX
U2TX
I
O
I
O
I
O
ST
—
ST
—
ST
—
UART1 Receive.
UART1 Transmit.
UART1 Alternate Receive.
UART1 Alternate Transmit.
UART2 Receive.
UART2 Transmit.
VDD
P
—
Positive supply for logic and I/O pins.
VSS
P
—
Ground reference for logic and I/O pins.
VREF+
I
Analog
Analog Voltage Reference (High) input.
VREF-
I
Analog
Analog Voltage Reference (Low) input.
Legend:
32 kHz low-power oscillator crystal input; CMOS otherwise.
32 kHz low-power oscillator crystal output.
input.
input.
input.
input.
input.
CMOS = CMOS compatible input or output Analog = Analog input
ST = Schmitt Trigger input with CMOS levels O = Output I = Input P = Power
DS70043F-page 64
© 2005 Microchip Technology Inc.
dsPIC30F
Pin Diagrams
MCLR
AN0/VREF+/CN2/RB0
AN1/VREF-/CN3/RB1
AN2/SS1/LVDIN/CN4/RB2
AN3/CN5/RB3
OSC1/CLKI
OSC2/CLKO/RC15
EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
1
2
3
4
5
6
7
8
9
dsPIC30F3012
dsPIC30F2011
18-Pin PDIP and SOIC
18
17
16
15
14
13
12
11
10
AVDD
AVSS
AN6/SCK1/INT0/OCFA/RB6
EMUD2/AN7/OC2/IC2/RB7
VDD
VSS
PGC/EMUC/AN5/U1RX/SDI1/SDA/CN7/RB5
PGD/EMUD/AN4/U1TX/SDO1/SCL/CN6/RB4
EMUC2/OC1/IC1/INT1/RD0
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AVDD
AVSS
AN6/OCFA/RB6
EMUD2/AN7/RB7
AN8/OC1/RB8
AN9/OC2/RB9
CN17/RF4
CN18/RF5
VDD
VSS
PGC/EMUC/U1RX/SDI1/SDA/RF2
PGD/EMUD/U1TX/SDO1/SCL/RF3
SCK1/INT0/RF6
EMUC2/IC1/INT1/RD8
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AVDD
AVSS
AN6/OCFA/RB6
EMUD2/AN7/RB7
AN8/OC1/RB8
AN9/OC2/RB9
U2RX/CN17/RF4
U2TX/CN18/RF5
VDD
VSS
PGC/EMUC/U1RX/SDI1/SDA/RF2
PGD/EMUD/U1TX/SDO1/SCL/RF3
SCK1/INT0/RF6
EMUC2/IC1/INT1/RD8
MCLR
EMUD3/AN0/VREF+/CN2/RB0
EMUC3/AN1/VREF-/CN3/RB1
AN2/SS1/LVDIN/CN4/RB2
AN3/CN5/RB3
AN4/CN6/RB4
AN5/CN7/RB5
VSS
OSC1/CLKI
OSC2/CLKO/RC15
EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
VDD
IC2/INT2/RD9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
dsPIC30F2012
28-Pin PDIP and SOIC
MCLR
EMUD3/AN0/VREF+/CN2/RB0
EMUC3/AN1/VREF-/CN3/RB1
AN2/SS1/LVDIN/CN4/RB2
AN3/CN5/RB3
AN4/CN6/RB4
AN5/CN7/RB5
VSS
OSC1/CLKI
OSC2/CLKO/RC15
EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
VDD
IC2/INT2/RD9
© 2005 Microchip Technology Inc.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
dsPIC30F3013
28-Pin SDIP and SOIC
DS70043F-page 65
dsPIC30F
Pin Diagrams (Continued)
MCLR
AN0/VREF+/CN2/RB0
AN1/VREF-/CN3/RB1
AN2/SS1/LVDIN/CN4/RB2
AN3/CN5/RB3
AN4/CN6/RB4
AN5/CN7/RB5
PGC/EMUC/AN6/OCFA/RB6
PGD/EMUD/AN7/RB7
AN8/RB8
VDD
VSS
OSC1/CLKI
OSC2/CLKO/RC15
EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
INT0/RA11
IC2/INT2/RD9
RD3
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
dsPIC30F3014
40-Pin PDIP
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
AVDD
AVSS
AN9/RB9
AN10/RB10
AN11/RB11
AN12/RB12
EMUC2/OC1/RD0
EMUD2/OC2/RD1
VDD
VSS
RF0
RF1
U2RX/RF4
U2TX/RF5
U1RX/SDI1/SDA/RF2
EMUD3/U1TX/SDO1/SCL/RF3
EMUC3/SCK1/RF6
IC1/INT1/RD8
RD2
VDD
MCLR
AN0/VREF+/CN2/RB0
AN1/VREF-/CN3/RB1
AN2/SS1/LVDIN/CN4/RB2
AN3/CN5/RB3
AN4/IC7/CN6/RB4
AN5/IC8/CN7/RB5
PGC/EMUC/AN6/OCFA/RB6
PGD/EMUD/AN7/RB7
AN8/RB8
VDD
VSS
OSC1/CLKI
OSC2/CLKO/RC15
EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
INT0/RA11
IC2/INT2/RD9
OC4/RD3
VSS
DS70043F-page 66
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
dsPIC30F4013
40-Pin PDIP
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
AVDD
AVSS
AN9/CSCK/RB9
AN10/CSDI/RB10
AN11/CSDO/RB11
AN12/COFS/RB12
EMUC2/OC1/RD0
EMUD2/OC2/RD1
VDD
VSS
C1RX/RF0
C1TX/RF1
U2RX/RF4
U2TX/RF5
U1RX/SDI1/SDA/RF2
EMUD3/U1TX/SDO1/SCL/RF3
EMUC3/SCK1/RF6
IC1/INT1/RD8
OC3/RD2
VDD
© 2005 Microchip Technology Inc.
dsPIC30F
Pin Diagrams (Continued)
44
43
42
41
40
39
38
37
36
35
34
AN3/CN5/RB3
AN2/SS1/LVDIN/CN4/RB2
AN1/VREF-/CN3/RB1
AN0/VREF+/CN2/RB0
MCLR
NC
AVDD
AVSS
AN9/RB9
AN10/RB10
AN11/RB11
44-Pin TQFP
dsPIC30F3014
33
32
31
30
29
28
27
26
25
24
23
12
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
10
11
AN12/RB12
EMUC2/OC1/RD0
EMUD2/OC2/RD1
VDD
VSS
NC
RF0
RF1
U2RX/RF4
U2TX/RF5
U1RX/SDI1/SDA/RF2
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
INT0/RA11
IC2/INT2/RD9
RD3
VSS
NC
VDD
RD2
IC1/INT1/RD8
EMUC3/SCK1/RF6
EMUD3/U1TX/SDO1/SCL/RF3
AN4/CN6/RB4
AN5/CN7/RB5
PGC/EMUC/AN6/OCFA/RB6
PGD/EMUD/AN7/RB7
AN8/RB8
NC
VDD
VSS
OSC1/CLKI
OSC2/CLKO/RC15
EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13
© 2005 Microchip Technology Inc.
DS70043F-page 67
dsPIC30F
Pin Diagrams (Continued)
44
43
42
41
40
39
38
37
36
35
34
AN3/CN5/RB3
AN2/SS1/LVDIN/CN4/RB2
AN1/VREF-/CN3/RB1
AN0/VREF+/CN2/RB0
MCLR
NC
AVDD
AVSS
AN9/CSCK/RB9
AN10/CSDI/RB10
AN11/CSDO/RB11
44-Pin TQFP
dsPIC30F4013
33
32
31
30
29
28
27
26
25
24
23
12
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
10
11
AN12/COFS/RB12
EMUC2/OC1/RD0
EMUD2/OC2/RD1
VDD
VSS
NC
C1RX/RF0
C1TX/RF1
U2RX/RF4
U2TX/RF5
U1RX/SDI1/SDA/RF2
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
INT0/RA11
IC2/INT2/RD9
OC4/RD3
VSS
NC
VDD
OC3/RD2
IC1/INT1/RD8
EMUC3/SCK1/RF6
EMUD3/U1TX/SDO1/SCL/RF3
AN4/IC7/CN6/RB4
AN5/IC8/CN7/RB5
PGC/EMUC/AN6/OCFA/RB6
PGD/EMUD/AN7/RB7
AN8/RB8
NC
VDD
VSS
OSC1/CLKI
OSC2/CLKO/RC15
EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13
DS70043F-page 68
© 2005 Microchip Technology Inc.
dsPIC30F
Pin Diagrams (Continued)
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
CSDO/RG13
CSDI/RG12
CSCK/RG14
C2RX/RG0
C2TX/RG1
C1TX/RF1
C1RX/RF0
VDD
VSS
OC8/CN16/RD7
OC7/CN15/RD6
OC6/IC6/CN14/RD5
OC5/IC5/CN13/RD4
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
64-Pin TQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
dsPIC30F5011
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
EMUC1/SOSCO/T1CK/CN0/RC14
EMUD1/SOSCI/T4CK/CN1/RC13
EMUC2/OC1/RD0
IC4/INT4/RD11
IC3/INT3/RD10
IC2/INT2/RD9
IC1/INT1/RD8
VSS
OSC2/CLKO/RC15
OSC1/CLKI
VDD
SCL/RG2
SDA/RG3
EMUC3/SCK1/INT0/RF6
U1RX/SDI1/RF2
EMUD3/U1TX/SDO1/RF3
PGC/EMUC/AN6/OCFA/RB6
PGD/EMUD/AN7/RB7
AVDD
AVSS
AN8/RB8
AN9/RB9
AN10/RB10
AN11/RB11
VSS
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
U2RX/CN17/RF4
U2TX/CN18/RF5
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
COFS/RG15
T2CK/RC1
T3CK/RC2
SCK2/CN8/RG6
SDI2/CN9/RG7
SDO2/CN10/RG8
MCLR
SS2/CN11/RG9
VSS
VDD
AN5/IC8/CN7/RB5
AN4/IC7/CN6/RB4
AN3/CN5/RB3
AN2/SS1/LVDIN/CN4/RB2
AN1/VREF-/CN3/RB1
AN0/VREF+/CN2/RB0
© 2005 Microchip Technology Inc.
DS70043F-page 69
dsPIC30F
Pin Diagrams (Continued)
IC5/RD12
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
OC6/CN14/RD5
OC5/CN13/RD4
IC6/CN19/RD13
OC7/CN15/RD6
C2RX/RG0
C2TX/RG1
C1TX/RF1
C1RX/RF0
VDD
VSS
OC8/CN16/RD7
CSCK/RG14
RA7/CN23
RA6/CN22
CSDI/RG12
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
CSDO/RG13
80-Pin TQFP
COFS/RG15
T2CK/RC1
60
EMUC1/SOSCO/T1CK/CN0/RC14
59
EMUD1/SOSCI/CN1/RC13
58
EMUC2/OC1/RD0
57
5
56
IC4/RD11
IC3/RD10
6
55
IC2/RD9
7
54
IC1/RD8
8
53
INT4/RA15
9
52
INT3/RA14
VSS
1
2
T3CK/RC2
3
T4CK/RC3
T5CK/RC4
SCK2/CN8/RG6
4
SDI2/CN9/RG7
SDO2/CN10/RG8
MCLR
SS2/CN11/RG9
VSS
51
dsPIC30F5013
10
11
50
OSC2/CLKO/RC15
OSC1/CLKI
VDD
DS70043F-page 70
30
31
32
33
34
35
36
37
38
39
40
VSS
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
IC7/CN20/RD14
IC8/CN21/RD15
U2RX/CN17/RF4
U2TX/CN18/RF5
U1TX/RF3
29
41
AN11/RB11
U1RX/RF2
20
AN9/RB9
19
PGD/EMUD/AN0/CN2/RB0
AN10/RB10
EMUD3/SDO1/RF8
42
28
43
27
18
26
AN2/SS1/LVDIN/CN4/RB2
PGC/EMUC/AN1/CN3/RB1
AVSS
SDI1/RF7
AN8/RB8
EMUC3/SCK1/INT0/RF6
44
25
45
AVDD
16
17
VREF+/RA10
15
AN4/CN6/RB4
AN3/CN5/RB3
24
AN5/CN7/RB5
SDA/RG3
22
SCL/RG2
46
23
47
VREF-/RA9
48
14
21
13
INT2/RA13
AN7/RB7
12
INT1/RA12
AN6/OCFA/RB6
VDD
49
© 2005 Microchip Technology Inc.
dsPIC30F
Pin Diagrams (Continued)
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
RG13
RG12
RG14
C2RX/RG0
C2TX/RG1
C1TX/RF1
C1RX/RF0
VDD
VSS
OC8/CN16/RD7
OC7/CN15/RD6
OC6/IC6/CN14/RD5
OC5/IC5/CN13/RD4
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
64-Pin TQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
dsPIC30F6011A
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
EMUC1/SOSCO/T1CK/CN0/RC14
EMUD1/SOSCI/T4CK/CN1/RC13
EMUC2/OC1/RD0
IC4/INT4/RD11
IC3/INT3/RD10
IC2/INT2/RD9
IC1/INT1/RD8
VSS
OSC2/CLKO/RC15
OSC1/CLKI
VDD
SCL/RG2
SDA/RG3
EMUC3/SCK1/INT0/RF6
U1RX/SDI1/RF2
EMUD3/U1TX/SDO1/RF3
*PGC/EMUC/AN6/OCFA/RB6
*PGD/EMUD//AN7/RB7
AVDD
AVSS
AN8/RB8
AN9/RB9
AN10/RB10
AN11/RB11
VSS
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
U2RX/CN17/RF4
U2TX/CN18/RF5
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
RG15
T2CK/RC1
T3CK/RC2
SCK2/CN8/RG6
SDI2/CN9/RG7
SDO2/CN10/RG8
MCLR
SS2/CN11/RG9
VSS
VDD
AN5/IC8/CN7/RB5
AN4/IC7/CN6/RB4
AN3/CN5/RB3
AN2/SS1/LVDIN/CN4/RB2
AN1/VREF-/CN3/RB1
AN0/VREF+/CN2/RB0
© 2005 Microchip Technology Inc.
DS70043F-page 71
dsPIC30F
Pin Diagrams (Continued)
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
CSDO/RG13
CSDI/RG12
CSCK/RG14
C2RX/RG0
C2TX/RG1
C1TX/RF1
C1RX/RF0
VDD
VSS
OC8/CN16/RD7
OC7/CN15/RD6
OC6/IC6/CN14/RD5
OC5/IC5/CN13/RD4
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
64-Pin TQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
dsPIC30F6012A
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
EMUC1/SOSCO/T1CK/CN0/RC14
EMUD1/SOSCI/T4CK/CN1/RC13
EMUC2/OC1/RD0
IC4/INT4/RD11
IC3/INT3/RD10
IC2/INT2/RD9
IC1/INT1/RD8
VSS
OSC2/CLKO/RC15
OSC1/CLKI
VDD
SCL/RG2
SDA/RG3
EMUC3/SCK1/INT0/RF6
U1RX/SDI1/RF2
EMUD3/U1TX/SDO1/RF3
*PGC/EMUC/AN6/OCFA/RB6
*PGD/EMUD/AN7/RB7
AVDD
AVSS
AN8/RB8
AN9/RB9
AN10/RB10
AN11/RB11
VSS
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
U2RX/CN17/RF4
U2TX/CN18/RF5
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
COFS/RG15
T2CK/RC1
T3CK/RC2
SCK2/CN8/RG6
SDI2/CN9/RG7
SDO2/CN10/RG8
MCLR
SS2/CN11/RG9
VSS
VDD
AN5/IC8/CN7/RB5
AN4/IC7/CN6/RB4
AN3/CN5/RB3
AN2/SS1/LVDIN/CN4/RB2
AN1/VREF-/CN3/RB1
AN0/VREF+/CN2/RB0
DS70043F-page 72
© 2005 Microchip Technology Inc.
dsPIC30F
Pin Diagrams (Continued)
IC5/RD12
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
OC6/CN14/RD5
OC5/CN13/RD4
IC6/CN19/RD13
OC8/CN16/RD7
OC7/CN15/RD6
C1TX/RF1
C1RX/RF0
VDD
VSS
C2RX/RG0
C2TX/RG1
RG14
CN23/RA7
CN22/RA6
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
RG13
RG12
80-Pin TQFP
RG15
T2CK/RC1
1
2
60
EMUC1/SOSCO/T1CK/CN0/RC14
59
EMUD1/SOSCI/CN1/RC13
58
EMUC2/OC1/RD0
57
IC4/RD11
IC3/RD10
T3CK/RC2
3
T4CK/RC3
T5CK/RC4
4
5
56
SCK2/CN8/RG6
6
55
IC2/RD9
SDI2/CN9/RG7
7
54
IC1/RD8
8
53
INT4/RA15
9
52
10
51
INT3/RA14
VSS
SDO2/CN10/RG8
MCLR
SS2/CN11/RG9
VSS
dsPIC30F6013A
11
50
OSC2/CLKO/RC15
OSC1/CLKI
VDD
30
31
32
33
34
35
36
37
38
39
40
VSS
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
IC7/CN20/RD14
IC8/CN21/RD15
U2RX/CN17/RF4
U2TX/CN18/RF5
U1TX/RF3
AN11/RB11
20
PGD/EMUD/AN0/CN2/RB0
29
U1RX/RF2
41
AN10/RB10
EMUD3/SDO1/RF8
42
28
43
19
27
18
AN2/SS1/LVDIN/CN4/RB2
PGC/EMUC/AN1/CN3/RB1
AN9/RB9
17
SDI1/RF7
26
EMUC3/SCK1/INT0/RF6
44
AVSS
45
AN8/RB8
16
25
AN4/CN6/RB4
AN3/CN5/RB3
24
SDA/RG3
AVDD
46
VREF+/RA10
15
23
SCL/RG2
AN5/CN7/RB5
VREF-/RA9
47
22
48
14
21
13
INT2/RA13
AN7/RB7
12
INT1/RA12
AN6/OCFA/RB6
VDD
49
© 2005 Microchip Technology Inc.
DS70043F-page 73
dsPIC30F
Pin Diagrams (Continued)
IC5/RD12
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
OC6/CN14/RD5
OC5/CN13/RD4
IC6/CN19/RD13
OC8/CN16/RD7
OC7/CN15/RD6
C1TX/RF1
C1RX/RF0
VDD
VSS
C2RX/RG0
C2TX/RG1
CSCK/RG14
CN23/RA7
CN22/RA6
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
CSDO/RG13
CSDI/RG12
80-Pin TQFP
COFS/RG15
T2CK/RC1
1
2
60
EMUC1/SOSCO/T1CK/CN0/RC14
59
EMUD1/SOSCI/CN1/RC13
58
EMUC2/OC1/RD0
57
56
IC4/RD11
IC3/RD10
T3CK/RC2
3
T4CK/RC3
T5CK/RC4
SCK2/CN8/RG6
4
6
55
IC2/RD9
SDI2/CN9/RG7
7
54
IC1/RD8
8
53
INT4/RA15
9
52
10
51
INT3/RA14
VSS
SDO2/CN10/RG8
MCLR
SS2/CN11/RG9
VSS
5
dsPIC30F6014A
11
50
OSC2/CLKO/RC15
OSC1/CLKI
DS70043F-page 74
30
31
32
33
34
35
36
37
38
39
40
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
IC7/CN20/RD14
IC8/CN21/RD15
U2RX/CN17/RF4
U2TX/CN18/RF5
U1TX/RF3
VSS
20
AN11/RB11
U1RX/RF2
41
PGD/EMUD/AN0/CN2/RB0
29
EMUD3/SDO1/RF8
42
28
43
19
AN9/RB9
18
PGC/EMUC/AN1/CN3/RB1
AN10/RB10
AN2/SS1/LVDIN/CN4/RB2
27
EMUC3/SCK1/INT0/RF6
SDI1/RF7
26
17
44
AN8/RB8
45
25
16
AVSS
AN4/CN6/RB4
AN3/CN5/RB3
AVDD
SCL/RG2
SDA/RG3
24
46
VREF+/RA10
15
22
AN5/CN7/RB5
23
VDD
47
VREF-/RA9
48
14
21
13
INT2/RA13
AN7/RB7
12
INT1/RA12
AN6/OCFA/RB6
VDD
49
© 2005 Microchip Technology Inc.
dsPIC30F
Pin Diagrams (Continued)
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
RG13
RG12
RG14
C2RX/RG0
C2TX/RG1
C1TX/RF1
C1RX/RF0
VDD
VSS
OC8/CN16/RD7
OC7/CN15/RD6
OC6/IC6/CN14/RD5
OC5/IC5/CN13/RD4
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
64-Pin TQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
dsPIC30F6011*
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
EMUC1/SOSCO/T1CK/CN0/RC14
EMUD1/SOSCI/T4CK/CN1/RC13
EMUC2/OC1/RD0
IC4/INT4/RD11
IC3/INT3/RD10
IC2/INT2/RD9
IC1/INT1/RD8
VSS
OSC2/CLKO/RC15
OSC1/CLKI
VDD
SCL/RG2
SDA/RG3
EMUC3/SCK1/INT0/RF6
U1RX/SDI1/RF2
EMUD3/U1TX/SDO1/RF3
AN6/OCFA/RB6
AN7/RB7
AVDD
AVSS
AN8/RB8
AN9/RB9
AN10/RB10
AN11/RB11
VSS
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
U2RX/CN17/RF4
U2TX/CN18/RF5
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
RG15
T2CK/RC1
T3CK/RC2
SCK2/CN8/RG6
SDI2/CN9/RG7
SDO2/CN10/RG8
MCLR
SS2/CN11/RG9
VSS
VDD
AN5/IC8/CN7/RB5
AN4/IC7/CN6/RB4
AN3/CN5/RB3
AN2/SS1/LVDIN/CN4/RB2
PGC/EMUC/AN1/VREF-/CN3/RB1
PGD/EMUD/AN0/VREF+/CN2/RB0
* This device is not recommened for new designs. See dsPIC30F6011A.
© 2005 Microchip Technology Inc.
DS70043F-page 75
dsPIC30F
Pin Diagrams (Continued)
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
CSDO/RG13
CSDI/RG12
CSCK/RG14
C2RX/RG0
C2TX/RG1
C1TX/RF1
C1RX/RF0
VDD
VSS
OC8/CN16/RD7
OC7/CN15/RD6
OC6/IC6/CN14/RD5
OC5/IC5/CN13/RD4
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
64-Pin TQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
dsPIC30F6012*
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
EMUC1/SOSCO/T1CK/CN0/RC14
EMUD1/SOSCI/T4CK/CN1/RC13
EMUC2/OC1/RD0
IC4/INT4/RD11
IC3/INT3/RD10
IC2/INT2/RD9
IC1/INT1/RD8
VSS
OSC2/CLKO/RC15
OSC1/CLKI
VDD
SCL/RG2
SDA/RG3
EMUC3/SCK1/INT0/RF6
U1RX/SDI1/RF2
EMUD3/U1TX/SDO1/RF3
AN6/OCFA/RB6
AN7/RB7
AVDD
AVSS
AN8/RB8
AN9/RB9
AN10/RB10
AN11/RB11
VSS
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
U2RX/CN17/RF4
U2TX/CN18/RF5
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
COFS/RG15
T2CK/RC1
T3CK/RC2
SCK2/CN8/RG6
SDI2/CN9/RG7
SDO2/CN10/RG8
MCLR
SS2/CN11/RG9
VSS
VDD
AN5/IC8/CN7/RB5
AN4/IC7/CN6/RB4
AN3/CN5/RB3
AN2/SS1/LVDIN/CN4/RB2
PGC/EMUC/AN1/VREF-/CN3/RB1
PGD/EMUD/AN0/VREF+/CN2/RB0
* This device is not recommened for new designs. See dsPIC30F6012A.
DS70043F-page 76
© 2005 Microchip Technology Inc.
dsPIC30F
Pin Diagrams (Continued)
IC5/RD12
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
OC6/CN14/RD5
OC5/CN13/RD4
IC6/CN19/RD13
OC7/CN15/RD6
C2RX/RG0
C2TX/RG1
C1TX/RF1
C1RX/RF0
VDD
VSS
OC8/CN16/RD7
RG14
RA7/CN23
RA6/CN22
RG12
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
RG13
80-Pin TQFP
RG15
1
T2CK/RC1
2
60
EMUC1/SOSCO/T1CK/CN0/RC14
59
EMUD1/SOSCI/CN1/RC13
58
EMUC2/OC1/RD0
57
56
IC4/RD11
IC3/RD10
T3CK/RC2
3
T4CK/RC3
T5CK/RC4
4
SCK2/CN8/RG6
6
55
IC2/RD9
7
54
IC1/RD8
8
53
INT4/RA15
9
52
SS2/CN11/RG9
VSS
10
51
INT3/RA14
VSS
VDD
12
49
OSC2/CLKO/RC15
OSC1/CLKI
INT1/RA12
13
48
VDD
SCL/RG2
SDA/RG3
SDI2/CN9/RG7
SDO2/CN10/RG8
MCLR
5
dsPIC30F6013*
11
50
14
47
AN5/CN7/RB5
15
46
AN4/CN6/RB4
AN3/CN5/RB3
16
45
17
44
EMUC3/SCK1/INT0/RF6
SDI1/RF7
INT2/RA13
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
AVSS
AN9/RB9
AN10/RB10
AN11/RB11
VSS
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
IC7/CN20/RD14
IC8/CN21/RD15
U2RX/CN17/RF4
U2TX/CN18/RF5
25
AVDD
AN8/RB8
24
U1TX/RF3
VREF+/RA10
41
22
20
23
U1RX/RF2
PGD/EMUD/AN0/CN2/RB0
VREF-/RA9
EMUD3/SDO1/RF8
42
21
43
19
AN7/RB7
18
AN6/OCFA/RB6
AN2/SS1/LVDIN/CN4/RB2
PGC/EMUC/AN1/CN3/RB1
* This device is not recommened for new designs. See dsPIC30F6013A.
© 2005 Microchip Technology Inc.
DS70043F-page 77
dsPIC30F
Pin Diagrams (Continued)
IC5/RD12
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
OC6/CN14/RD5
OC5/CN13/RD4
IC6/CN19/RD13
OC7/CN15/RD6
C2RX/RG0
C2TX/RG1
C1TX/RF1
C1RX/RF0
VDD
VSS
OC8/CN16/RD7
CSCK/RG14
RA7/CN23
RA6/CN22
CSDI/RG12
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
CSDO/RG13
80-Pin TQFP
COFS/RG15
T2CK/RC1
60
EMUC1/SOSCO/T1CK/CN0/RC14
59
EMUD1/SOSCI/CN1/RC13
58
EMUC2/OC1/RD0
57
5
56
IC4/RD11
IC3/RD10
6
55
IC2/RD9
7
54
IC1/RD8
8
53
INT4/RA15
9
52
INT3/RA14
VSS
1
2
T3CK/RC2
3
T4CK/RC3
T5CK/RC4
SCK2/CN8/RG6
4
SDI2/CN9/RG7
SDO2/CN10/RG8
MCLR
SS2/CN11/RG9
VSS
51
dsPIC30F6014*
10
11
50
OSC2/CLKO/RC15
OSC1/CLKI
VDD
30
31
32
33
34
35
36
37
38
39
40
VSS
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
IC7/CN20/RD14
IC8/CN21/RD15
U2RX/CN17/RF4
U2TX/CN18/RF5
U1TX/RF3
29
41
AN11/RB11
U1RX/RF2
20
AN9/RB9
19
PGD/EMUD/AN0/CN2/RB0
AN10/RB10
EMUD3/SDO1/RF8
42
28
43
27
18
26
AN2/SS1/LVDIN/CN4/RB2
PGC/EMUC/AN1/CN3/RB1
AVSS
SDI1/RF7
AN8/RB8
EMUC3/SCK1/INT0/RF6
44
25
45
AVDD
16
17
VREF+/RA10
15
AN4/CN6/RB4
AN3/CN5/RB3
24
AN5/CN7/RB5
SDA/RG3
22
SCL/RG2
46
23
47
VREF-/RA9
48
14
21
13
INT2/RA13
AN7/RB7
12
INT1/RA12
AN6/OCFA/RB6
VDD
49
* This device is not recommened for new designs. See dsPIC30F6014A.
DS70043F-page 78
© 2005 Microchip Technology Inc.
dsPIC30F
APPENDIX B:
TABLE B-1:
DEVICE I/O PINOUTS
AND FUNCTIONS
FOR MOTOR
CONTROL FAMILY
PINOUT I/O DESCRIPTIONS FOR MOTOR CONTROL FAMILY
Pin
Type
Buffer
Type
AN0-AN15
I
Analog
Pin Name
Table B-1 provides a brief description of device I/O
pinouts and the functions that may be multiplexed to a
port pin. Multiple functions may exist on one port pin.
When multiplexing occurs, the peripheral module’s
functional requirements may force an override of the
data direction of the port pin.
Description
Analog input channels.
AN0 and AN1 are also used for device programming data and clock inputs, respectively.
AVDD
P
P
Positive supply for Analog module.
AVSS
P
P
Ground reference for Analog module.
CLKI
CLKO
I
O
CN0-CN23
I
ST
Input change notification inputs.
Can be software programmed for internal weak pull-ups on all inputs.
COFS
CSCK
CSDI
CSDO
I/O
I/O
I
O
ST
ST
ST
—
Data Converter Interface frame synchronization pin.
Data Converter Interface serial clock input/output pin.
Data Converter Interface serial data input pin.
Data Converter Interface serial data output pin.
C1RX
C1TX
C2RX
C2TX
I
O
I
O
ST
—
ST
—
CAN1 bus receive pin.
CAN1 bus transmit pin.
CAN2 bus receive pin.
CAN2 bus transmit pin.
EMUD
EMUC
EMUD1
EMUC1
EMUD2
EMUC2
EMUD3
EMUC3
I/O
I
I/O
I
I/O
I
I/O
I
ST
ST
ST
ST
ST
ST
ST
ST
Primary data I/O pin for ICD Communication Channel.
Primary clock input pin for ICD Communication Channel.
Alternate 1 data I/O pin for ICD Communication Channel.
Alternate 1 clock input pin for ICD Communication Channel.
Alternate 2 data I/O pin for ICD Communication Channel.
Alternate 2 clock input pin for ICD Communication Channel.
Alternate 3 data I/O pin for ICD Communication Channel.
Alternate 3 clock input pin for ICD Communication Channel.
ST/CMOS External clock source input. Always associated with OSC1 pin function.
—
Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC modes. Always
associated with OSC2 pin function.
IC1-IC8
I
ST
Capture inputs 1 through 8.
INDX
QEA
I
I
ST
ST
QEB
I
ST
UPDN
O
CMOS
Quadrature Encoder Index Pulse input.
Quadrature Encoder Phase A input in QEI mode.
Auxiliary Timer External Clock/Gate input in Timer mode.
Quadrature Encoder Phase A input in QEI mode.
Auxiliary Timer External Clock/Gate input in Timer mode.
Position Up/Down Counter Direction State.
INT0
INT1
INT2
INT3
INT4
I
I
I
I
I
ST
ST
ST
ST
ST
LVDIN
I
Analog
Legend:
External interrupt 0.
External interrupt 1.
External interrupt 2.
External interrupt 3.
External interrupt 4.
Low Voltage Detect Reference Voltage Input pin.
CMOS = CMOS compatible input or output Analog = Analog input
ST = Schmitt Trigger input with CMOS levels O = Output I = Input P = Power
© 2005 Microchip Technology Inc.
DS70043F-page 79
dsPIC30F
TABLE B-1:
PINOUT I/O DESCRIPTIONS FOR MOTOR CONTROL FAMILY (CONTINUED)
Pin
Type
Buffer
Type
FLTA
FLTB
PWM1L
PWM1H
PWM2L
PWM2H
PWM3L
PWM3H
PWM4L
PWM4H
I
I
O
O
O
O
O
O
O
O
ST
ST
—
—
—
—
—
—
—
—
PWM Fault A input.
PWM Fault B input.
PWM 1 Low output.
PWM 1 High output.
PWM 2 Low output.
PWM 2 High output.
PWM 3 Low output.
PWM 3 High output.
PWM 4 Low output.
PWM 4 High output.
MCLR
I/P
ST
Master Clear (Reset) input or programming voltage input. This pin is an active low
Reset to the device.
OCFA
OCFB
OC1-OC8
I
I
O
ST
ST
—
Compare Fault A input (for Compare channels 1, 2, 3 and 4).
Compare Fault B input (for Compare channels 5, 6, 7 and 8).
Compare outputs 1 through 8.
OSC1
OSC2
I
I/O
PGD
PGC
I/O
I
ST
ST
In-Circuit Serial Programming data input/output pin.
In-Circuit Serial Programming clock input pin.
RA9-RA10
RA14-RA15
I/O
I/O
ST
ST
PORTA is a bidirectional I/O port.
RB0-RB15
I/O
ST
PORTB is a bidirectional I/O port.
RC1
RC3
RC13-RC15
I/O
I/O
I/O
ST
ST
ST
PORTC is a bidirectional I/O port.
RD0-RD15
I/O
ST
PORTD is a bidirectional I/O port.
RE0-RE9
I/O
ST
PORTE is a bidirectional I/O port.
RF0-RF8
I/O
ST
PORTF is a bidirectional I/O port.
RG0-RG3
RG6-RG9
I/O
I/O
ST
ST
PORTG is a bidirectional I/O port.
SCK1
SDI1
SDO1
SS1
SCK2
SDI2
SDO2
SS2
I/O
I
O
I
I/O
I
O
I
ST
ST
—
ST
ST
ST
—
ST
Synchronous serial clock input/output for SPI1.
SPI1 Data In.
SPI1 Data Out.
SPI1 Slave Synchronization.
Synchronous serial clock input/output for SPI2.
SPI2 Data In.
SPI2 Data Out.
SPI2 Slave Synchronization.
SCL
SDA
I/O
I/O
ST
ST
Synchronous serial clock input/output for I2C.
Synchronous serial data input/output for I2C.
SOSCI
SOSCO
I
O
T1CK
T2CK
T3CK
T4CK
T5CK
I
I
I
I
I
Pin Name
Legend:
Description
ST/CMOS Oscillator crystal input. ST buffer when configured in RC mode; CMOS otherwise.
—
Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator mode.
Optionally functions as CLKO in RC and EC modes.
ST/CMOS 32 kHz low-power oscillator crystal input; CMOS otherwise.
—
32 kHz low-power oscillator crystal output.
ST
ST
ST
ST
ST
Timer1 external clock input.
Timer2 external clock input.
Timer3 external clock input.
Timer4 external clock input.
Timer5 external clock input.
CMOS = CMOS compatible input or output Analog = Analog input
ST = Schmitt Trigger input with CMOS levels O = Output I = Input P = Power
DS70043F-page 80
© 2005 Microchip Technology Inc.
dsPIC30F
TABLE B-1:
PINOUT I/O DESCRIPTIONS FOR MOTOR CONTROL FAMILY (CONTINUED)
Pin
Type
Buffer
Type
U1RX
U1TX
U1ARX
U1ATX
U2RX
U2TX
I
O
I
O
I
O
ST
—
ST
—
ST
—
UART1 Receive.
UART1 Transmit.
UART1 Alternate Receive.
UART1 Alternate Transmit.
UART2 Receive.
UART2 Transmit.
VDD
P
—
Positive supply for logic and I/O pins.
VSS
P
—
Ground reference for logic and I/O pins.
VREF+
I
Analog
Analog Voltage Reference (High) input.
VREF-
I
Analog
Analog Voltage Reference (Low) input.
Pin Name
Legend:
Description
CMOS = CMOS compatible input or output Analog = Analog input
ST = Schmitt Trigger input with CMOS levels O = Output I = Input P = Power
Pin Diagrams
MCLR
EMUD3/AN0/VREF+/CN2/RB0
EMUC3/AN1/VREF-/CN3/RB1
AN2/SS1/CN4/RB2
AN3/INDX/CN5/RB3
AN4/QEA/IC7/CN6/RB4
AN5/QEB/IC8/CN7/RB5
VSS
OSC1/CLKI
OSC2/CLKO/RC15
EMUD1/SOSCI/T2CK/U1ATX/CN1//RC13
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
VDD
EMUD2/OC2/IC2/INT2/RD1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
dsPIC30F3010
dsPIC30F2010
28-Pin PDIP and SOIC
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AVDD
AVSS
PWM1L/RE0
PWM1H/RE1
PWM2L/RE2
PWM2H/RE3
PWM3L/RE4
PWM3H/RE5
VDD
VSS
PGC/EMUC/U1RX/SDI1/SDA/RF2
PGD/EMUD/U1TX/SDO1/SCL/RF3
FLTA/INT0/SCK1/OCFA/RE8
EMUC2/OC1/IC1/INT1/RD0
MCLR
EMUD3/AN0/VREF+/CN2/RB0
EMUC3/AN1/VREF-/CN3/RB1
AN2/SS1/CN4/RB2
AN3/INDX/CN5/RB3
AN4/QEA/IC7/CN6/RB4
AN5/QEB/IC8/CN7/RB5
VSS
OSC1/CLKI
OSC2/CLKO/RC15
EMUD1/SOSCI/T2CK/U1ATX/CN1//RC13
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
VDD
EMUD2/OC2/IC2/INT2/RD1
© 2005 Microchip Technology Inc.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
dsPIC30F4012
28-Pin PDIP and SOIC
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AVDD
AVSS
PWM1L/RE0
PWM1H/RE1
PWM2L/RE2
PWM2H/RE3
PWM3L/RE4
PWM3H/RE5
VDD
VSS
PGC/EMUC/U1RX/SDI1/SDA/C1RX/RF2
PGD/EMUD/U1TX/SDO1/SCL/C1TX/RF3
FLTA/INT0/SCK1/OCFA/RE8
EMUC2/OC1/IC1/INT1/RD0
DS70043F-page 81
dsPIC30F
Pin Diagrams (Continued)
MCLR
EMUD3/AN0/VREF+/CN2/RB0
EMUC3/AN1/VREF-/CN3/RB1
AN2/SS1/LVDIN/CN4/RB2
AN3/INDX/CN5/RB3
AN4/QEA/IC7/CN6/RB4
AN5/QEB/IC8/CN7/RB5
AN6/OCFA/RB6
AN7/RB7
AN8/RB8
VDD
VSS
OSC1/CLKI
OSC2/CLKO/RC15
EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
FLTA/INT0/RE8
EMUD2/OC2/IC2/INT2/RD1
OC4/RD3
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
dsPIC30F3011
40-Pin PDIP
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
AVDD
AVSS
PWM1L/RE0
PWM1H/RE1
PWM2L/RE2
PWM2H/RE3
PWM3L/RE4
PWM3H/RE5
VDD
VSS
RF0
RF1
U2RX/RF4
U2TX/RF5
PGC/EMUC/U1RX/SDI1/SDA/RF2
PGD/EMUD/U1TX/SDO1/SCK/RF3
SCK1/RF6
EMUC2/OC1/IC1/INT1/RD0
OC3/RD2
VDD
40-Pin PDIP
DS70043F-page 82
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
dsPIC30F4011
MCLR
EMUD3/AN0/VREF+/CN2/RB0
EMUC3/AN1/VREF-/CN3/RB1
AN2/SS1/LVDIN/CN4/RB2
AN3/INDX/CN5/RB3
AN4/QEA/IC7/CN6/RB4
AN5/QEB/IC8/CN7/RB5
AN6/OCFA/RB6
AN7/RB7
AN8/RB8
VDD
VSS
OSC1/CLKI
OSC2/CLKO/RC15
EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
FLTA/INT0/RE8
EMUD2/OC2/IC2/INT2/RD1
OC4/RD3
VSS
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
AVDD
AVSS
PWM1L/RE0
PWM1H/RE1
PWM2L/RE2
PWM2H/RE3
PWM3L/RE4
PWM3H/RE5
VDD
VSS
C1RX/RF0
C1TX/RF1
U2RX/RF4
U2TX/RF5
PGC/EMUC/U1RX/SDI1/SDA/RF2
PGD/EMUD/U1TX/SDO1/SCK/RF3
SCK1/RF6
EMUC2/OC1/IC1/INT1/RD0
OC3/RD2
VDD
© 2005 Microchip Technology Inc.
dsPIC30F
Pin Diagrams (Continued)
44
43
42
41
40
39
38
37
36
35
34
AN3/INDX/CN5/RB3
AN2/SS1/LVDIN/CN4/RB2
EMUC3/AN1/VREF-/CN3/RB1
EMUD3/AN0/VREF+/CN2/RB0
MCLR
NC
AVDD
AVSS
PWM1L/RE0
PWM1H/RE1
PWM2L/RE2
44-Pin TQFP
dsPIC30F3011
33
32
31
30
29
28
27
26
25
24
23
12
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
10
11
PWM2H/RE3
PWM3L/RE4
PWM3H/RE5
VDD
VSS
NC
RF0
RF1
U2RXRF4
U2TX/RF5
PGC/EMUC/U1RX/SDI1/SDA/RF2
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
FLTA/INT0/RE8
EMUD2/OC2/IC2/INT2/RD1
OC4/RD3
VSS
NC
VDD
OC3/RD2
EMUC2/OC1/IC1/INT1/RD0
SCK1/TC1/RF6
PGD/EMUD/U1TX/SDO1/SCL/RF3
AN4/QEA/IC7/CN6/RB4
AN5/QEB/IC8/CN7/RB5
AN6/OCFA/RB6
AN7/RB7
AN8/RB8
NC
VDD
VSS
OSC1/CLKI
OSC2/CLKO/RC15
EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13
© 2005 Microchip Technology Inc.
DS70043F-page 83
dsPIC30F
Pin Diagrams (Continued)
44
43
42
41
40
39
38
37
36
35
34
AN3/INDX/CN5/RB3
AN2/SS1/LVDIN/CN4/RB2
EMUC3/AN1/VREF-/CN3/RB1
EMUD3/AN0/VREF+/CN2/RB0
MCLR
NC
AVDD
AVSS
PWM1L/RE0
PWM1H/RE1
PWM2L/RE2
44-Pin TQFP
dsPIC30F4011
33
32
31
30
29
28
27
26
25
24
23
12
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
10
11
PWM2H/RE3
PWM3L/RE4
PWM3H/RE5
VDD
VSS
NC
C1RX/RF0
C1TX/RF1
U2RXRF4
U2TX/RF5
PGC/EMUC/U1RX/SDI1/SDA/RF2
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
FLTA/INT0/RE8
EMUD2/OC2/IC2/INT2/RD1
OC4/RD3
VSS
NC
VDD
OC3/RD2
EMUC2/OC1/IC1/INT1/RD0
SCK1/TC1/RF6
PGD/EMUD/U1TX/SDO1/SCL/RF3
AN4/QEA/IC7/CN6/RB4
AN5/QEB/IC8/CN7/RB5
AN6/OCFA/RB6
AN7/RB7
AN8/RB8
NC
VDD
VSS
OSC1/CLKI
OSC2/CLKO/RC15
EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13
DS70043F-page 84
© 2005 Microchip Technology Inc.
dsPIC30F
Pin Diagrams (Continued)
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
PWM3L/RE4
PWM2H/RE3
PWM2L/RE2
PWM1H/RE1
PWM1L/RE0
CTX1/RF1
CRX1/RF0
VDD
VSS
CN16/UPDN/RD7
CN15/RD6
CN14/RD5
CN13/RD4
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
64-pin TQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
dsPIC30F5015
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
EMUC1/SOSCO/T1CK/CN0/RC14
EMUD1/SOSCI/T4CK/CN1/RC13
EMUC2/OC1/RD0
INT4/RD11
INT3/RD10
IC2/FLTB/INT2/RD9
IC1/FLTA/INT1/RD8
VSS
OSC2/CLKO/RC15
OSC1/CLKIN
VDD
SCL/RG2
SDA/RG3
EMUC3/SCK1/INT0/RF6
U1RX/SDI1/RF2
EMUD3/U1TX/SDO1/RF3
PGC/EMUC/AN6/OCFA/RB6
PGD/EMUD/AN7/RB7
AVDD
AVSS
AN8/RB8
AN9/RB9
AN10/RB10
AN11/RB11
VSS
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
CN17/RF4
CN18/RF5
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
PWM3H/RE5
PWM4L/RE6
PWM4H/RE7
SCK2/CN8/RG6
SDI2/CN9/RG7
SDO2/CN10/RG8
MCLR
SS2/CN11/RG9
VSS
VDD
AN5/QEB/IC8/CN7/RB5
AN4/QEA/IC7/CN6/RB4
AN3/INDX/CN5/RB3
AN2/SS1/CN4/RB2
AN1/VREF-/CN3/RB1
AN0/VREF+/CN2/RB0
© 2005 Microchip Technology Inc.
DS70043F-page 85
dsPIC30F
Pin Diagrams (Continued)
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
PWM3L/RE4
PWM2H/RE3
PWM2L/RE2
PWM1H/RE1
PWM1L/RE0
C1TX/RF1
C1RX/RF0
VDD
VSS
OC8/UPDN/CN16/RD7
OC7/CN15/RD6
OC6/IC6/CN14/RD5
OC5/IC5/CN13/RD4
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
64-pin TQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
dsPIC30F6015
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
EMUC1/SOSCO/T1CK/CN0/RC14
EMUD1/SOSCI/T4CK/CN1/RC13
EMUC2/OC1/RD0
IC4/INT4/RD11
IC3/INT3/RD10
IC2/FLTB/INT2/RD9
IC1/FLTA/INT1/RD8
VSS
OSC2/CLKO/RC15
OSC1/CLKI
VDD
SCL/RG2
SDA/RG3
EMUC3/SCK1/INT0/RF6
U1RX/SDI1/RF2
EMUD3/U1TX/SDO1/RF3
PGC/EMUC/AN6/OCFA/RB6
PGD/EMUD/AN7/RB7
AVDD
AVSS
AN8/RB8
AN9/RB9
AN10/RB10
AN11/RB11
VSS
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
U2RX/CN17/RF4
U2TX/CN18/RF5
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
PWM3H/RE5
PWM4L/RE6
PWM4H/RE7
SCK2/CN8/RG6
SDI2/CN9/RG7
SDO2/CN10/RG8
MCLR
SS2/CN11/RG9
VSS
VDD
AN5/QEB/IC8/CN7/RB5
AN4/QEA/IC7/CN6/RB4
AN3/INDX/CN5/RB3
AN2/SS1/CN4/RB2
AN1/VREF-/CN3/RB1
AN0/VREF+/CN2/RB0
DS70043F-page 86
© 2005 Microchip Technology Inc.
dsPIC30F
Pin Diagrams (Continued)
IC5/RD12
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
OC6/CN14/RD5
OC5/CN13/RD4
IC6/CN19/RD13
OC7/CN15/RD6
C2RX/RG0
C2TX/RG1
C1TX/RF1
C1RX/RF0
VDD
VSS
OC8/UPDN/CN16/RD7
PWM2L/RE2
PWM1H/RE1
PWM1L/RE0
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
PWM3L/RE4
PWM2H/RE3
80-Pin TQFP
PWM3H/RE5
1
PWM4L/RE6
2
60
EMUC1/SOSCO/T1CK/CN0/RC14
59
EMUD1/SOSCI/CN1/RC13
58
EMUC2/OC1/RD0
57
PWM4H/RE7
3
T2CK/RC1
T4CK/RC3
4
5
56
IC4/RD11
IC3/RD10
SCK2/CN8/RG6
6
55
IC2/RD9
SDI2/CN9/RG7
7
54
IC1/RD8
SDO2/CN10/RG8
MCLR
8
53
INT4/RA15
9
52
INT3/RA14
VSS
51
dsPIC30F6010A
SS2/CN11/RG9
VSS
10
11
50
VDD
12
49
OSC2/CLKO/RC15
OSC1/CLKI
FLTA/INT1/RE8
13
48
VDD
SCL/RG2
28
29
30
31
32
33
34
35
36
37
38
39
40
AN10/RB10
AN11/RB11
VSS
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
IC7/CN20/RD14
IC8/CN21/RD15
U2RX/CN17/RF4
U2TX/CN18/RF5
U1TX/RF3
27
41
AN9/RB9
20
26
U1RX/RF2
PGD/EMUD/AN0/CN2/RB0
AVSS
42
AN8/RB8
EMUD3/SDO1/RF8
19
25
18
43
24
SDI1/RF7
AN2/SS1/CN4/RB2
PGC/EMUC/AN1/CN3/RB1
AVDD
EMUC3/SCK1/INT0/RF6
44
VREF+/RA10
45
23
16
17
22
AN4/QEA/CN6/RB4
AN3/INDX/CN5/RB3
VREF-/RA9
SDA/RG3
21
15
46
FLTB/INT2/RE9
AN7/RB7
AN5/QEB/CN7/RB5
AN6/OCFA/RB6
14
47
Note: Pinout subject to change.
© 2005 Microchip Technology Inc.
DS70043F-page 87
dsPIC30F
Pin Diagrams (Continued)
IC5/RD12
OC4/RD3
OC3/RD2
EMUD2/OC2/RD1
OC6/CN14/RD5
OC5/CN13/RD4
IC6/CN19/RD13
OC7/CN15/RD6
C2RX/RG0
C2TX/RG1
C1TX/RF1
C1RX/RF0
VDD
VSS
OC8/CN16/UPDN/RD7
PWM2L/RE2
PWM1H/RE1
PWM1L/RE0
PWM2H/RE3
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
PWM3L/RE4
80-Pin TQFP
PWM3H/RE5
1
60
EMUC1/SOSCO/T1CK/CN0/RC14
PWM4L/RE6
2
59
EMUD1/SOSCI/CN1/RC13
PWM4H/RE7
3
58
EMUD2/OC1/RD0
T2CK/RC1
T4CK/RC3
SCK2/CN8/RG6
4
57
5
56
IC4/RD11
IC3/RD10
6
55
IC2/RD9
SDI2/CN9/RG7
7
54
IC1/RD8
SDO2/CN10/RG8
MCLR
8
53
INT4/RA15
9
52
SS2/CN11/RG9
VSS
10
51
INT3/RA14
VSS
VDD
12
49
OSC2/CLKO/RC15
OSC1/CLKI
FLTA/INT1/RE8
13
48
VDD
FLTB/INT2/RE9
14
47
AN5/QEB/CN7/RB5
15
46
SCL/RG2
SDA/RG3
AN4/QEA/CN6/RB4
AN3/INDX/CN5/RB3
16
45
EMUC3/SCK1/INT0/RF6
17
44
SDI1/RF7
AN2/SS1/LVDIN/CN4/RB2
PGC/EMUC/AN1/CN3/RB1
18
43
EMUD3/SDO1/RF8
19
42
U1RX/RF2
PGD/EMUD/AN0/CN2/RB0
20
41
U1TX/RF3
dsPIC30F6010*
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
AN7/RB7
VREF-/RA9
VREF+/RA10
AVDD
AVSS
AN8/RB8
AN9/RB9
AN10/RB10
AN11/RB11
VSS
VDD
AN12/RB12
AN13/RB13
AN14/RB14
AN15/OCFB/CN12/RB15
IC7/CN20/RD14
IC8/CN21/RD15
U2RX/CN17/RF4
U2TX/CN18/RF5
50
AN6/OCFA/RB6
11
* This device is not recommened for new designs. See dsPIC30F6010A.
DS70043F-page 88
© 2005 Microchip Technology Inc.
dsPIC30F
NOTES:
© 2005 Microchip Technology Inc.
DS70043F-page 89
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Tel: 44-118-921-5869
Fax: 44-118-921-5820
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Taiwan - Hsin Chu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
08/24/05
DS70043F-page 90
© 2005 Microchip Technology Inc.
