USB4640/USB4640i
High-Speed Inter-Chip (HSIC) USB 2.0 Hub
and Flash Media Controller
PRODUCT FEATURES
Datasheet
General Description
Features
The SMSC USB4640/USB4640i is a Hi-Speed HSIC USB
hub and card reader combo solution with an upstream port
that is compliant to HSIC 1.0 (supplement to the USB 2.0
Specification). The two downstream ports are compliant with
the USB 2.0 Specification.
High-Speed Inter-Chip (HSIC) is a digital interconnect bus
that enables the use of USB technology as a low-power chipto-chip interconnect at speeds up to 480 Mb/s. The HSIC
interface is an industry standard 2-pin digital interface which
uses standard USB software. The USB4640/USB4640i
provides an ultra fast interface between an HSIC enabled
host and several popular flash media formats. The controller
allows read/write capability to flash media from the following
families:
—
—
—
—
Secure DigitalTM (SD)
MultiMediaCardTM (MMC)
Memory Stick® (MS)
xD-Picture CardTM (xD)1
The USB4640/USB4640i combo solution leverages SMSC’s
innovative technology that delivers industry-leading data
throughput in mixed-speed USB environments. Average
sustained transfer rates exceeding 35 MB/s are possible2.
—
—
—
Highlights
Upstream HSIC port and 2 exposed Hi-Speed USB 2.0
downstream ports for external peripheral expansion
Dedicated flash media reader internally attached to a 3rd
downstream port of the hub as a USB compound device
—
single or multiplexed flash media reader interface
PortMap
PortSwap
—
—
Programmable USB differential-pair pin locations ease PCB
design by aligning USB signal lines directly to connectors
PHYBoost
Flexible port mapping and disable sequencing
— Programmable USB signal drive strength for recovering
signal integrity using 4-level driving strength resolution
Configures internal code using an external I2C EEPROM
Supports external code using an SPI Flash EEPROM
Customizable vendor ID, product ID, and language ID if using
an external EEPROM
Up to 9 configurable GPIOs for special functions
The USB4640 supports the commercial temperature range
of 0°C to +70°C
The USB4640i supports the industrial temperature range
of -40°C to +85°C
48-pin QFN (7 x 7 mm) lead-free, RoHS compliant
package
Applications
1. Obtain user license from the xD-Picture Card License
Office.
2. Host and media dependent.
Compliance with the following flash media card
specifications SD 2.0; MMC 4.2; MS 1.43; MS-Pro 1.02;
MS-Pro-HG 1.01; MS-Duo 1.10; and xD 1.2
Low-power digital HSIC interface offers a replacement for
onboard host and device connection for analog USB bus
cable
HSIC interface enables printers, mobile PCs, ultra-mobile
PCs, and cell phone products to reduce the total power
budget
HSIC interface provides use of USB connectivity and
compatibility with existing USB drivers and software
External 1.2 V reference allows upstream/downstream
HSIC links to use the same voltage reference
Supports a single external 3.3 V supply source; internal
regulators provide 1.8 V internal core voltage for additional
bill of materials and power savings
The hub transaction translator (TT) supports Full-Speed
and Low-Speed peripheral operation
9 KB RAM | 64 KB on-chip ROM
Enhanced EMI rejection and ESD protection performance
Hub and flash media reader/writer configuration from a
single source:
3G/4G handsets, smartphones, cell phones, and other
mobile devices
Desktop and mobile PCs
Printers
GPS navigation systems
Media players/viewers
Consumer A/V
Set-top boxes
Industrial products
SMSC USB4640/USB4640i
Revision 1.3 (03-13-13)
DATASHEET
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
Order Number(s):
USB4640/USB4640i-HZH-xx for 48-pin, QFN lead-free RoHS compliant package
USB4640/USB4640i-HZH-TR-xx for 48-pin, QFN lead-free RoHS compliant tape and reel package
“XX” in the order number indicates the internal ROM firmware revision level. Please contact SMSC for more information.
This product meets the halogen maximum concentration values per IEC61249-2-21
For RoHS compliance and environmental information, please visit www.smsc.com/rohs
Please contact your SMSC sales representative for additional documentation related to this product
such as application notes, anomaly sheets, and design guidelines.
Copyright © 2013 SMSC or its subsidiaries. All rights reserved.
Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for
construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC
reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications
before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent
rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated
version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors
known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not
designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property
damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of
this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered
trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
The Microchip name and logo, and the Microchip logo are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE
OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL
DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT;
TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD
TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 1.3 (03-13-13)
2
DATASHEET
SMSC USB4640/USB4640i
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
Conventions
Within this manual, the following abbreviations and symbols are used to improve readability.
Example
BIT
FIELD.BIT
x…y
BITS[m:n]
PIN
zzzzb
0xzzz
zzh
rsvd
N/A
code
Multi Word Name
Section Name
VAL
x
{,Parameter}
[Parameter]
SMSC USB4640/USB4640i
Description
Name of a single bit within a field
Name of a single bit (BIT) in FIELD
Range from x to y, inclusive
Groups of bits from m to n, inclusive
Pin Name
Binary number (value zzzz)
Hexadecimal number (value zzz)
Hexadecimal number (value zz)
Reserved memory location. Must write 0, read value indeterminate
Not applicable
Instruction code, or API function or parameter
Used for multiple words that are considered a single unit, such as:
Resource Allocate message, or Connection Label, or Decrement Stack Pointer instruction.
Section or Document name.
Over-bar indicates active low pin or register bit
Don’t care
indicate a Parameter is optional or is only used under some conditions
Braces indicate Parameter(s) that repeat one or more times.
Brackets indicate a nested Parameter. This Parameter is not real and actually decodes
into one or more real parameters.
3
DATASHEET
Revision 1.3 (03-13-13)
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
Table of Contents
Chapter 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.1
1.2
1.3
Hardware Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Software Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
OEM Selectable Hub Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Chapter 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Chapter 3 Pinning Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1
3.2
3.3
3.4
3.5
3.6
3.7
Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
48-Pin List. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Power Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5.1
Port Power Control Using a USB Power Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5.2
Port Power Control Using a Poly Fuse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ROM BOOT Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
12
13
18
20
20
20
21
22
Chapter 4 Configuration Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1
4.2
4.3
4.4
4.5
Hub . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Card Reader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.1
EEPROM/SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.2
EEPROM Data Descriptor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal Flash Media Controller Extended Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4.1
EEPROM Data Descriptor Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4.2
A0h-A7h: Device Power Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4.3
Device ID Strings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4.4
Hub Controller Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4.5
Internal Flash Media Controller Extended Configurations . . . . . . . . . . . . . . . . . . . . . . . .
4.4.6
I2C EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4.7
In-Circuit EEPROM Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Default Configuration Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5.1
External Hardware nRESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5.2
USB Bus Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
25
25
25
25
26
28
29
33
35
36
46
46
47
47
47
48
Chapter 5 AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
5.1
5.2
5.3
Oscillator/Crystal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ceramic Resonator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.1
I2C EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.2
USB 2.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
49
50
50
50
50
Chapter 6 DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
6.1
6.2
6.3
6.4
Maximum Guaranteed Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
51
52
53
56
Chapter 7 GPIO Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Revision 1.3 (03-13-13)
4
DATASHEET
SMSC USB4640/USB4640i
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
Chapter 8 Package Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
8.1
Tape and Reel Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
SMSC USB4640/USB4640i
5
DATASHEET
Revision 1.3 (03-13-13)
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
List of Tables
Table 3.1
Table 3.2
Table 3.3
Table 3.4
Table 3.5
Table 4.1
Table 4.2
Table 4.3
Table 4.4
Table 4.5
Table 4.6
Table 4.7
Table 5.1
Table 6.1
Table 7.1
USB4640/USB4640i 48-Pin List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
USB4640/USB4640i Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
USB4640/USB4640i Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Legend for Pin Reset States Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
USB4640/USB4640i Reset States Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal Flash Media Controller Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hub Controller Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Other Internal Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal Flash Media Controller Extended Configurations . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Map Register for Ports 1 and 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Map Register for Port 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
nRESET Timing for EEPROM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Crystal Circuit Legend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
USB4640/USB4640i GPIO Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Revision 1.3 (03-13-13)
6
DATASHEET
12
13
18
23
23
26
27
28
28
44
45
48
49
56
57
SMSC USB4640/USB4640i
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
List of Figures
Figure 2.1
Figure 3.1
Figure 3.2
Figure 3.3
Figure 3.4
Figure 3.5
Figure 3.6
Figure 3.7
Figure 4.1
Figure 5.1
Figure 5.2
Figure 5.3
Figure 6.1
Figure 8.1
Figure 8.2
Figure 8.3
USB4640/USB4640i Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
USB4640/USB4640i 48-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Power Control with USB Power Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Power Control with a Single Poly Fuse and Multiple Loads . . . . . . . . . . . . . . . . . . . . .
Port Power with Ganged Control with Poly Fuse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPI ROM Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I2C Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
nRESET Timing for EEPROM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Crystal Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Capacitance Formulas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ceramic Resonator Usage with SMSC IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply Rise Time Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
USB4640/USB4640i 48-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
48-Pin Package Tape Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
48-Pin Package Reel Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SMSC USB4640/USB4640i
7
DATASHEET
10
11
20
21
21
22
22
22
47
49
49
50
52
58
59
60
Revision 1.3 (03-13-13)
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
Chapter 1 Overview
The USB4640/USB4640i is a Hi-Speed HSIC USB hub and card reader combo solution with an
upstream port compliant to the High-Speed Inter-Chip USB Electrical Specification Revision 1.0 [2].
The two downstream ports are USB 2.0 compliant, and the dedicated flash media reader/writer is
internally attached to a 3rd downstream port as a USB compound device.
High-Speed Inter-Chip (HSIC) is a digital interconnect bus that enables the use of USB technology
as a low-power chip-to-chip interconnect at speeds up to 480 Mb/s (see the High-Speed Inter-Chip
USB Electrical Specification Revision 1.0). This combo solution supports several multi-format flash
media cards. This multi-format flash media controller and USB hub combo features two exposed
downstream USB ports available for external peripheral expansion.
The USB4640/USB4640i can attach to an upstream port as a Full- or Full/Hi-Speed hub. The hub
supports Low-Speed, Full-Speed, and Hi-Speed downstream devices (if operating as a Hi-Speed
hub) on all of the enabled downstream ports.
All required resistors on the USB ports are integrated into the hub, including all series termination
resistors on D+ and D– pins and all required pull-down and pull-up resistors. The over-current sense
inputs for the downstream facing ports have internal pull-up resistors.
The USB4640/USB4640i includes programmable features, such as:
PortMap: provides flexible port mapping and disable sequences. The downstream ports of a
USB4640/USB4640i hub can be reordered or disabled in any sequence to support multiple
platform designs with minimum effort. For any port that is disabled, the USB4640/USB4640i hub
controllers automatically reorder the remaining ports to match the USB host controller’s port
numbering scheme.
PortSwap: adds per-port programmability to USB differentialpair pin locations. PortSwap also allows direct alignment of USB
signals (D+/D-) to connectors to avoid uneven trace length or
crossing of the USB differential signals on the PCB.
PHYBoost: enables 4 programmable levels of USB signal drive
strength in downstream port transceivers. PHYBoost will also
attempt to restore USB signal integrity.
Note: PHYBoost is only available on the two USB downstream
ports.
1.1
Hardware Features
Single chip HSIC hub and flash media controller combo
USB2660/USB2660i supports the commercial temperature range of 0°C to +70°C
USB4640/USB4640i supports the industrial temperature range of -40°C to +85°C
Transaction translator (TT) in the hub supports operation of FS and LS peripherals
Full power management with individual or ganged power control of each downstream port
Optional support for external firmware access via SPI interface
Onboard 24 MHz crystal driver circuit
Optional external 24 MHz clock input (must be a 1.8 V signal)
Code execution via SPI ROM which must meet the following criteria:
—30 MHz or 60 MHz operation support
—Single bit or dual bit mode support
—Mode 0 or mode 3 SPI support
Revision 1.3 (03-13-13)
8
DATASHEET
SMSC USB4640/USB4640i
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
1.2
Compliance with the following flash media card specifications:
—Secure Digital 2.0 and MultiMediaCard 4.2
–SD 2.0, SD-HS, SD-HC
–TransFlash™ and reduced form factor media
–1/4/8 bit MMC 4.2
—Memory Stick 1.43
—Memory Stick Pro Format 1.02
—Memory Stick Pro-HG Duo Format 1.01
–Memory Stick, MS Duo, MS-HS, MS Pro-HG, MS Pro
—Memory Stick Duo 1.10
–xD-Picture Card 1.2
Up to 9 GPIOs: configuration and polarity for special function use
—The number of actual GPIOs depends on the implementation configuration used
—One GPIO available with up to 200 mA drive and protected fold-back short circuit current
8051 8-bit microprocessor
—60 MHz - single cycle execution
—64 KB ROM | 9 KB RAM
Integrated regulator for 1.8 V core operation
Software Features
1.3
Hub and flash media reader/writer configuration from a single source: External I2C ROM or external
SPI ROM, where the following features are then available:
—Customizable vendor ID, product ID, and device ID
—12-hex digits maximum for the serial number string
—28-character manufacturer ID and product strings for the flash media reader/writer
OEM Selectable Hub Features
The USB4640/USB4640i provides a default configuration that may be sufficient for most applications.
following a reset. The USB4640/USB4640i can instead be configured by an external I2C EEPROM or
SPI ROM.
Compound Device support on a port-by-port basis
—a port is permanently hardwired to a downstream USB peripheral device
Select over-current sensing and port power control on an individual or ganged (all ports together)
basis to match the OEM’s choice of circuit board component selection
Port power control and over-current detection/delay features
Configure the delay time for filtering the over-current sense inputs
Configure the delay time for turning on downstream port power
Bus- or self-powered selection
Hub port disable or non-removable configurations
Flexible port mapping and disable sequencing supports multiple platform designs
Programmable USB differential-pair pin location eases PCB layout by aligning USB signal lines
directly to connectors
Programmable USB signal drive strength recovers USB signal integrity using 4 levels of signal drive
strength
Indicate the maximum current that the 2-port hub consumes
Indicate the maximum current required for the hub controller
SMSC USB4640/USB4640i
9
DATASHEET
Revision 1.3 (03-13-13)
Revision 1.3 (03-13-13)
3.3 V
DATASHEET
10
USB Data
Downstream
PHY
PLL
24 MHz
Crystal
Transaction
Translator
Serial
Interface
Engine
1.8 V Reg
3.3 V
1.8 V
USB Data
OC Sense/
Downstream Pwr Switch
PHY
Port #2
OC
Sense
Switch
Driver
Routing & Port Re-Ordering Logic
Repeater
HSIC
HSIC
Data & Strobe
OC Sense/
Pwr Switch
Port #3
OC
Sense
Switch
Driver
VDDCR
1.8 V Reg
HSIC
Impedance
1.2 V
SIE
CTL
3K
total
BUS
INTFC
ADDR
MAP
EP2
EP2 RX
RX
EP2 TX
RAM
EP0 TX
EP0 RX
ROM
64 K
RAM
6K
SFR
RAM
BUS
INTFC
GPIOs
GPIO
PWR_FET0
SPI
MS
BUS
INTFC
SD/
MMC/
SDIO
FMI
FMDU
CTL
AUTO_CBW
PROC
Flash Media Cards
(require Combo socket)
xD*
XDATA BRIDGE
+ BUS ARBITER
Program Memory I/O Bus
8051
PROCESSOR
*For xD-Picture CardTM support, please obtain a user
license from the xD-Picture Card License office.
BRIDGE
Port Controller
Controller
Serial
Interface
8 pins
GPIO10 (CRD_PWR)
SPI (4 pins)
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
Chapter 2 Block Diagram
Figure 2.1 USB4640/USB4640i Block Diagram
SMSC USB4640/USB4640i
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
Chapter 3 Pinning Information
This chapter outlines the pinning configuration, followed by a corresponding pin list grouped by
function. The detailed pin descriptions are listed then outlined in Section 3.3, on page 13.
GPIO2/RXD
GPIO10 (CRD_PWR)
VDD33
SD_D2/xD_D5
SD_D3/MS_D3/xD_D6
GPIO12/MS_INS
SD_D4/MS_D2/xD_D7
GPIO14/xD_nCD
xD_nB/R
xD_nRE
xD_nCE
VDD33
36
35
34
33
32
31
30
29
28
27
26
25
Pin Configurations
GPIO1/LED/TXD
37
24
SD_CMD/MS_D0/xD_CLE
nRESET
38
23
SD_D5/MS_D1/xD_ALE
HSIC_IMP
39
22
xD_nWE
TEST
40
21
SD_CLK/MS_BS/xD_nWP
20
SD_D6/MS_D7/xD_D0
19
SD_D7/MS_D6/xD_D1
18
SD_D0/MS_D4/xD_D2
17
SD_D1/MS_D5/xD_D3
16
VDD33
15
CRFILT
14
GPIO15/SD_nCD
13
GPIO6/SD_WP/MS_SCLK/xD_D4
10
11
12
SPI_DI
VDD33
9
SPI_CLK/GPIO4/SCL
SPI_DO/GPIO5/SDA/SPI_SPD_SEL
8
USBDN_DM2
SPI_CE_n
48
7
47
6
RBIAS
VDD33
Ground Pad
(must be connected to VSS)
PRTCTL3
46
PRTCTL2
PLLFILT
5
45
4
44
1
XTAL2
XTAL1 (CLKIN)
VDD33
43
USBDN_DP3
HSIC_STROBE
SMSC
USB4640/40i
(Top View QFN-48)
3
42
USBDN_DM3
41
2
VDD12
HSIC_DAT
USBDN_DP2
3.1
Indicates pins on the bottom of the device.
Figure 3.1 USB4640/USB4640i 48-Pin QFN
SMSC USB4640/USB4640i
11
DATASHEET
Revision 1.3 (03-13-13)
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
3.2
48-Pin List
Table 3.1 USB4640/USB4640i 48-Pin List
UPSTREAM HSIC INTERFACE (3 PINS)
HSIC_IMP
HSIC_DAT
HSIC_STROBE
DOWNSTREAM USB INTERFACE (3 PINS)
XTAL1 (CLKIN)
XTAL2
RBIAS
DOWNSTREAM 2-PORT USB INTERFACE (6 PINS)
USBDN_DP2
USBDN_DM2
USBDN_DP3
USBDN_DM3
PRTCTL2
PRTCTL3
SECURE DIGITAL/MEMORY STICK/xD INTERFACE (18 PINS)
SD_D7/
MS_D6/
xD_D1
SD_D6/
MS_D7/
xD_D0
SD_D5/
MS_D1/
xD_ALE
SD_D4/
MS_D2/
xD_D7
SD_D3/
MS_D3/
xD_D6
SD_D2/
xD_D5
SD_D1/
MS_D5/
xD_D3
SD_D0/
MS_D4/
xD_D2
SD_CLK/
MS_BS/
xD_nWP
SD_CMD/
MS_D0/
xD_CLE
GPIO15/
SD_nCD
GPIO12/
MS_INS
GPIO6/
SD_WP/
MS_SCLK/
xD_D4
GPIO14/
xD_nCD
xD_nWE
xD_nB/R
xD_nRE
xD_nCE
SPI INTERFACE (4 PINS)
SPI_CE_N
SPI_DO/
GPIO5/
SDA/
SPI_SPD_SEL
SPI_CLK/
GPIO4/
SCL
SPI_DI
MISC (5 PINS)
nRESET
TEST
GPIO1/
LED/
TXD
GPIO2/
RXD
CRFILT
PLLFILT
GPIO10 (CRD_PWR)
POWER (9 PINS)
(6) VDD33
VDD12
TOTAL 48
Revision 1.3 (03-13-13)
12
DATASHEET
SMSC USB4640/USB4640i
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
3.3
Pin Descriptions
This section provides a detailed description of each pin. The pins are arranged in functional groups
according to their associated interface. The pin descriptions below are applied when using the internal
default firmware and can be referenced in Chapter 4: Configuration Options on page 25. See
Appendix A: (Acronyms) on page 61 for details.
An n in the signal name indicates that the active (asserted) state occurs when the signal is at a low
voltage level. When the n is not present, the signal is asserted when it is at a high voltage level. The
terms assertion and negation are used exclusively in order to avoid confusion when working with a
mixture of active low and active high signals. The term assert, or assertion, indicates that a signal is
active, independent of whether that level is represented by a high or low voltage. The term negate, or
negation, indicates that a signal is inactive.
Table 3.2 USB4640/USB4640i Pin Descriptions
SYMBOL
48-PIN
QFN
BUFFER
TYPE
DESCRIPTION
UPSTREAM HSIC INTERFACE
HSIC_IMP
39
I
HSIC Impedance Control
Selects the driver impedance of HSIC_DAT and HSIC_STROBE
1 : Approximately 50 Ω impedance
0 : Approximately 40 Ω impedance
HSIC_DAT
42
I/O
HSIC Data
Bi-directional double data rate (DDR) data signal that is synchronous
to the HSIC_STROBE signal as defined in the High-Speed Inter-Chip
USB Specification, Version 1.0.
HSIC_STROBE
43
I/O
HSIC Strobe
Bi-directional data strobe signal defined in the High-Speed Inter-Chip
USB Specification, Version 1.0.
DOWNSTREAM USB INTERFACE
USBDN_DM
[3:2]
USBDN_DP
[3:2]
3
1
4
2
I/O-U
PRTCTL[3:2]
7
6
I/OD6PU
USB Bus Data
Connect to the downstream USB bus data signals and can be
swapped using the PortSwap feature (See Section 4.4.4.20: F1h:
Port Swap on page 43).
USB Power Enable, when used as an:
RBIAS
47
I-R
output: enables power to downstream USB peripheral devices and
have weak internal pull-up resistors. (See Section 3.5: Port Power
Control on page 20 for diagram and usage instructions.)
input: monitor the over-current condition (when the power is
enabled). When an over-current condition is detected, the pins turn
the power off.
USB Transceiver Bias
Sets the transceiver's internal bias currents using a 12.0 kΩ, ±1.0%
resistor attached from VSS.
XTAL1 (CLKIN)
45
ICLKx
24 MHz Crystal Input or External Clock Input
Can be connected to one terminal of the crystal or connected to an
external 24 MHz clock when a crystal is not used.
SMSC USB4640/USB4640i
13
DATASHEET
Revision 1.3 (03-13-13)
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
Table 3.2 USB4640/USB4640i Pin Descriptions (continued)
SYMBOL
48-PIN
QFN
BUFFER
TYPE
XTAL2
44
OCLKx
DESCRIPTION
24 MHz Crystal Output
The other terminal of the crystal, or it is left open when an external
clock source is used to drive XTAL1(CLKIN).
SECURE DIGITAL INTERFACE
SD_D[7:0]
SD_CLK
19
20
23
30
32
33
17
18
I/O8PU
21
O8
Secure Digital Data 7-0
Bi-directional data signals SD_D0 - SD_D7 with weak pull-up
resistors.
Secure Digital Clock
The output clock signal to the SD/MMC device.
SD_CMD
24
I/O8PU
Secure Digital Command
Bi-directional signal that connects to the CMD signal of the SD/MMC
device. The bi-directional signal has a weak internal pull-up resistor.
GPIO15/
14
I/O6
General Purpose IO 15
Can be used either as an input; edge sensitive interrupt input; or
output. Custom firmware is required to activate this function.
SD_nCD
I/O8PU
Secure Digital Card Detect GPIO
Designated by the default firmware as the Secure Digital card
detection pin and has an internal pull-up.
GPIO6/
13
I/O6
General Purpose IO 6
Can be used either as input; edge sensitive interrupt input; or output.
Custom firmware is required to activate this function.
SD_WP
I/O8
Secure Digital Write Protected GPIO
Designated by the default firmware as the Secure Digital card
interface mechanical write protect detect pin.
MEMORY STICK INTERFACE
MS_BS
21
O8
Memory Stick Bus State
Connected to the bus state pin of the MS device. It is used to control
the Bus States 0, 1, 2, and 3 (BS0, BS1, and BS3) of the MS device.
GPIO12/
31
I/O8
General Purpose IO 12
Can be used either as input; edge sensitive interrupt input; or output.
Custom firmware is required to activate this function.
MS_INS
IPU
Memory Stick Card Insertion GPIO
Designated by the default software as the Memory Stick card
detection pin and has a weak internal pull-up resistor.
MS_SCLK
13
O8
Memory Stick System Clock
Output clock signal to the MS device.
Revision 1.3 (03-13-13)
14
DATASHEET
SMSC USB4640/USB4640i
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
Table 3.2 USB4640/USB4640i Pin Descriptions (continued)
SYMBOL
MS_D[7:0]
48-PIN
QFN
BUFFER
TYPE
20
19
17
18
32
30
23
24
I/O8PD
DESCRIPTION
Memory Stick System Data In/Out
Bi-directional data signals for the MS device. In serial mode, the
most significant bit (MSB) of each byte is transmitted first by either
the memory stick controller MSC or the MS device on MS_D0.
MS_D0, MS_D2, and MS_D3 have weak pull-down resistors. MS_D1
has a pull-down resistor when in parallel mode. Otherwise, it is
disabled. In 4- or 8-bit parallel modes, all MS_D7 - MS_D0 signals
have weak pull-down resistors.
xD-PICTURE CARD INTERFACE
xD_D[7:0]
xD_ALE
30
32
33
13
17
18
19
20
I/O8PD
23
O8PD
xD-Picture Card Data 7-0
Bi-directional data signals xD_D7 - xD_D0 and have weak internal
pull-down resistors.
xD-Picture Card Address Strobe
Active high Address Latch Enable (ALE) signal for the xD-Picture
Card device. This pin has a weak pull-down resistor that is
permanently enabled.
xD_nB/R
28
IPU
xD-Picture Card Busy or Data Ready
Connected to the BSY/RDY pin of the xD-Picture Card device.
When using the internal FET, this pin has a weak internal pull-up
resistor that is tied to the output of the internal power FET.
If an external FET is used (the internal FET is disabled), then the
internal pull-up is not available (an external pull-up is required).
xD_nCE
26
O8PU
xD-Picture Card Chip Enable
Active low chip enable signal for the xD-Picture Card device.
When using the internal FET, this pin has weak internal pull-up
resistor that is tied to the output of the internal power FET.
If an external FET is used (internal FET is disabled), then the internal
pull-up is not available (an external pull-up is required).
xD_CLE
24
O8PD
xD-Picture Card Command Strobe
An active high Command Latch Enable signal for the xD-Picture
Card device. This pin has a weak pull-down resistor that is
permanently enabled.
GPIO14/
29
I/O6
General Purpose IO 14
Can be used either as input; edge sensitive interrupt input; or output.
Custom firmware is required to activate this function.
xD_nCD
I/O8
xD-Picture Card Detection GPIO
Designated by the default firmware as the xD-Picture Card detection
pin and has an internal pull-up.
SMSC USB4640/USB4640i
15
DATASHEET
Revision 1.3 (03-13-13)
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
Table 3.2 USB4640/USB4640i Pin Descriptions (continued)
SYMBOL
48-PIN
QFN
BUFFER
TYPE
xD_nRE
27
O8PU
DESCRIPTION
xD-Picture Card Read Enable
Active low read strobe signal for the xD-Picture Card device.
When using the internal FET, this pin has a weak internal pull-up
resistor that is tied to the output of the internal power FET.
If an external FET is used (internal FET is disabled), then the internal
pull-up is not available (an external pull-up is required).
xD_nWE
22
O8PU
xD-Picture Card Write Enable
Active low write strobe signal for the xD-Picture Card device.
When using the internal FET, this pin has a weak internal pull-up
resistor that is tied to the output of the internal power FET.
If an external FET is used (internal FET is disabled), then the internal
pull-up is not available (an external pull-up is required).
xD_nWP
21
O8PD
xD-Picture Card Write Protect
Active low write-protect signal for the xD-Picture Card device. This
pin has a weak pull-down resistor that is permanently enabled.
SPI INTERFACE
SPI_CE_n
8
O12
SPI Chip Enable
Active low chip enable output. If the SPI interface is enabled, this pin
must be driven high in power down states.
SPI_CLK/
9
I/O12
SPI Clock Out
Clock signal out to the serial ROM. See Section 3.6: ROM BOOT
Sequence on page 21 for diagram and usage instructions. During
reset, this pin must be driven low.
GPIO4/
I/O6
General Purpose IO 4
Can be used either as input; edge sensitive interrupt input; or output.
Custom firmware is required to activate this function.
SCL
Serial Clock
The I2C EEPROM clock pin when the device is connected to the
optional I2C EEPROM.
Revision 1.3 (03-13-13)
16
DATASHEET
SMSC USB4640/USB4640i
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
Table 3.2 USB4640/USB4640i Pin Descriptions (continued)
SYMBOL
48-PIN
QFN
BUFFER
TYPE
SPI_DO/
10
I/O12
DESCRIPTION
SPI Serial Data Out
The output for the SPI port. See Section 3.6: ROM BOOT Sequence
for diagram and usage instructions.
GPIO5/
I/O6
SDA/
This pin may be used either as an input; edge sensitive interrupt
input; or output. Custom firmware is required to activate this function.
Serial Data Line
The I2C EEPROM data pin when the device is connected to the
optional I2C EEPROM.
SPI_SPD_SEL
I/O12
SPI Speed Select
Selects the speed of the SPI interface. During nRESET assertion,
this pin will be tri-stated with the weak pull-down resistor enabled.
When nRESET is negated, the value on the pin will be internally
latched, and the pin will revert to SPI_DO functionality, where the
internal pull-down will be disabled.
0 : 30 MHz (no external resistor should be applied)
1 : 60 MHz (a 10 kΩ external pull-up resistor must be applied)
If the latched value is 1, then the pin is tri-stated when the chip is in
the suspend state.
If the latched value is 0, then the pin is driven low during a suspend
state.
SPI_DI
11
I/O12PD
SPI Serial Data In
The SPI data in to the controller from the ROM. This pin has a weak
internal pull-down applied at all times to prevent floating.
MISC
GPIO1/
37
I/O6
General Purpose I/O 1
Can be used either as an input; edge sensitive interrupt input; or
output. Custom firmware is required to activate this function.
LED/
Can be used as an LED output.
TXD
This signal can be configured as the TXD output of the internal
UART. Custom firmware is required to activate this function.
GPIO2/
36
I/O6
General Purpose I/O 2
Can be used either as an input; edge sensitive interrupt input; or
output. Custom firmware is required to activate this function.
RXD
GPIO10
(CRD_PWR)
This signal can be configured as input to the RXD of the internal
UART. Custom firmware is required to activate this function.
35
I/O200
Card Power Drive: 3.3 V (100 mA or 200 mA)
This must be the only FET used to power devices. Failure to do this
will violate voltage specifications on device pins. If this pin is not
being used as a card power pin, this pin may be used either as an
input; edge sensitive interrupt input; or output (GPIO).
Please see Section 4.4.2.3: A4h-A5h: Smart Media Device Power
Configuration on page 34 for more information.
SMSC USB4640/USB4640i
17
DATASHEET
Revision 1.3 (03-13-13)
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
Datasheet
Table 3.2 USB4640/USB4640i Pin Descriptions (continued)
SYMBOL
48-PIN
QFN
BUFFER
TYPE
nRESET
38
IS
DESCRIPTION
Reset Input
The system uses this active low signal to reset the chip. The active
low pulse should be at least 1 μs wide.
TEST
40
I
Test Input
Tie to ground for normal operation.
DIGITAL / POWER / GROUND
CRFILT
15
VDD Core Regulator Filter Capacitor
Requires a 1.0 μF (or greater) ± 20% (ESR
工商网监
湘ICP备2023018690号
