MCP103T-270E/TTVAO

MCP102/103/121/131 Micropower Voltage Supervisors Features: General Description: • Ultra-Low Supply Current: 1.75 µA (steady-state maximum) • Precision Monitoring Options of: - 1.90V, 2.32V, 2.63V, 2.93V, 3.08V, 4.38V and 4.63V • Resets Microcontroller in a Power-Loss Event • RST Pin (active-low): - MCP121: Active-low, Open-drain - MCP131: Active-low, Open-drain with Internal Pull-up Resistor - MCP102 and MCP103: Active-low, Push-pull • Reset Delay Timer (120 ms delay, typical) • Available in SOT-23, TO-92 and SC70 Packages • Temperature Range: - Extended: -40°C to +125°C (except MCP1XX-195) - Industrial: -40°C to +85°C (MCP1XX-195 only) • Pb-free Devices The MCP102/103/121/131 devices are voltage supervisor devices designed to keep a microcontroller in reset until the system voltage has reached and stabilized at the proper level for reliable system operation. Table 1 shows the available features for these devices. Package Types RST 1 VDD 2 3 VSS RST VDD VSS SOT-23/SC70 Applications: VSS 1 MCP103 • Critical Microcontroller and Microprocessor Power-monitoring Applications • Computers • Intelligent Instruments • Portable Battery-powered Equipment TO-92 MCP102/121/131 SOT-23/SC70 RST 3 VDD 2 Block Diagram VDD R (1) Comparator + – Reset Delay Circuit Output Driver RST Band Gap Reference VSS  2004-2014 Microchip Technology Inc. Note: MCP131 only DS20001906D-page 1 MCP102/103/121/131 TABLE 1: DEVICE FEATURES Output Device Type Pull-up Resistor Reset Delay (typ) Package Pinout (Pin # 1, 2, 3) Comment MCP102 Push-pull No 120 ms RST, VDD, VSS MCP103 Push-pull No 120 ms VSS, RST, VDD 120 ms RST, VDD, VSS MCP131 Open-drain Internal (~95 k) 120 ms RST, VDD, VSS MCP111 Open-drain External No VOUT, VSS, VDD See MCP111/112 Data Sheet (DS21889) MCP112 Push-Pull No VOUT, VSS, VDD See MCP111/112 Data Sheet (DS21889) MCP121 Open-drain External DS20001906D-page 2 No  2004-2014 Microchip Technology Inc. MCP102/103/121/131 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings† VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V Input current (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 mA Output current (RST) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 mA Rated Rise Time of VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100V/µs All inputs and outputs (except RST) w.r.t. VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to (VDD + 1.0V) RST output w.r.t. VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to 13.5V Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to + 150°C Ambient temperature with power applied . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to + 125°C Maximum Junction temperature with power applied . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C ESD protection on all pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ³ 2 kV † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. DC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only), TA = -40°C to +125°C. Parameters Sym. Min. Typ. Max. Units Operating Voltage Range VDD 1.0 — 5.5 V Specified VDD Value to RST low VDD 1.0 — MCP102, MCP103, MCP121 IDD — 5.5V applied  100s, current into pin limited to 2 mA, 25°C operation recommended (Note 5, Note 6) Trip point is ±1.5% from typical value. Trip point is ±2.5% from typical value. RST output is forced low. There is a current through the internal pull-up resistor. This includes the current through the internal pull-up resistor and the reset power-up timer. This specification allows this device to be used in PIC® microcontroller applications that require In-Circuit Serial Programming™ (ICSP™) (see device-specific programming specifications for voltage requirements). This specification DOES NOT allow a continuous high voltage to be present on the open-drain output pin (VOUT). The total time that the VOUT pin can be above the maximum device operational voltage (5.5V) is 100s. Current into the VOUT pin should be limited to 2 mA and it is recommended that the device operational temperature be maintained between 0°C to 70°C (+25°C preferred). For additional information, please refer to Figure 2-33. This parameter is established by characterization and not 100% tested. DS20001906D-page 4  2004-2014 Microchip Technology Inc. MCP102/103/121/131 VTRIP 1V VDD tRPU tRPD VOH 1V VOL RST tRT FIGURE 1-1: Timing Diagram. AC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only), TA = -40°C to +125°C. Parameters Sym. Min. Typ. Max. Units VDD Detect to RST Inactive tRPU 80 120 180 ms Figure 1-1 and CL = 50 pF VDD Detect to RST Active tRPD — 130 — µs VDD ramped from VTRIP(MAX) + 250 mV down to VTRIP(MIN) – 250 mV, per Figure 1-1, CL = 50 pF (Note 1) tRT — 5 — µs For RST 10% to 90% of final value per Figure 1-1, CL = 50 pF (Note 1) RST Rise Time After RST Active (MCP102 and MCP103 only) Note 1: Conditions These parameters are for design guidance only and are not 100% tested. TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only), TA = -40°C to +125°C. Parameters Sym. Min. Typ. Max. Units Specified Temperature Range TA -40 Specified Temperature Range TA -40 Maximum Junction Temperature Storage Temperature Range Conditions — +85 ºC MCP1XX-195 — +125 ºC Except MCP1XX-195 TJ — — +150 ºC TA -65 — +150 ºC Thermal Resistance, 3L-SOT-23 JA — 308 — ºC/W Thermal Resistance, 3L-SC70 JA — 335 — ºC/W Thermal Resistance, 3L-TO-92 JA — 146 — ºC/W Temperature Ranges Package Thermal Resistances  2004-2014 Microchip Technology Inc. DS20001906D-page 5 MCP102/103/121/131 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only; see Figure 4-1), TA = -40°C to +125°C. 1.8 16 MCP102-195 1.6 1.4 IDD (µA) 1 4.0V 2.1V 2.8V 0.6 10 5.0V 4.0V 8 6 2.8V 4 1.7V 2 1.0V 140 120 100 20 0 -40 Temperature (°C) 80 2.1V 0 140 120 100 80 60 40 20 0 -20 -40 0 60 0.2 40 0.4 -20 IDD (µA) 5.0V 0.8 MCP102-195 12 5.5V 1.2 5.5V 14 Temperature (°C) FIGURE 2-1: IDD vs. Temperature (Reset Power-up Timer Inactive) (MCP102-195). FIGURE 2-4: IDD vs. Temperature (Reset Power-up Timer Active) (MCP102-195). 35 80 2.9V 30 5.5V 70 MCP131-315 5.0V 25 60 20 50 15 IDD (µA) 1.0V 10 3.3V 5 4.0V 4.5V 40 4.0V 30 3.3V 20 4.5V 5.0V 5.5V 10 Temperature (°C) 140 120 100 80 16 MCP121-450 5.5V MCP121-450 14 5.5V 0.7 12 IDD (µA) 5.0V 0.5 4.8V 4.6V 4.1V Temperature (°C) FIGURE 2-3: IDD vs. Temperature (Reset Power-up Timer Inactive) (MCP121-450). 140 120 100 80 -40 140 120 100 80 60 40 20 0 0 0 -20 2 -40 0.1 DS20001906D-page 6 4.6V 4 3.0V 1.0V 4.8V 60 0.2 5.0V 6 40 0.3 8 20 0.4 10 0 0.6 IDD (µA) 60 FIGURE 2-5: IDD vs. Temperature (Reset Power-up Timer Active) (MCP131-315). -20 0.8 40 Temperature (°C) FIGURE 2-2: IDD vs. Temperature (Reset Power-up Timer Inactive) (MCP131-315). 0.9 20 -40 0 0 140 120 100 80 60 40 20 0 -20 -40 0 -20 IDD (µA) MCP131-315 Temperature (°C) FIGURE 2-6: IDD vs. Temperature (Reset Power-up Timer Active) (MCP121-450).  2004-2014 Microchip Technology Inc. MCP102/103/121/131 Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only; see Figure 4-1), TA = -40°C to +125°C. 16 1.8 MCP102-195 1.6 1.4 IDD (µA) IDD (µA) +85°C 1 +125°C 0.8 0.6 0°C 0 1.0 2.0 3.0 4.0 VDD (V) 5.0 35 MCP131-315 5.0 6.0 0°C -40°C +25°C IDD (µA) 60 +85°C 10 4.0 VDD (V) 70 +70°C 15 3.0 80 +25°C 20 2.0 FIGURE 2-10: IDD vs.VDD (Reset Power-up Timer Active) (MCP102-195). -40°C 0°C MCP131-315 25 IDD (µA) 1.0 6.0 FIGURE 2-7: IDD vs. VDD (Reset Power-up Timer Inactive) (MCP102-195). Device in Reset tRPU inactive 50 +125°C +70°C +85°C 40 30 +125°C 5 20 0 10 0 -5 1.0 2.0 3.0 4.0 VDD (V) 5.0 1.0 6.0 FIGURE 2-8: IDD vs. VDD (Reset Power-up Timer Inactive) (MCP131-315). 2.0 3.0 4.0 VDD (V) 5.0 6.0 FIGURE 2-11: IDD vs.VDD (Reset Power-up Timer Active) (MCP131-315). 16 0.9 MCP121-450 14 +125°C 0.7 0.4 0.3 Device in Reset tRPU inactive 10 +70°C 0.5 -40°C 0°C +25°C MCP121-450 12 +85°C 0.6 IDD (µA) IDD (µA) Device in Reset tRPU inactive 8 2 0 0.8 +125°C 4 0.2 30 +85°C 10 6 -40°C 0.4 +70°C 12 +70°C 1.2 0°C -40°C +25°C MCP102-195 14 +25°C 8 +70°C +85°C +125°C 6 4 +25°C 2 0.2 0°C 0.1 0 -40°C -2 0 1.0 2.0 3.0 4.0 VDD (V) 5.0 6.0 FIGURE 2-9: IDD vs. VDD (Reset Power-up Timer Inactive) (MCP121-450).  2004-2014 Microchip Technology Inc. 1.0 2.0 3.0 4.0 VDD (V) 5.0 6.0 FIGURE 2-12: IDD vs.VDD (Reset Power-up Timer Active) (MCP121-450). DS20001906D-page 7 MCP102/103/121/131 Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121; see Figure 4-1), TA = -40°C to +125°C. 1.945 0.050 VTRIP, increasing VDD 1.940 1.935 0.100 0.040 VHYS, Hysteresis 0.030 1.920 0.025 1.915 0.020 1.910 0.015 VTRIP, decreasing VDD 1.905 +125°C +25°C 0.040 0°C -40°C 0.000 0.000 -10 40 90 Temperature (°C) -0.020 0.00 140 FIGURE 2-13: VTRIP vs. Temperature vs. Hysteresis (MCP102-195). 3.200 0.060 0.020 0.005 1.895 -60 +85°C 0.010 MCP102-195 1.900 +70°C VOL (V) 1.925 MCP102-195 VDD = 1.7V 0.080 0.035 Hyst (V) 1.930 VTRIP (V) 0.120 0.045 VTRIP, increasing VDD 3.180 0.25 0.50 IOL (mA) 0.75 FIGURE 2-16: VOL vs. IOL (MCP102-195 @ VDD = 1.7V). 0.108 0.070 0.106 0.060 MCP131-315 VDD = 2.9V +70°C 0.104 VHYS, Hysteresis 0.100 3.120 0.098 0.096 VTRIP, decreasing VDD MCP131-315 3.060 -10 40 90 Temperature (°C) 0.010 0.090 0.000 0.00 0.050 0.130 0.120 4.350 MCP121-450 20 60 100 Temperature (°C) 140 FIGURE 2-15: VTRIP vs. Temperature vs. Hysteresis (MCP121-450). DS20001906D-page 8 MCP121-450 VDD = 4.1V +125°C +70°C 0.030 0.020 +25°C 0°C 0.010 0.110 0.100 4.300 1.00 0.040 VOL (V) 0.140 VTRIP, decreasing VDD 0.75 +85°C Hyst (V) VTRIP (V) 0.160 0.150 -20 0.50 IOL (mA) 0.170 VHYS, Hysteresis -60 0.25 0.060 0.180 4.400 +25°C FIGURE 2-17: VOL vs. IOL (MCP131-315 @ VDD = 2.9V). 0.190 VTRIP, increasing VDD -40°C 0°C 0.092 140 4.550 4.450 +125°C 0.030 0.020 FIGURE 2-14: VTRIP vs. Temperature vs. Hysteresis (MCP131-315). 4.500 +85°C 0.040 0.094 3.080 -60 VOL (V) 0.102 3.140 3.100 0.050 Hyst (V) VTRIP (V) 3.160 1.00 -40°C 0.000 0.00 0.25 0.50 IOL (mA) 0.75 1.00 FIGURE 2-18: VOL vs. IOL (MCP121-450 @ VDD = 4.1V).  2004-2014 Microchip Technology Inc. MCP102/103/121/131 Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only; see Figure 4-1), TA = -40°C to +125°C. 0.140 2.110 MCP102-195 VDD = 1.7 V 0.120 IOL = 1.00 mA 2.070 IOL = 0.75 mA 0.080 VOH (V) VOL (V) 0.100 0.040 IOL = 0.25 mA 1.990 IOL = 0.00 mA 1.970 +125°C 2.010 -40 0 40 80 Temperature (°C) FIGURE 2-19: VOL vs. Temperature (MCP102-195 @ VDD = 1.7V). +85°C +70°C +25°C 1.950 0.00 120 -40°C 2.030 IOL = 0.50 mA 0.000 0.25 0.50 IOL (mA) 0.75 1.00 FIGURE 2-22: VOH vs. IOL (MCP102-195 @ VDD = 2.1V). 300 0.070 MCP131-315 VDD = 2.9V 0.060 VDD decreasing from: 5V – 1.7V IOL = 1.00 mA 250 IOL = 0.75 mA 0.040 IOL = 0.50 mA 150 0.030 100 IOL = 0.25 mA 0.020 50 0.010 VDD decreasing from: 5V – 0V IOL = 0.00 mA 0 0.000 -40 0 40 80 Temperature (°C) -40 120 FIGURE 2-20: VOL vs. Temperature (MCP131-315 @ VDD = 2.9V). 10 35 60 Temperature (°C) IOL = 1.00 mA 110 tRPD vs. Temperature VDD decreasing from: VTRIP(max) + 0.25V to VTRIP(min) – 0.25V 200 0.030 IOL = 0.50 mA MCP131-315 VDD decreasing from: 5V – 2.7V IOL = 0.75 mA 0.040 0.020 85 250 tRPD (µs) 0.050 -15 FIGURE 2-23: (MCP102-195). 0.060 MCP121-450 VDD = 4.1V MCP102-195 VDD decreasing from: VTRIP(max) + 0.25V to VTRIP(min) – 0.25V 200 tRPD (µs) 0.050 VOL (V) 0°C 2.050 0.060 0.020 VOL (V) MCP102-195 VDD = 2.1V 2.090 150 100 IOL = 0.25 mA 50 0.010 IOL = 0.00 mA 0.000 VDD decreasing from: 5V – 0V 0 -40 0 40 80 Temperature (°C) FIGURE 2-21: VOL vs. Temperature (MCP121-450 @ VDD = 4.1V).  2004-2014 Microchip Technology Inc. 120 -40 -15 FIGURE 2-24: (MCP131-315). 10 35 60 85 Temperature (°C) 110 tRPD vs. Temperature DS20001906D-page 9 MCP102/103/121/131 Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only; see Figure 4-1), TA = -40°C to +125°C. 250 VDD decreasing from: VTRIP(max) + 0.25V to VTRIP(min) – 0.25V 145 MCP121-450 MCP121-450 140 VDD increasing from: 0V – 4.8V 200 tRPU (µs) tRPD (µs) 135 VDD decreasing from: 5V – 0V 150 100 VDD increasing from: 0V – 5.5V 110 -40 -15 10 FIGURE 2-25: (MCP121-450). 35 60 Temperature (°C) 85 110 tRPD vs. Temperature -40 -15 FIGURE 2-28: (MCP121-450). 10 35 60 85 Temperature (°C) 110 tRPU vs. Temperature 0.45 160 MCP102-195 0.35 VDD increasing from: 0V – 2.1V 140 tRT (µs) 120 0.25 0.2 0.15 VDD increasing from: 0V – 4.0V 110 VDD increasing from: 0V – 4.0V VDD increasing from: VDD increasing from: 0V – 5.0V 0V – 5.5V 0.1 VDD increasing from: 0V – 5.5V 0.05 0 100 -40 -15 10 FIGURE 2-26: (MCP102-195). 35 60 Temperature (°C) 85 -40 110 tRPU vs. Temperature -15 FIGURE 2-29: (MCP102-195). 160 10 35 60 Temperature (°C) 150 MCP131-315 41 tRT (µs) VDD increasing from: 0V – 4.5V 110 VDD increasing from: 0V – 5.0V 39 130 120 110 VDD increasing from: 0V – 5.5V 43 VDD increasing from: 0V – 4.0V 140 85 tRT vs. Temperature 45 VDD increasing from: 0V – 3.3V MCP102-195 VDD increasing from: 0V – 2.8V 0.3 VDD increasing from: 0V – 2.8V 130 VDD increasing from: 0V – 2.1V 0.4 150 tRPU (µs) 125 115 0 tRPU (µs) VDD increasing from: 0V – 5.0V 120 VDD decreasing from: 5V – 3.0V 50 130 VDD increasing from: 0V – 5.5V 37 35 VDD increasing from: 0V – 4.5V 33 31 29 27 VDD increasing from: 0V – 3.3V VDD increasing from: 0V – 4.0V MCP131-315 25 100 -40 -15 10 35 60 Temperature (°C) FIGURE 2-27: (MCP131-315). DS20001906D-page 10 85 110 tRPU vs. Temperature -40 -15 FIGURE 2-30: (MCP131-315). 10 35 60 Temperature (°C) 85 110 tRT vs. Temperature  2004-2014 Microchip Technology Inc. MCP102/103/121/131 Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only; see Figure 4-1), TA = -40°C to +125°C. 38 MCP121-450 VDD increasing from: 0V – 4.6V tRT (µs) 37.5 VDD increasing from: 0V – 4.8V 37 36.5 36 35.5 VDD increasing from: 0V – 5.5V VDD increasing from: 0V – 5.0V 35 -40 -15 10 35 60 Temperature (°C) FIGURE 2-31: (MCP121-450). 85 110 tRT vs. Temperature Transient Duration (µS) 1400 1200 MCP121-450 1000 800 MCP102-195 600 400 MCP131-315 200 0 0.001 0.01 FIGURE 2-32: VTRIP(min) – VDD. 0.1 VTRIP(min) – VDD 1 10 Transient Duration vs. 10m 1m 1.00E-02 Open-Drain Leakage (A) 1.00E-03 100µ 10µ 1µ 100n 10n 1n 100p 10p 1p 100f 0 1.00E-04 1.00E-05 1.00E-06 +125°C 1.00E-07 1.00E-08 1.00E-09 1.00E-10 +25°C 1.00E-11 - 40°C 1.00E-12 1.00E-13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Pull-Up Voltage (V) FIGURE 2-33: Open-Drain Leakage Current vs. Voltage Applied to VOUT Pin (MCP121-195).  2004-2014 Microchip Technology Inc. DS20001906D-page 11 MCP102/103/121/131 3.0 PIN DESCRIPTION The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE Pin No. MCP102 MCP121 MCP131 MCP103 1 2 Symbol RST Function Output State VDD Falling: H = VDD > VTRIP L = VDD < VTRIP VDD Rising: H = VDD > VTRIP + VHYS L = VDD < VTRIP + VHYS 2 3 VDD Positive power supply 3 1 VSS Ground reference DS20001906D-page 12  2004-2014 Microchip Technology Inc. MCP102/103/121/131 4.0 APPLICATION INFORMATION 4.1 For many of today’s microcontroller applications, care must be taken to prevent low-power conditions that can cause many different system problems. The most common causes are brown-out conditions, where the system supply drops below the operating level momentarily. The second most common cause is when a slowly decaying power supply causes the microcontroller to begin executing instructions without sufficient voltage to sustain volatile memory (RAM), thus producing indeterminate results. Figure 4-1 shows a typical application circuit. MCP102/103/121/131 are voltage supervisor devices designed to keep a microcontroller in reset until the system voltage has reached and stabilized at the proper level for reliable system operation. These devices also operate as protection from brown-out conditions. VDD 0.1 µF VDD VDD RPU MCP1XX PIC® Microcontroller MCLR (Reset input) (Active-low) RST VSS VSS Note 1: Resistor RPU may be required with the MCP121 due to the open-drain output. Resistor RPU may not be required with the MCP131 due to the internal pull-up resistor. The MCP102 and MCP103 do not require the external pull-up resistor. FIGURE 4-1: Typical Application Circuit. RST Operation The RST output pin operation determines how the device can be used and indicates when the system should be forced into reset. To accomplish this, an internal voltage reference is used to set the voltage trip point (VTRIP). Additionally, there is a hysteresis on this trip point. When the falling edge of VDD crosses this voltage threshold, the reset power-down timer (tRPD) starts. When this delay timer times out, the RST pin is forced low. When the rising edge of VDD crosses this voltage threshold, the reset power-up timer (tRPU) starts. When this delay timer times out, the RST pin is forced high, tRPU is active and there is additional system current. The actual voltage trip point (VTRIPAC) will be between the minimum trip point (VTRIPMIN) and the maximum trip point (VTRIPMAX). The hysteresis on this trip point and the delay timer (tRPU) are to remove any “jitter” that would occur on the RST pin when the device VDD is at the trip point. Figure 4-2 shows the waveform of the RST pin as determined by the VDD voltage, while Table 4-1 shows the state of the RST pin. The VTRIP specification is for falling VDD voltages. When the VDD voltage is rising, the RST will not be driven high until VDD is at VTRIP + VHYS. Once VDD has crossed the voltage trip point, there is also a minimal delay time (tRPD) before the RST pin is driven low. TABLE 4-1: RST PIN STATES State of RST Pin when: Device VDD > VDD < VTRIP V TRIP + VHYS Output Driver MCP102 L H Push-pull MCP103 L H Push-pull MCP121 MCP131 L L H (1) Open-drain (1) H (2) Open-drain (2) Note 1: Requires external pull-up resistor 2: Has internal pull-up resistor VDD VTRIPAC + VHYSAC VTRIPMAX VTRIPAC VTRIPMIN VTRIPAC 1V RST tRPU tRPD FIGURE 4-2: < 1V is outside the device specifications tRPD tRPU RST Operation as Determined by the VTRIP and VHYS.  2004-2014 Microchip Technology Inc. DS20001906D-page 13 MCP102/103/121/131 Negative Going VDD Transients The minimum pulse width (time) required to cause a reset may be an important criterion in the implementation of a Power-on Reset (POR) circuit. This time is referred to as transient duration, defined as the amount of time needed for these supervisory devices to respond to a drop in VDD. The transient duration time is dependent on the magnitude of VTRIP – VDD. Generally speaking, the transient duration decreases with increases in VTRIP – VDD. Figure 4-3 shows a typical transient duration versus reset comparator overdrive, for which the MCP102/103/121/131 will not generate a reset pulse. It shows that the farther below the trip point of the transient pulse goes, the shorter the duration of the pulse required to cause a reset gets. Figure 2-32 shows the transient response characteristics for the MCP102/103/121/131. A 0.1 µF bypass capacitor, mounted as close as possible to the VDD pin, provides additional transient immunity (refer to Figure 4-1). Supply Voltage 5V 0V 4.3 Reset Power-up Timer (tRPU) Figure 4-4 illustrates the device’s current states. While the system is powering down, the device has a low current. This current is dependent on the device VDD and trip point. When the device VDD rises through the voltage trip point (VTRIP), an internal timer starts. This timer consumes additional current until the RST pin is driven (or released) high. This time is known as the Reset Power-up Time (tRPU). Figure 4-4 shows when tRPU is active (device consuming additional current). VDD VTRIP RST tRPU VTRIP(MAX) VTRIP(MIN) VTRIP(MIN) - VDD Reset Power-up Timer Inactive Reset Power-up Timer Active 4.2 Reset Power-up Timer Inactive tTRANS Time (µs) See Figures 2-1, 2-2 and 2-3 FIGURE 4-3: Example of Typical Transient Duration Waveform. See Figures 2-1, 2-2 and 2-3 See Figures 2-4, 2-5 and 2-6 FIGURE 4-4: Waveform. 4.3.1 Reset Power-up Timer EFFECT OF TEMPERATURE ON RESET POWER-UP TIMER (TRPU) The Reset Power-up timer time-out period (tRPU) determines how long the device remains in the reset condition. This is affected by both VDD and temperature. Typical responses for different VDD values and temperatures are shown in Figures 2-26, 2-27 and 2-28. DS20001906D-page 14  2004-2014 Microchip Technology Inc. MCP102/103/121/131 Usage in PIC® Microcontroller, ICSP™ Applications (MCP121 only) 4.4 Figure 4-5 shows the typical application circuit for using the MCP121 for voltage supervision function when the PIC microcontroller will be programmed via the ICSP feature. Additional information is available in TB087, “Using Voltage Supervisors with PIC® Microcontroller Systems which Implement In-Circuit Serial Programming™”, DS91087. Note: It is recommended that the current into the RST pin be current limited by a 1 k resistor. VDD/VPP 0.1 µF VDD RPU VDD PIC® MCU MCP121 RST VSS 1 k MCLR (Reset Input) (Active-low) VSS FIGURE 4-5: Typical Application Circuit for PIC® Microcontroller with the ICSP™ Feature.  2004-2014 Microchip Technology Inc. DS20001906D-page 15 MCP102/103/121/131 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 3-Lead TO-92 Example XXXXXX XXXXXX XXXXXX MCP102 195I e3 TO^^ 345256 YWWNNN Example MCP1xx = 3-Lead SOT-23 Part Number MCP102 MCP103 MCP121 MCP131 MCP1xxT-195I/TT JGNN TGNN LGNN KGNN MCP1xxT-240ETT JHNN THNN LHNN KHNN MCP1xxT-270E/TT JJNN TJNN LJNN KJNN MCP1xxT-300E/TT JKNN TKNN LKNN KKNN MCP1xxT-315E/TT JLNN TLNN LLNN KLNN MCP1xxT-450E/TT JMNN TMNN LMNN KMNN MCP1xxT-475E/TT JPNN TPNN LPNN KPNN 3-Lead SC70 Example MCP1xx = Part Number MCP102 MCP103 MCP121 MCP131 Legend: XX...X Y WW NNN e3 * Note: DS20001906D-page 16 MCP1xxT-195I/LB BGNN FGNN DGNN CGNN MCP1xxT-240E/LB BHNN FHNN DHNN CHNN MCP1xxT-270E/LB BJNN FJNN DJNN CJNN MCP1xxT-300E/LB BKNN FKNN DKNN CKNN MCP1xxT-315E/LB BLNN FLNN DLNN CLNN MCP1xxT-450E/LB BMNN FMNN DMNN CMNN MCP1xxT-475E/LB BPNN FPNN DPNN CPNN Customer-specific information Year code (last digit of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. 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