MCP14A0051T-E/MAY

MCP14A0051T-E/MAY

  • 厂商:

    ACTEL(微芯科技)

  • 封装:

    VDFN16

  • 描述:

  • 数据手册
  • 价格&库存
MCP14A0051T-E/MAY 数据手册
MCP14A0051/2 0.5A MOSFET Driver with Low Threshold Input and Enable Features General Description • High Peak Output Current: 0.5A (typical) • Wide Input Supply Voltage Operating Range: - 4.5V to 18V • Low Shoot-Through/Cross-Conduction Current in Output Stage • High Capacitive Load Drive Capability: - 1000 pF in 40 ns (typical) • Short Delay Times: 33 ns (tD1), 24 ns (tD2) (typical) • Low Supply Current: 375 µA (typical) • Low Voltage Threshold Input and Enable with Hysteresis • Latch-up Protected: Withstands 500 mA Reverse Current • Space-Saving Packages: - 6-Lead SOT-23 - 6-Lead 2x2 DFN The MCP14A0051/2 devices are high-speed MOSFET drivers that are capable of providing up to 0.5A of peak current while operating from a single 4.5V to 18V supply. The inverting (MCP14A0051) or noninverting (MCP14A0052) single-channel output is directly controlled from either TTL or CMOS (2V to 18V) logic. These devices also feature low shoot-through current, matched rise and fall times and short propagation delays, which make them ideal for high switching frequency applications. Applications • • • • • Switch Mode Power Supplies (SMPS) Pulse Transformer Drive Line Drivers Level Translator Motor and Solenoid Drive The MCP14A0051/2 family of devices offers enhanced control with enable functionality. The active-high Enable (EN) pin can be driven low to drive the output of the MCP14A0051/2 low, regardless of the status of the Input (IN) pin. An integrated pull-up resistor allows the user to leave the Enable pin floating for standard operation. Additionally, the MCP14A0051/2 devices feature separate ground pins (AGND and GND), allowing greater noise isolation between the level-sensitive Input/ Enable pins and the fast, high-current transitions of the push-pull output stage. These devices are highly latch-up resistant under any condition within their power and voltage ratings. They can accept up to 500 mA of reverse current being forced back into their outputs without damage or logic upset. All terminals are fully protected against Electrostatic Discharge (ESD) up to 1.75 kV (HBM) and 100V (MM). Package Types 6-Lead SOT-23 VDD 1 MCP14A0051 MCP14A0052 6 OUT AGND 2 5 GND IN 3 4 EN OUT MCP14A0051 MCP14A0052 OUT 2x2 DFN-6* OUT 1 GND 2 EN 3 EP 7 6 VDD 5 IN 4 AGND * Includes Exposed Thermal Pad (EP); see Table 3-1.  2014-2022 Microchip Technology Inc. and its subsidiaries DS20005369B-page 1 MCP14A0051/2 Functional Block Diagram VD D Internal Pull-up MCP14A0051 Inverting MCP14A0052 Noninverting Enable VR EF AGND Inverting Output VD D Input Noninverting VR EF AGND DS20005369B-page 2 GND  2014-2022 Microchip Technology Inc. and its subsidiaries MCP14A0051/2 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings† VDD, Supply Voltage..................................................................................................................................................+20V VIN, Input Voltage............................................................................................................... (VDD + 0.3V) to (GND – 0.3V) VEN, Enable Voltage .......................................................................................................... (VDD + 0.3V) to (GND – 0.3V) Package Power Dissipation (TA = +50°C) 6-Lead SOT-23 .................................................................................................................................................0.52 W 6-Lead 2x2 DFN................................................................................................................................................1.09 W ESD Protection on All Pins.........................................................................................................................1.75 kV (HBM) .............................................................................................................................. 100V (MM) † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. DC CHARACTERISTICS Electrical Specifications: Unless otherwise noted, TA = +25°C with 4.5V  VDD  18V. Parameters Sym. Min. Input GND – 0.3V Input Voltage Range VIN Logic ‘1’ High Input Voltage VIH 2.0 Logic ‘0’ Low Input Voltage VIL — Input Voltage Hysteresis VHYST(IN) — Input Current IIN -1 Enable Enable Voltage Range VEN GND – 0.3V Logic ‘1’ High Enable Voltage VEH 2.0 Logic ‘0’ Low Enable Voltage VEL — Enable Voltage Hysteresis VHYST(EN) — Enable Pin Pull-up Resistance RENBL — Enable Input Current IEN — Propagation Delay tD3 — Propagation Delay tD4 — Typ. Max. Units — 1.6 1.2 0.4 — VDD + 0.3 — 0.8 — +1 V V V V µA — 1.6 1.2 0.4 1.8 10 35 VDD + 0.3 — 0.8 — — — 43 V V V V MΩ µA ns 23 31 ns — 0.025 17 10 — — V V Ω Ω A A Output VDD – 0.025 — High Output Voltage VOH Low Output Voltage VOL — — Output Resistance, High ROH — 12.5 Output Resistance, Low ROL — 7.5 — 0.5 Peak Output Current IPK Latch-up Protection Withstand IREV 0.5 — Reverse Current Note 1: Tested during characterization, not production tested.  2014-2022 Microchip Technology Inc. and its subsidiaries Conditions 0V  VIN  VDD VDD = 18V, ENB = AGND VDD = 18V, ENB = AGND VDD = 18V, VEN = 5V, see Figure 4-3 (Note 1) VDD = 18V, VEN = 5V, see Figure 4-3 (Note 1) IOUT = 0A IOUT = 0A IOUT = 10 mA, VDD = 18V IOUT = 10 mA, VDD = 18V VDD = 18V (Note 1) Duty cycle  2%, t  300 µs (Note 1) DS20005369B-page 3 MCP14A0051/2 DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise noted, TA = +25°C with 4.5V  VDD  18V. Parameters Sym. Min. Typ. Max. Units Switching Time (Note 1) Rise Time tR — 40 51 ns Fall Time tF — 28 39 ns Delay Time tD1 — 33 41 ns Delay Time tD2 — 24 32 ns 18 560 580 580 600 V µA µA µA µA Power Supply Supply Voltage VDD 4.5 — IDD — 330 IDD — 360 Power Supply Current IDD — 360 IDD — 375 Note 1: Tested during characterization, not production tested. Conditions VDD = 18V, CL = 1000 pF, see Figure 4-1, Figure 4-2 (Note 1) VDD = 18V, CL = 1000 pF, see Figure 4-1, Figure 4-2 (Note 1) VDD = 18V, VIN = 5V, see Figure 4-1, Figure 4-2 (Note 1) VDD = 18V, VIN = 5V, see Figure 4-1, Figure 4-2 (Note 1) VIN = 3V, VEN = 3V VIN = 0V, VEN = 3V VIN = 3V, VEN = 0V VIN = 0V, VEN = 0V DC CHARACTERISTICS (OVER OPERATING TEMP. RANGE)(1) Electrical Specifications: Unless otherwise indicated, over the operating range with 4.5V  VDD  18V. Parameters Sym. Min. Input Input Voltage Range VIN GND – 0.3V Logic ‘1’ High Input Voltage VIH 2.0 Logic ‘0’ Low Input Voltage VIL — Input Voltage Hysteresis VHYST(IN) — Input Current IIN -10 Enable Enable Voltage Range VEN GND – 0.3V Logic ‘1’ High Enable Voltage VEH 2.0 Logic ‘0’ Low Enable Voltage VEL — Enable Voltage Hysteresis VHYST(EN) — Enable Input Current IEN — Propagation Delay tD3 — Propagation Delay tD4 — Typ. Max. Units — 1.6 1.2 0.4 — VDD + 0.3 — 0.8 — +10 V V V V µA — 1.6 1.2 0.4 12 33 VDD + 0.3 — 0.8 — — 41 V V V V µA ns 25 33 ns Output VDD – 0.025 — — High Output Voltage VOH Low Output Voltage VOL — — 0.025 Output Resistance, High ROH — — 24 Output Resistance, Low ROL — — 15 Note 1: Tested during characterization, not production tested. DS20005369B-page 4 V V   Conditions 0V  VIN  VDD VDD = 18V, ENB = AGND VDD = 18V, VEN = 5V, TA = +125°C, see Figure 4-3 VDD = 18V, VEN = 5V, TA = +125°C, see Figure 4-3 DC test DC test IOUT = 10 mA, VDD = 18V IOUT = 10 mA, VDD = 18V  2014-2022 Microchip Technology Inc. and its subsidiaries MCP14A0051/2 DC CHARACTERISTICS (OVER OPERATING TEMP. RANGE)(1) (CONTINUED) Electrical Specifications: Unless otherwise indicated, over the operating range with 4.5V  VDD  18V. Parameters Sym. Min. Typ. Max. Units Conditions Switching Time (Note 1) Rise Time tR — 45 56 ns Fall Time tF — 34 45 ns Delay Time tD1 — 32 40 ns Delay Time tD2 — 27 35 ns VDD = 18V, CL = 1000 pF, TA = +125°C, see Figure 4-1, Figure 4-2 VDD = 18V, CL = 1000 pF, TA = +125°C, see Figure 4-1, Figure 4-2 VDD = 18V, VIN = 5V, TA = +125°C, see Figure 4-1, Figure 4-2 VDD = 18V, VIN = 5V, TA = +125°C, see Figure 4-1, Figure 4-2 18 760 780 780 800 V uA uA uA uA Power Supply Supply Voltage VDD 4.5 — IDD — — IDD — — Power Supply Current IDD — — IDD — — Note 1: Tested during characterization, not production tested. VIN = 3V, VEN = 3V VIN = 0V, VEN = 3V VIN = 3V, VEN = 0V VIN = 0V, VEN = 0V TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V  VDD  18V Parameter Sym. Min. Typ. Max. Units Comments Temperature Ranges Specified Temperature Range TA -40 — +125 °C Maximum Junction Temperature TJ — — +150 °C Storage Temperature Range TA -65 — +150 °C Thermal Resistance, 6-Lead 2x2 DFN JA — 91 — °C/W Thermal Resistance, 6-Lead SOT-23 JA — 192 — °C/W Package Thermal Resistances  2014-2022 Microchip Technology Inc. and its subsidiaries DS20005369B-page 5 MCP14A0051/2 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25°C with 4.5V  VDD  18V. 300 160 5V 120 Fall Time (ns) Rise Time (ns) 140 6800 pF 250 200 3300 pF 150 100 470 pF 100 pF 12V 80 18V 60 40 1000 pF 50 100 20 0 0 4 6 8 10 12 14 16 18 100 1000 Supply Voltage (V) FIGURE 2-1: Voltage. FIGURE 2-4: Load. Rise Time vs. Supply 200 50 160 VDD = 18V tR, 1000 pF 45 140 40 12V Time (ns) Rise Time (ns) Fall Time vs. Capacitive 55 5V 180 120 100 80 18V tF, 1000 pF 35 30 25 60 20 40 15 20 10 0 tR, 470 pF tF, 470 pF 5 100 1000 10000 -40 -25 -10 Capacitive Load (pF) FIGURE 2-2: Load. 5 20 35 50 65 80 95 110 125 Temperature (°C) Rise Time vs. Capacitive FIGURE 2-5: Temperature. Rise and Fall Time vs. 10000 200 Crossover Current (µA) 250 Fall Time (ns) 10000 Capacitive Load (pF) 6800 pF 150 3300 pF 100 470 pF 100 pF 50 1000 pF 500 kHz 200 kHz 100 kHz 50 kHz 1000 100 10 1 0 4 6 8 10 12 14 16 18 4 6 FIGURE 2-3: Voltage. DS20005369B-page 6 Fall Time vs. Supply 8 10 12 14 16 18 Supply Voltage (V) Supply Voltage (V) FIGURE 2-6: Supply Voltage. Crossover Current vs.  2014-2022 Microchip Technology Inc. and its subsidiaries MCP14A0051/2 Note: Unless otherwise indicated, TA = +25°C with 4.5V  VDD  18V. Enable Propagation Delay (ns) Input Propagation Delay (ns) 50 VIN = 5V 45 40 35 tD1 30 tD2 25 20 50 VEN = 5V 45 tD3 40 35 tD4 30 25 20 4 6 8 10 12 14 16 18 4 6 8 Supply Voltage (V) FIGURE 2-7: Supply Voltage. Input Propagation Delay vs. 14 16 18 FIGURE 2-10: Enable Propagation Delay vs. Supply Voltage. VDD = 18V 35 tD1 30 tD2 25 Enable Propagation Delay (ns) Input Propogation Delay (ns) 12 40 40 20 VDD = 18V tD3 35 30 25 tD4 20 4 6 8 10 12 14 16 18 4 6 8 10 12 FIGURE 2-8: Input Propagation Delay Time vs. Input Amplitude. 16 18 FIGURE 2-11: Enable Propagation Delay Time vs. Enable Voltage Amplitude. 40 VDD = 18V VIN = 5V 35 30 tD2 25 20 Enable Propagation Delay (ns) 40 tD1 14 Enable Voltage Amplitude (V) Input Voltage Amplitude (V) Input Propagation Delay (ns) 10 Supply Voltage (V) VDD = 18V VEN = 5V tD3 35 30 25 tD4 20 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 Temperature (°C) FIGURE 2-9: Temperature. Input Propagation Delay vs.  2014-2022 Microchip Technology Inc. and its subsidiaries 5 20 35 50 65 80 95 110 125 Temperature (°C) FIGURE 2-12: vs. Temperature. Enable Propagation Delay DS20005369B-page 7 MCP14A0051/2 Note: Unless otherwise indicated, TA = +25°C with 4.5V  VDD  18V. 1.8 1.7 VIN = 0V,VEN = 0V Input Threshold (V) Quiescent Current (µA) 400 350 VIN = 3V,VEN = 3V 300 VIN = 3V,VEN = 0V or VIN = 0V,VEN = 3V VIH 1.6 1.5 1.4 1.3 VIL 1.2 1.1 250 1 4 6 8 10 12 14 16 18 4 6 8 Supply Voltage (V) FIGURE 2-13: Quiescent Supply Current vs. Supply Voltage. 450 VIN = 0V,VEN = 0V VIN = 5V,VEN = 5V 350 300 250 VIN = 5V,VEN = 0V or VIN = 0V,VEN = 5V 5 FIGURE 2-14: vs. Temperature. VDD = 18V VEH 1.6 1.5 1.4 1.3 VEL 1.2 1.1 1 0.9 -40 -25 -10 20 35 50 65 80 95 110 125 5 FIGURE 2-17: Temperature. 1.7 Enable Threshold (V) VIH 1.5 1.4 VIL 1.1 1 Enable Threshold vs. 1.8 VDD = 18V 1.7 20 35 50 65 80 95 110 125 Temperature (°C) Quiescent Supply Current 1.8 Input Threshold (V) 18 Input Threshold vs Supply Temperature (°C) 1.2 16 0.8 -40 -25 -10 1.3 14 1.7 200 1.6 12 1.8 VDD = 18V 500 400 FIGURE 2-16: Voltage. Enable Threshold (V) Quiescent Current (µA) 550 10 Supply Voltage (V) VEH 1.6 1.5 1.4 1.3 VEL 1.2 1.1 0.9 0.8 1 -40 -25 -10 5 20 35 50 65 80 95 110 125 4 6 Temperature (°C) FIGURE 2-15: Temperature. DS20005369B-page 8 Input Threshold vs. 8 10 12 14 16 18 Supply Voltage (V) FIGURE 2-18: Supply Voltage. Enable Threshold vs.  2014-2022 Microchip Technology Inc. and its subsidiaries MCP14A0051/2 Note: Unless otherwise indicated, TA = +25°C with 4.5V  VDD  18V. 45 50 ROH - Output Resistance (Ω) VIN = 0V (MCP14A0051) VIN = 5V (MCP14A0052) 35 TA = +125°C 30 25 20 TA = +25°C 15 40 1 MHz 500 kHz 200 kHz 100 kHz 50 kHz 10 kHz 35 30 25 20 15 10 5 0 10 4 6 8 10 12 14 Supply Voltage (V) 16 100 18 30 VIN = 5V (MCP14A0051) VIN = 0V (MCP14A0052) VDD = 6V Supply Current (mA) ROL - Output Resistance (Ω) 10000 FIGURE 2-22: Supply Current vs. Capacitive Load (VDD = 12V). 25 20 TA = +125°C 15 10 1000 Capacitive Load (pF) FIGURE 2-19: Output Resistance (Output High) vs. Supply Voltage. TA = +25°C 25 1 MHz 500 kHz 200 kHz 100 kHz 50 kHz 10 kHz 20 15 10 5 0 5 4 6 8 10 12 14 Supply Voltage (V) 16 100 18 10000 FIGURE 2-23: Supply Current vs. Capacitive Load (VDD = 6V). 100 100 90 1000 Capacitive Load (pF) FIGURE 2-20: Output Resistance (Output Low) vs. Supply Voltage. VDD = 18V 90 80 Supply Current (mA) Supply Current (mA) VDD = 12V 45 Supply Current (mA) 40 1 MHz 500 kHz 200 kHz 100 kHz 50 kHz 10 kHz 70 60 50 40 30 20 VDD = 18V 80 10000 pF 6800 pF 3300 pF 1000 pF 470 pF 100 pF 70 60 50 40 30 20 10 10 0 0 100 1000 Capacitive Load (pF) FIGURE 2-21: Supply Current vs. Capacitive Load (VDD = 18V).  2014-2022 Microchip Technology Inc. and its subsidiaries 10000 10 100 1000 Switching Frequency (kHz) FIGURE 2-24: Supply Current vs. Frequency (VDD = 18V). DS20005369B-page 9 MCP14A0051/2 Note: Unless otherwise indicated, TA = +25°C with 4.5V  VDD  18V. 14 50 VDD = 12V 13 40 Enable Current (uA) Supply Current (mA) 45 10000 pF 6800 pF 3300 pF 1000 pF 470 pF 100 pF 35 30 25 20 15 10 TA = +125°C 12 11 TA = +25°C 10 9 5 0 10 100 1000 8 4 6 Switching Frequency (kHz) FIGURE 2-25: Supply Current vs. Frequency (VDD = 12V). FIGURE 2-27: Voltage. 8 10 12 14 Supply Voltage (V) 16 18 Enable Current vs. Supply 30 Supply Current (mA) VDD = 6V 25 10000 pF 6800 pF 3300 pF 1000 pF 470 pF 100 pF 20 15 10 5 0 10 100 1000 Switching Frequency (kHz) FIGURE 2-26: Supply Current vs. Frequency (VDD = 6V). DS20005369B-page 10  2014-2022 Microchip Technology Inc. and its subsidiaries MCP14A0051/2 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE Pin No. Symbol Description 6-Lead 2x2 DFN 6-Lead SOT-23 1 6 OUT/OUT 2 5 GND 3 4 EN Device Enable 4 2 AGND Analog Ground 5 3 IN Control Input 6 1 VDD Supply Input EP — EP Exposed Thermal Pad (GND) 3.1 Output Pin (OUT, OUT) The Output is a CMOS push-pull output that is capable of sourcing and sinking 0.5A of peak current (VDD = 18V). The low output impedance ensures the gate of the external MOSFET stays in the intended state, even during large transients. This output also has a reverse current latch-up rating of 500 mA. 3.2 Power Ground Pin (GND) GND is the device return pin for the output stage. The GND pin should have a low-impedance connection to the bias supply source return. When the capacitive load is being discharged, high peak currents will flow out of the ground pin. 3.3 Device Enable Pin (EN) The MOSFET driver Device Enable is a highimpedance, TTL/CMOS compatible input. The Enable input also has hysteresis between the high and low input levels, allowing them to be driven from slow rising and falling signals and to provide noise immunity. Driving the Enable pin below the threshold will disable the output of the device, pulling OUT/OUT low, regardless of the status of the Input pin. Driving the Enable pin above the threshold allows normal operation of the OUT/OUT pin based on the status of the Input pin. The Enable pin utilizes an internal pull-up resistor, allowing the pin to be left floating for standard driver operation.  2014-2022 Microchip Technology Inc. and its subsidiaries Push-Pull Output Power Ground 3.4 Analog Ground Pin (AGND) AGND is the device return pin for the input and enable stages of the MOSFET driver. The AGND pin should be connected to an electrically “quiet” ground node to provide a low noise reference for the Input and Enable pins. 3.5 Control Input Pin (IN) The MOSFET driver Control Input is a high-impedance, TTL/CMOS compatible input. The Input also has hysteresis between the high and low input levels, allowing them to be driven from slow rising and falling signals and to provide noise immunity. 3.6 Supply Input Pin (VDD) VDD is the bias supply input for the MOSFET driver and has a voltage range of 4.5V to 18V. This input must be decoupled to ground with a local capacitor. This bypass capacitor provides a localized low-impedance path for the peak currents that are provided to the load. 3.7 Exposed Metal Pad Pin (EP) The exposed metal pad of the DFN package is not internally connected to any potential. Therefore, this pad can be connected to a ground plane, or other copper plane on a Printed Circuit Board, to aid in heat removal from the package. DS20005369B-page 11 MCP14A0051/2 4.0 APPLICATION INFORMATION VDD = 18V 4.1 General Information 1 µF MOSFET drivers are high-speed, high-current devices, which are intended to source/sink high peak currents to charge/discharge the gate capacitance of external MOSFETs or Insulated-Gate Bipolar Transistors (IGBTs). In high-frequency switching power supplies, the Pulse-Width Modulation (PWM) controller may not have the drive capability to directly drive the power MOSFET. A MOSFET driver, such as the MCP14A0051/2 family, can be used to provide additional source/sink current capability. 4.2 Input 0.1 µF Output CL = 1000 pF MCP14A0052 5V MOSFET Driver Timing The ability of a MOSFET driver to transition from a fully OFF state to a fully ON state is characterized by the driver’s Rise Time (tR), Fall Time (tF) and Propagation Delays (tD1 and tD2). Figure 4-1 and Figure 4-2 show the test circuit and timing waveform used to verify the MCP14A0051/2 timing. Input VIH (Typ.) 0V VIL (Typ.) tD1 tR tD2 18V tF 90% Output 10% 0V VDD = 18V 1 µF FIGURE 4-2: Waveform. 0.1 µF 4.3 Input Output CL = 1000 pF MCP14A0051 5V Input VIH (Typ.) 0V VIL (Typ.) tD1 18V tF tD2 tR 90% Output 0V FIGURE 4-1: Waveform. DS20005369B-page 12 10% Inverting Driver Timing Noninverting Driver Timing Enable Function The Enable pin (EN) provides additional control of the Output pin (OUT). This pin is active-high and is internally pulled up to VDD so that the pin can be left floating to provide standard MOSFET driver operation. When the Enable pin’s voltage is above the Enable pin High-Voltage Threshold, (VEN_H), the output is enabled and allowed to react to the status of the Input pin. However, when the voltage applied to the Enable pin falls below the Low Threshold Voltage (VEN_L), the driver output is disabled and doesn't respond to changes in the status of the Input pin. When the driver is disabled, the output is pulled down to a Low state. Refer to Table 4-1 for Enable pin logic. The threshold voltage levels for the Enable pin are similar to the threshold voltage levels of the Input pin, and are TTL and CMOS compatible. Hysteresis is provided to help increase the noise immunity of the enable function, avoiding false triggers of the enable signal during driver switching. There are propagation delays associated with the driver receiving an enable signal and the output reacting. These Propagation Delays, tD3 and tD4, are graphically represented in Figure 4-3.  2014-2022 Microchip Technology Inc. and its subsidiaries MCP14A0051/2 TABLE 4-1: 4.6 ENABLE PIN LOGIC Power Dissipation ENB IN MCP14A0051 OUT MCP14A0052 OUT H H L H The total internal power dissipation in a MOSFET driver is the summation of three separate power dissipation elements, as shown in Equation 4-1. H L H L EQUATION 4-1: L X L L P T = P +P +P L Q CC Where: 5V PT = Total power dissipation Enable PL = Load power dissipation VEH (Typ.) PQ = Quiescent power dissipation 0V VEL (Typ.) tD3 PCC = Operating power dissipation tD4 18V 90% Output 10% 0V FIGURE 4-3: 4.4 Enable Timing Waveform. Decoupling Capacitors Careful PCB layout and decoupling capacitors are required when using power MOSFET drivers. Large current is required to charge and discharge capacitive loads quickly. For example, approximately 720 mA are needed to charge a 1000 pF load with 18V in 25 ns. To operate the MOSFET driver over a wide frequency range with low supply impedance, it is recommended to place 1.0 µF and 0.1 µF low-ESR ceramic capacitors in parallel between the driver VDD and GND. These capacitors should be placed close to the driver to minimize circuit board parasitics and provide a local source for the required current. 4.5 PCB Layout Considerations Proper Printed Circuit Board (PCB) layout is important in high-current, fast switching circuits to provide proper device operation and robustness of design. Improper component placement may cause errant switching, excessive voltage ringing or circuit latch-up. The PCB trace loop length and inductance should be minimized by the use of ground planes or traces under the MOSFET gate drive signal, separate analog and power grounds and local driver decoupling. Placing a ground plane beneath the MCP14A0051/2 devices will help as a radiated noise shield, as well as providing some heat sinking for power dissipated within the device.  2014-2022 Microchip Technology Inc. and its subsidiaries 4.6.1 CAPACITIVE LOAD DISSIPATION The power dissipation caused by a capacitive load is a direct function of the frequency, total capacitive load and supply voltage. The power lost in the MOSFET driver for a complete charging and discharging cycle of a MOSFET is shown in Equation 4-2. EQUATION 4-2: P Where: L = fC V T DD 2 f = Switching frequency CT = Total load capacitance VDD = MOSFET driver supply voltage 4.6.2 QUIESCENT POWER DISSIPATION The power dissipation associated with the quiescent current draw depends on the state of the Input and Enable pins. Refer to Section 1.0 “Electrical Characteristics” for typical quiescent current draw values in different operating states. The quiescent power dissipation is shown in Equation 4-3. EQUATION 4-3: P Q = I QH D+I QL  1 – D  V DD Where: IQH = Quiescent current in the High state D = Duty cycle IQL = Quiescent current in the Low state VDD = MOSFET driver supply voltage DS20005369B-page 13 MCP14A0051/2 4.6.3 OPERATING POWER DISSIPATION The operating power dissipation occurs each time the MOSFET driver output transitions, because for a very short period of time, both MOSFETs in the output stage are on simultaneously. This cross-conduction current leads to a power dissipation as described in Equation 4-4. EQUATION 4-4: P CC = CC  f  V DD Where: CC = Cross-conduction constant (ampere x second) f = Switching frequency VDD = MOSFET driver supply voltage DS20005369B-page 14  2014-2022 Microchip Technology Inc. and its subsidiaries MCP14A0051/2 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 6-Lead DFN (2x2x0.9 mm) Example Part Number Code MCP14A0051T-E/MAY ABG MCP14A0052T-E/MAY ABH Note: The content of this table applies to 6-Lead DFN. 6-Lead SOT-23 Example Part Number Code MCP14A0051T-E/CH AAAQ MCP14A0052T-E/CH AAAR Note: Legend: XX...X Y YY WW NNN e3 * ABG 256 AAAQ2 08256 The content of this table applies to 6-Lead SOT-23. Product code or customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC® designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. ●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle mark). Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo. Underbar (_) and/or Overbar (‾) symbol may not be to scale.  2014-2022 Microchip Technology Inc. and its subsidiaries DS20005369B-page 15 MCP14A0051/2 DS20005369B-page 16  2014-2022 Microchip Technology Inc. and its subsidiaries MCP14A0051/2  2014-2022 Microchip Technology Inc. and its subsidiaries DS20005369B-page 17 MCP14A0051/2 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20005369B-page 18  2014-2022 Microchip Technology Inc. and its subsidiaries MCP14A0051/2             ! 8% !"%& % ; # 7 "
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MCP14A0051T-E/MAY
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