MCP14A0601/2
6.0A MOSFET Driver with Low Threshold Input and Enable
Features
General Description
• High Peak Output Current: 6.0A (typical)
• Wide Input Supply Voltage Operating Range:
- 4.5V to 18V
• Low Shoot-Through/Cross-Conduction Current in
Output Stage
• High Capacitive Load Drive Capability:
- 2500 pF in 10 ns (typical)
• Short Delay Times: 22 ns (tD1), 22 ns (tD2) (typical)
• Low Supply Current: 375 µA (typical)
• Low-Voltage Threshold Input and Enable with
Hysteresis
• Latch-Up Protected: Withstands 500 mA Reverse
Current
• Space-Saving Packages:
- 8-Lead MSOP
- 8-Lead SOIC
- 8-Lead 2 x 3 TDFN
The MCP14A0601/2 devices are high-speed MOSFET
drivers that are capable of providing up to 6.0A of peak
current while operating from a single 4.5V to 18V
supply. There are two output configurations available;
inverting
(MCP14A0601)
and
noninverting
(MCP14A0602). These devices feature low shootthrough current, fast rise and fall times, and matched
propagation delays which make them ideal for high
switching frequency applications.
Applications
•
•
•
•
•
Switch Mode Power Supplies
Pulse Transformer Drive
Line Drivers
Level Translator
Motor and Solenoid Drive
The MCP14A0601/2 family of devices offers enhanced
control with Enable functionality. The active-high
Enable pin can be driven low to drive the output of the
MCP14A0601/2 low, regardless of the status of the
Input pin. An integrated pull-up resistor allows the user
to leave the Enable pin floating for standard operation.
These devices are highly latch-up resistant under any
condition within their power and voltage ratings. They
can accept up to 500 mA of reverse current being
forced back into their outputs without damage or logic
upset. All terminals are fully protected against
electrostatic discharge (ESD) up to 2 kV (HBM) and
200V (MM).
Package Types
MCP14A0601/MCP14A0602
MSOP/SOIC
VDD 1
8 VDD
IN 2
7 OUT/OUT
EN 3
GND 4
6 OUT/OUT
5 GND
MCP14A0601/MCP14A0602
2 x 3 TDFN*
8 VDD
VDD 1
IN 2
EN 3
GND 4
EP
9
7 OUT/OUT
6 OUT/OUT
5 GND
* Includes Exposed Thermal Pad (EP); see Table 3-1.
2016 Microchip Technology Inc.
DS20005593A-page 1
MCP14A0601/2
Functional Block Diagram
VDD
Internal
Pull-Up
Enable
VREF
GND
Inverting
Output
VDD
Input
VREF
Non-Inverting
Noninverting
GND
MCP14A0601: Inverting
MCP14A0602: Noninverting
DS20005593A-page 2
2016 Microchip Technology Inc.
MCP14A0601/2
1.0
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational sections of this
specification is not intended. Exposure to maximum
rating conditions for extended periods may affect
device reliability.
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
VDD, Supply Voltage............................................. +20V
VIN, Input Voltage........... (VDD + 0.3V) to (GND - 0.3V)
VEN, Enable Voltage....... (VDD + 0.3V) to (GND - 0.3V)
Package Power Dissipation (TA = +50°C)
8L MSOP ..................................................... 0.63 W
8L SOIC ....................................................... 1.00 W
8L 2 x 3 TDFN.............................................. 1.86 W
ESD Protection on all pins .........................2 kV (HBM)
....................................................................200V (MM)
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, TA = +25°C, with 4.5V VDD 18V.
Parameters
Sym.
Min.
Typ.
Max.
Units
Input Voltage Range
VIN
Logic ‘1’ High Input Voltage
VIH
GND - 0.3V
—
VDD + 0.3
V
2.0
1.6
—
V
0.8
V
Conditions
Input
Logic ‘0’ Low Input Voltage
VIL
—
1.2
VHYST(IN)
—
0.4
—
V
IIN
-1
—
+1
µA
Enable Voltage Range
VEN
GND - 0.3V
—
VDD + 0.3
V
Logic ‘1’ High Enable Voltage
VEH
2.0
1.6
—
V
V
Input Voltage Hysteresis
Input Current
0V VIN VDD
Enable
Logic ‘0’ Low Enable Voltage
VEL
—
1.2
0.8
VHYST(EN)
—
0.4
—
V
RENBL
—
1.8
—
MΩ
Enable Input Current
IEN
—
10
—
µA
VDD = 18V, ENB = GND
Propagation Delay
tD3
—
22
29
ns
VDD = 18V, VEN = 5V, see
Figure 4-3, (Note 1)
Propagation Delay
tD4
—
22
29
ns
VDD = 18V, VEN = 5V, see
Figure 4-3, (Note 1)
—
—
V
IOUT = 0A
Enable Voltage Hysteresis
Enable Pin Pull-Up Resistance
VDD = 18V, ENB = GND
Output
High Output Voltage
VOH
VDD - 0.025
Low Output Voltage
VOL
—
—
0.025
V
IOUT = 0A
Output Resistance, High
ROH
—
1.2
2.3
Ω
IOUT = 10 mA, VDD = 18V
Output Resistance, Low
ROL
—
0.9
2
Ω
IOUT = 10 mA, VDD = 18V
Peak Output Current
IPK
—
6.0
—
A
VDD = 18V (Note 1)
Latch-Up Protection Withstand
Reverse Current
IREV
0.5
—
—
A
Duty cycle 2%, t 300 µs
(Note 1)
Rise Time
tR
—
10
15
ns
VDD = 18V, CL = 2500 pF, see
Figure 4-1, Figure 4-2
Fall Time
tF
—
10
15
ns
VDD = 18V, CL = 2500 pF, see
Figure 4-1, Figure 4-2
Note 1:
Tested during characterization, not production tested.
Switching Time (Note 1)
2016 Microchip Technology Inc.
DS20005593A-page 3
MCP14A0601/2
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, TA = +25°C, with 4.5V VDD 18V.
Parameters
Delay Time
Sym.
Min.
Typ.
Max.
Units
Conditions
tD1
—
22
29
ns
VDD = 18V, VIN = 5V, see
Figure 4-1 and Figure 4-2
tD2
—
22
29
ns
VDD = 18V, VIN = 5V, see
Figure 4-1 and Figure 4-2
VDD
4.5
—
18
V
Power Supply
Supply Voltage
Power Supply Current
Note 1:
IDD
—
330
560
µA
VIN = 3V, VEN = 3V
IDD
—
360
580
µA
VIN = 0V, VEN = 3V
IDD
—
360
580
µA
VIN = 3V, VEN = 0V
IDD
—
375
600
µA
VIN = 0V, VEN = 0V
Tested during characterization, not production tested.
DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE)
Electrical Specifications: Unless otherwise indicated, over the operating range with 4.5V VDD 18V.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Input Voltage Range
VIN
GND - 0.3V
—
VDD + 0.3
V
Logic ‘1’ High Input Voltage
VIH
2.0
1.6
—
V
Logic ‘0’ Low Input Voltage
VIL
—
1.2
0.8
V
VHYST(IN)
—
0.4
—
V
IIN
-10
—
+10
µA
Enable Voltage Range
VEN
GND - 0.3V
—
VDD + 0.3
V
Logic ‘1’ High Enable Voltage
VEH
2.0
1.6
—
V
Logic ‘0’ Low Enable Voltage
VEL
—
1.2
0.8
V
VHYST(EN)
—
0.4
—
V
Enable Input Current
IEN
—
12
—
µA
VDD = 18V, ENB = GND
Propagation Delay
tD3
—
26
33
ns
VDD = 18V, VEN = 5V, TA = +125°C,
see Figure 4-3
Propagation Delay
tD4
—
26
33
ns
VDD = 18V, VEN = 5V, TA = +125°C,
see Figure 4-3
High Output Voltage
VOH
VDD - 0.025
—
—
V
DC Test
Low Output Voltage
VOL
—
—
0.025
V
DC Test
Output Resistance, High
ROH
—
—
2.9
Ω
IOUT = 10 mA, VDD = 18V
Output Resistance, Low
ROL
—
—
2.6
Ω
IOUT = 10 mA, VDD = 18V
Input
Input Voltage Hysteresis
Input Current
0V VIN VDD
Enable
Enable Voltage Hysteresis
Output
Note 1:
Tested during characterization, not production tested.
DS20005593A-page 4
2016 Microchip Technology Inc.
MCP14A0601/2
DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE) (CONTINUED)
Electrical Specifications: Unless otherwise indicated, over the operating range with 4.5V VDD 18V.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Rise Time
tR
—
12
17
ns
VDD = 18V, CL = 2500 pF,
TA = +125°C, see Figure 4-1,
Figure 4-2
Fall Time
tF
—
12
17
ns
VDD = 18V, CL = 2500 pF,
TA = +125°C, see Figure 4-1,
Figure 4-2
Delay Time
tD1
—
26
33
ns
VDD = 18V, VIN = 5V, TA = +125°C,
see Figure 4-1, Figure 4-2
tD2
—
26
33
VDD
4.5
—
18
V
Switching Time (Note 1)
VDD = 18V, VIN = 5V, TA = +125°C,
see Figure 4-1, Figure 4-2
Power Supply
Supply Voltage
Power Supply Current
Note 1:
IDD
—
—
760
uA
VIN = 3V, VEN = 3V
IDD
—
—
780
uA
VIN = 0V, VEN = 3V
IDD
—
—
780
uA
VIN = 3V, VEN = 0V
IDD
—
—
800
uA
VIN = 0V, VEN = 0V
Tested during characterization, not production tested.
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V VDD 18V
Parameter
Sym.
Min.
Typ.
Max.
Units
Comments
Temperature Ranges
Specified Temperature Range
TA
-40
—
+125
°C
Maximum Junction Temperature
TJ
—
—
+150
°C
Storage Temperature Range
TA
-65
—
+150
°C
Junction-to-Ambient Thermal Resistance, 8LD MSOP
JA
—
158
—
°C/W
Note 1
Junction-to-Ambient Thermal Resistance, 8LD SOIC
JA
—
99.8
—
°C/W
Note 1
Junction-to-Ambient Thermal Resistance, 8LD TDFN
JA
—
53.7
—
°C/W
Note 1
Junction-to-Top Characterization Parameter, 8LD MSOP
JT
—
2.4
—
°C/W
Note 1
Junction-to-Top Characterization Parameter, 8LD SOIC
JT
—
5.9
—
°C/W
Note 1
Junction-to-Top Characterization Parameter, 8LD TDFN
JT
—
0.5
—
°C/W
Note 1
Junction-to-Board Characterization Parameter, 8LD MSOP
JB
—
115.2
—
°C/W
Note 1
Junction-to-Board Characterization Parameter, 8LD SOIC
JB
—
64.8
—
°C/W
Note 1
Junction-to-Board Characterization Parameter, 8LD TDFN
JB
—
24.4
—
°C/W
Note 1
Package Thermal Resistances
Note 1:
Parameter is determined using High K 2S2P 4-Layer board as described in JESD 51-7, as well as JESD
51-5 for packages with exposed pads.
2016 Microchip Technology Inc.
DS20005593A-page 5
MCP14A0601/2
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C with 4.5V VDD 18V.
60
80
50
10000pF
6800pF
4700pF
2500pF
1000pF
60
50
40
5V
Fall Time (ns)
Rise Time (ns)
70
30
40
30
12V
20
20
10
10
18V
0
4
6
8
FIGURE 2-1:
Voltage.
10
12
14
Supply Voltage (V)
16
0
1000
18
10000
Capacitive Load (pF)
Rise Time vs. Supply
FIGURE 2-4:
Load.
18
80
Fall Time vs. Capacitive
tR, 4700pF
VDD = 18V
60
16
5V
Time (ns)
Rise Time (ns)
70
50
40
12V
30
20
12
tR, 2500pF
10
18V
10
tF, 4700pF
14
tF, 2500pF
8
0
1000
-40 -25 -10
10000
Capacitive Load (pF)
FIGURE 2-2:
Load.
Rise Time vs. Capacitive
FIGURE 2-5:
Temperature.
10000
Crossover Current (uA)
60
Fall Time (ns)
50
10000pF
6800pF
4700pF
2500pF
1000pF
40
30
20
10
0
5
20 35 50 65 80 95 110 125
Temperature (°C)
Rise and Fall Time vs.
1MHz
500kHz
200kHz
100kHz
50kHz
1000
100
10
4
6
8
FIGURE 2-3:
Voltage.
DS20005593A-page 6
10
12
14
Supply Voltage (V)
16
Fall Time vs. Supply
18
4
6
FIGURE 2-6:
Supply Voltage.
8
10
12
14
Supply Voltage (V)
16
18
Crossover Current vs.
2016 Microchip Technology Inc.
MCP14A0601/2
VIN = 5V
45
40
35
30
tD2
25
20
tD1
15
4
6
8
FIGURE 2-7:
Supply Voltage.
10
12
14
Supply Voltage (V)
16
Input Propagation Delay vs.
VDD = 18V
35
30
25
tD2
20
tD1
15
4
6
8
10
12
14
Input Voltage Amplitude (V)
16
Input Propagation Delay (ns)
26
VDD = 18V
VIN = 5V
24
tD2
22
tD1
20
18
-40 -25 -10
FIGURE 2-9:
Temperature.
5
20 35 50 65 80 95 110 125
Temperature (°C)
Input Propagation Delay vs.
2016 Microchip Technology Inc.
40
35
30
tD4
25
20
tD3
15
6
8
10
12
14
Supply Voltage (V)
16
18
FIGURE 2-10:
Enable Propagation Delay
vs. Supply Voltage.
40
VDD = 18V
35
30
25
tD4
20
tD3
15
2
18
FIGURE 2-8:
Input Propagation Delay
Time vs. Input Amplitude.
VEN = 5V
45
4
Enable Propagation Delay (ns)
Input Propogation Delay (ns)
40
2
50
18
4
6
8
10
12
14
Enable Voltage Amplitude (V)
16
18
FIGURE 2-11:
Enable Propagation Delay
Time vs. Enable Voltage Amplitude.
Enable Propagation Delay (ns)
Input Propagation Delay (ns)
50
Enable Propagation Delay (ns)
Note: Unless otherwise indicated, TA = +25°C with 4.5V VDD 18V.
26
VDD = 18V
VEN = 5V
24
tD4
22
20
tD3
18
-40 -25 -10
FIGURE 2-12:
vs. Temperature.
5
20 35 50 65 80 95 110 125
Temperature (°C)
Enable Propagation Delay
DS20005593A-page 7
MCP14A0601/2
Note: Unless otherwise indicated, TA = +25°C with 4.5V VDD 18V.
1.8
1.7
VIN = 0V,VEN = 0V
Input Threshold (V)
Quiescent Current (uA)
400
350
VIN = 3V,VEN = 3V
300
VIN = 3V,VEN = 0V or VIN = 0V,VEN = 3V
1.5
1.4
1.3
1.1
1
4
6
8
10
12
14
Supply Voltage (V)
16
18
FIGURE 2-13:
Quiescent Supply Current
vs. Supply Voltage.
4
10
12
14
Supply Voltage (V)
VIN = 0V,VEN = 0V
350
VIN = 3V,VEN = 3V
300
VIN = 3V,VEN = 0V or VIN = 0V,VEN = 3V
250
Enable Threshold (V)
400
16
18
Input Threshold vs. Supply
VDD = 18V
1.7
450
VEH
1.6
1.5
1.4
1.3
VEL
1.2
1.1
1
200
-40 -25 -10
5
FIGURE 2-14:
vs. Temperature.
-40 -25 -10
20 35 50 65 80 95 110 125
Temperature (°C)
Quiescent Supply Current
1.8
Enable Threshold (V)
1.5
1.4
1.3
VIL
20 35 50 65 80 95 110 125
Temperature (°C)
Enable Threshold vs.
1.8
1.7
VIH
5
FIGURE 2-17:
Temperature.
VDD = 18V
1.6
1.2
8
1.8
VDD = 18V
1.7
6
FIGURE 2-16:
Voltage.
500
Quiescent Current (uA)
VIL
1.2
250
Input Threshold (V)
VIH
1.6
VEH
1.6
1.5
1.4
1.3
VEL
1.2
1.1
1.1
1
1
-40 -25 -10
5
FIGURE 2-15:
Temperature.
DS20005593A-page 8
20 35 50 65 80 95 110 125
Temperature (°C)
Input Threshold vs.
4
6
FIGURE 2-18:
Supply Voltage.
8
10
12
14
Supply Voltage (V)
16
18
Enable Threshold vs.
2016 Microchip Technology Inc.
MCP14A0601/2
Note: Unless otherwise indicated, TA = +25°C with 4.5V VDD 18V.
50
45
40
35
30
25
20
15
10
5
0
VIN = 0V (MCP14A0601)
VIN = 5V (MCP14A0602)
2.5
Supply Current (mA)
ROH - Output Resistance ()
3
TA = +125°C
2
1.5
TA = +25°C
1
4
6
8
10
12
14
Supply Voltage (V)
16
18
FIGURE 2-19:
Output Resistance (Output
High) vs. Supply Voltage.
VDD = 6V
Supply Current (mA)
ROL - Output Resistance ()
10000
30
TA = +125°C
1.5
TA = +25°C
25
1 MHz
500kHz
200kHz
100kHz
50kHz
10kHz
20
15
10
0.5
5
0
4
6
8
10
12
14
Supply Voltage (V)
16
18
FIGURE 2-20:
Output Resistance (Output
Low) vs. Supply Voltage.
100
VDD = 18V
1 MHz
500kHz
200kHz
100kHz
50kHz
10kHz
100
1000
Capacitive Load (pF)
FIGURE 2-21:
Supply Current vs.
Capacitive Load (VDD = 18V).
2016 Microchip Technology Inc.
10000
1000
Capacitive Load (pF)
10000
FIGURE 2-23:
Supply Current vs.
Capacitive Load (VDD = 6V).
Supply Current (mA)
Supply Current (mA)
1000
Capacitive Load (pF)
FIGURE 2-22:
Supply Current vs.
Capacitive Load (VDD = 12V).
VIN = 5V (MCP14A0601)
VIN = 0V (MCP14A0602)
100
90
80
70
60
50
40
30
20
10
0
1 MHz
500kHz
200kHz
100kHz
50kHz
10kHz
100
2
1
VDD = 12V
100
90
80
70
60
50
40
30
20
10
0
VDD = 18V
10000pF
6800pF
3300pF
1000pF
470pF
100pF
10
100
Switching Frequency (kHz)
1000
FIGURE 2-24:
Supply Current vs.
Frequency (VDD = 18V).
DS20005593A-page 9
MCP14A0601/2
Supply Current (mA)
Note: Unless otherwise indicated, TA = +25°C with 4.5V VDD 18V.
50
45
40
35
30
25
20
15
10
5
0
VDD = 12V
10000pF
6800pF
3300pF
1000pF
470pF
100pF
10
100
Switching Frequency (kHz)
1000
FIGURE 2-25:
Supply Current vs.
Frequency (VDD = 12V).
Supply Current (mA)
30
VDD = 6V
25
10000pF
6800pF
3300pF
1000pF
470pF
100pF
20
15
10
5
0
10
100
Switching Frequency (kHz)
1000
FIGURE 2-26:
Supply Current vs.
Frequency (VDD = 6V).
Enable Current (uA)
14
13
TA = +125°C
12
11
TA = +25°C
10
9
8
4
6
8
FIGURE 2-27:
Voltage.
DS20005593A-page 10
10
12
14
Supply Voltage (V)
16
18
Enable Current vs. Supply
2016 Microchip Technology Inc.
MCP14A0601/2
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
MCP14A0601/2
Symbol
8L 2 x 3 TDFN
3.1
Description
8L MSOP/SOIC
1
1
VDD
Supply Input
2
2
IN
Control Input
3
3
EN
Device Enable
4
4
GND
Power Ground
5
5
GND
Power Ground
6
6
OUT/OUT
7
7
OUT/OUT
8
8
VDD
Supply Input
EP
—
EP
Exposed Thermal Pad (GND)
Supply Input Pin (VDD)
3.4
Push-Pull Output
Push-Pull Output
Power Ground Pin (GND)
VDD is the bias supply input for the MOSFET driver and
has a voltage range of 4.5V to 18V. This input must be
decoupled to ground with a local capacitor. This bypass
capacitor provides a localized low-impedance path for
the peak currents that are provided to the load.
GND is the device return pin for the input and output
stages. The GND pin should have a low-impedance
connection to the bias supply source return. When the
capacitive load is being discharged, high peak currents
will flow out of the ground pin.
3.2
3.5
Control Input Pin (IN)
The MOSFET driver Control Input is a high-impedance
input featuring low threshold levels. The Input also has
hysteresis between the high and low input levels,
allowing them to be driven from slow rising and falling
signals and to provide noise immunity.
3.3
Output Pin (OUT, OUT)
The Output is a CMOS push-pull output that is capable
of sourcing and sinking 6.0A of peak current
(VDD = 18V). The low output impedance ensures the
gate of the external MOSFET stays in the intended
state even during large transients. This output also has
a reverse current latch-up rating of 500 mA.
Device Enable Pin (EN)
The MOSFET driver Device Enable is a highimpedance input featuring low threshold levels. The
Enable input also has hysteresis between the high and
low input levels, allowing them to be driven from slow
rising and falling signals and to provide noise immunity.
Driving the Enable pin below the threshold will disable
the output of the device, pulling OUT/OUT low,
regardless of the status of the Input pin. Driving the
Enable pin above the threshold allows normal
operation of the OUT/OUT pin based on the status of
the Input pin. The Enable pin utilizes an internal pull up
resistor, allowing the pin to be left floating for standard
driver operation.
2016 Microchip Technology Inc.
3.6
Exposed Metal Pad Pin (EP)
The exposed metal pad of the DFN package is
internally connected to GND. Therefore, this pad
should be connected to a Ground plane to aid in heat
removal from the package.
DS20005593A-page 11
MCP14A0601/2
4.0
APPLICATION INFORMATION
VDD = 18V
4.1
General Information
1 µF
MOSFET drivers are high-speed, high-current devices
which are intended to source/sink high-peak currents to
charge/discharge the gate capacitance of external
MOSFETs or Insulated-Gate Bipolar Transistors
(IGBTs). In high frequency switching power supplies,
the Pulse-Width Modulation (PWM) controller may not
have the drive capability to directly drive the power
MOSFET. A MOSFET driver such as the
MCP14A0601/2 family can be used to provide
additional source/sink current capability.
4.2
Input
The ability of a MOSFET driver to transition from a fullyoff state to a fully-on state is characterized by the
driver’s rise time (tR), fall time (tF) and propagation
delays (tD1 and tD2). Figure 4-1 and Figure 4-2 show
the test circuit and timing waveform used to verify the
MCP14A0601/2 timing.
MCP14A060 2
Input
VIH (Typ.)
0V
VIL (Typ.)
tD1
1 µF
10%
Input S ignal: tRISE = tFALL ≤ 10 ns,
100 Hz, 0-5V Squa re Wa ve
4.3
Output
CL = 250 0 pF
MCP14A060 1
5V
Input
VIL (Typ.)
tD2
tR
18V
90%
Output
10%
0V
Input S ignal: tRISE = tFALL ≤ 10 ns,
100 Hz, 0-5V Squa re Wa ve
DS20005593A-page 12
Inverting Driver Timing
tF
Output
0.1 µF
Input
FIGURE 4-1:
Waveform.
tD2
90%
FIGURE 4-2:
Waveform.
tF
tR
18V
0V
VDD = 18V
tD1
Output
CL = 250 0 pF
5V
MOSFET Driver Timing
VIH (Typ.)
0V
0.1 µF
Noninverting Driver Timing
Enable Function
The enable pin (EN) provides additional control of the
output pin (OUT). This pin is active high and is
internally pulled up to VDD so that the pin can be left
floating to provide standard MOSFET driver operation.
When the enable pin’s input voltage is above the
enable pin high voltage threshold, (VEN_H), the output
is enabled and allowed to react to the status of the Input
pin. However, when the voltage applied to the Enable
pin falls below the low threshold voltage (VEN_L), the
driver’s output is disabled and does not respond to
changes in the status of the Input pin. When the driver
is disabled, the output is pulled down to a low state.
Refer to Table 4-1 for enable pin logic. The threshold
voltage levels for the Enable pin are similar to the
threshold voltage levels of the Input pin. Hysteresis is
provided to help increase the noise immunity of the
enable function, avoiding false triggers of the enable
signal during driver switching.
There are propagation delays associated with the
driver receiving an enable signal and the output
reacting. These propagation delays, tD3 and tD4, are
graphically represented in Figure 4-3.
2016 Microchip Technology Inc.
MCP14A0601/2
TABLE 4-1:
4.6
ENABLE PIN LOGIC
MCP14A0601
OUT
MCP14A0602
OUT
H
L
H
L
H
L
X
L
L
ENB
IN
H
H
L
Power Dissipation
The total internal power dissipation in a MOSFET driver
is the summation of three separate power dissipation
elements, as shown in Equation 4-1.
EQUATION 4-1:
P T = P L + P Q + P CC
Where:
5V
PT
=
Total power dissipation
PL
=
Load power dissipation
PQ
=
Quiescent power dissipation
PCC
=
Operating power dissipation
Enable
VEH (Typ.)
VEL (Typ.)
0V
tD3
tD4
18V
90%
4.6.1
Output
10%
0V
Ena ble Signa l: tRISE = tFALL ≤ 10 ns,
100 Hz, 0-5V Squa re Wa ve
FIGURE 4-3:
CAPACITIVE LOAD DISSIPATION
The power dissipation caused by a capacitive load is a
direct function of the frequency, total capacitive load
and supply voltage. The power lost in the MOSFET
driver for a complete charging and discharging cycle of
a MOSFET is shown in Equation 4-2.
Enable Timing Waveform.
EQUATION 4-2:
4.4
Decoupling Capacitors
Careful PCB layout and decoupling capacitors are
required when using power MOSFET drivers. Large
current is required to charge and discharge capacitive
loads quickly. For example, approximately 720 mA are
needed to charge a 1000 pF load with 18V in 25 ns.
To operate the MOSFET driver over a wide frequency
range with low supply impedance, it is recommended to
place 1.0 µF and 0.1 µF low ESR ceramic capacitors in
parallel between the driver VDD and GND. These
capacitors should be placed close to the driver to
minimize circuit board parasitics and provide a local
source for the required current.
4.5
PCB Layout Considerations
Proper Printed Circuit Board (PCB) layout is important
in high-current, fast-switching circuits to provide proper
device operation and robustness of design. Improper
component placement may cause errant switching,
excessive voltage ringing or circuit latch-up. The PCB
trace loop length and inductance should be minimized
by the use of ground planes or traces under the
MOSFET gate drive signal. Separate analog and
power grounds and local driver decoupling should also
be used.
Placing a ground plane beneath the MCP14A0601/2
devices will help as a radiated noise shield, as well as
providing some heat sinking for power dissipated within
the device.
2016 Microchip Technology Inc.
P L = f C T V DD
2
Where:
f
=
Switching frequency
CT
=
Total load capacitance
VDD
=
MOSFET driver supply voltage
4.6.2
QUIESCENT POWER DISSIPATION
The power dissipation associated with the quiescent
current draw depends on the state of the Input and
Enable
pins.
See
Section 1.0
“Electrical
Characteristics” for typical quiescent current draw
values in different operating states. The quiescent
power dissipation is shown in Equation 4-3.
EQUATION 4-3:
P Q = I QH D + I QL 1 – D V DD
Where:
IQH
=
Quiescent current in the High state
D
=
Duty cycle
IQL
=
Quiescent current in the Low state
VDD
=
MOSFET driver supply voltage
DS20005593A-page 13
MCP14A0601/2
4.6.3
OPERATING POWER DISSIPATION
The operating power dissipation occurs each time the
MOSFET driver output transitions because, for a very
short period of time, both MOSFETs in the output stage
are on simultaneously. This cross-conduction current
leads to a power dissipation described in Equation 4-4.
EQUATION 4-4:
P CC = V DD I CO
Where:
ICO
=
Crossover Current
VDD
=
MOSFET driver supply voltage
DS20005593A-page 14
2016 Microchip Technology Inc.
MCP14A0601/2
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
8-Lead MSOP
Example:
Device
MCP14A0601-E/MS
Code
A0601
MCP14A0601T-E/MS
A0601
MCP14A0602-E/MS
A0602
MCP14A0602T-E/MS
A0602
Note:
Applies to 8-Lead MSOP
8-Lead SOIC
Example:
Device
NNN
Code
MCP14A0601-E/SN
14A0601
MCP14A0601T-E/SN
14A0601
MCP14A0602-E/SN
14A0602
MCP14A0602T-E/SN
14A0602
Note:
Example:
Device
Code
MCP14A0601T-E/MNY
ADB
MCP14A0602T-E/MNY
ADC
Note:
e3
*
Note:
14A0601
^ 3^1615
e
256
Applies to 8-Lead SOIC
8-Lead TDFN (2 x 3)
Legend: XX...X
Y
YY
WW
NNN
A0601
615256
ADB
615
25
Applies to 8-Lead 2 x 3 TDFN
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will be carried over
to the next line, thus limiting the number of available characters for customer-specific
information.
2016 Microchip Technology Inc.
DS20005593A-page 15
MCP14A0601/2
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20005593A-page 16
2016 Microchip Technology Inc.
MCP14A0601/2
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2016 Microchip Technology Inc.
DS20005593A-page 17
MCP14A0601/2
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20005593A-page 18
2016 Microchip Technology Inc.
MCP14A0601/2
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2016 Microchip Technology Inc.
DS20005593A-page 19
MCP14A0601/2
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20005593A-page 20
2016 Microchip Technology Inc.
MCP14A0601/2
!"#$%
&
!
" # $ % &"' ""
( $ )
%
*++&&&!
!+ $
2016 Microchip Technology Inc.
DS20005593A-page 21
MCP14A0601/2
8-Lead Plastic Dual Flat, No Lead Package (MNY) – 2x3x0.8 mm Body [TDFN]
With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
N
(DATUM A)
(DATUM B)
E
NOTE 1
2X
0.15 C
1
2X
0.15 C
2
TOP VIEW
0.10 C
C
SEATING
PLANE
(A3)
A
8X
A1
0.08 C
SIDE VIEW
0.10
C A B
D2
L
1
2
0.10
C A B
NOTE 1
E2
K
N
8X b
e
BOTTOM VIEW
0.10
0.05
C A B
C
Microchip Technology Drawing No. C04-129-MNY Rev E Sheet 1 of 2
DS20005593A-page 22
2016 Microchip Technology Inc.
MCP14A0601/2
8-Lead Plastic Dual Flat, No Lead Package (MNY) – 2x3x0.8 mm Body [TDFN]
With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
N
Number of Pins
e
Pitch
A
Overall Height
A1
Standoff
Contact Thickness
A3
D
Overall Length
E
Overall Width
Exposed Pad Length
D2
Exposed Pad Width
E2
b
Contact Width
L
Contact Length
Contact-to-Exposed Pad
K
MIN
0.70
0.00
1.35
1.25
0.20
0.25
0.20
MILLIMETERS
NOM
8
0.50 BSC
0.75
0.02
0.20 REF
2.00 BSC
3.00 BSC
1.40
1.30
0.25
0.30
-
MAX
0.80
0.05
1.45
1.35
0.30
0.45
-
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package may have one or more exposed tie bars at ends.
3. Package is saw singulated
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing No. C04-129-MNY Rev E Sheet 2 of 2
2016 Microchip Technology Inc.
DS20005593A-page 23
MCP14A0601/2
8-Lead Plastic Dual Flat, No Lead Package (MNY) – 2x3x0.8 mm Body [TDFN]
With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
X2
EV
8
ØV
C
Y2
EV
Y1
1
2
SILK SCREEN
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
Contact Pitch
Optional Center Pad Width
X2
Optional Center Pad Length
Y2
Contact Pad Spacing
C
Contact Pad Width (X8)
X1
Contact Pad Length (X8)
Y1
Thermal Via Diameter
V
Thermal Via Pitch
EV
MIN
MILLIMETERS
NOM
0.50 BSC
MAX
1.60
1.50
2.90
0.25
0.85
0.30
1.00
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing No. C04-129-MNY Rev. B
DS20005593A-page 24
2016 Microchip Technology Inc.
MCP14A0601/2
APPENDIX A:
REVISION HISTORY
Revision A (October 2016)
Original Release of this Document.
2016 Microchip Technology Inc.
DS20005593A-page 25
MCP14A0601/2
NOTES:
DS20005593A-page 26
2016 Microchip Technology Inc.
MCP14A0601/2
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
[X](1)
–X
Device Tape and Reel Temperature
Range
Device:
/XX
E
Package:
MS
SN
MNY
Y*
= -40°C to +125°C (Extended)
= 8-Lead Plastic Micro Small Outline Package
(MSOP)
= 8-Lead Plastic Small Outline - Narrow, 3.90 mm
Body (SOIC)
= 8-Lead Plastic Dual Flat, No Lead Package 2 x 3 x 0.75 mm Body (TDFN)
= Nickel palladium gold manufacturing designator.
Only available on the SC70 and TDFN packages.
2016 Microchip Technology Inc.
a) MCP14A0601T-E/MS:
Tape and Reel,
Extended temperature,
8LD MSOP package
b) MCP14A0601-E/MS:
Extended temperature,
8LD MSOP package
c) MCP14A0602T-E/SN:
Tape and Reel,
Extended temperature,
8LD SOIC package
d) MCP14A0602-E/SN:
Extended temperature,
8LD SOIC package
Package
MCP14A0601:
High-Speed MOSFET Driver
MCP14A0602: High-Speed MOSFET Driver
MCP14A0601T: High-Speed MOSFET Driver
(Tape and Reel)
MCP14A0602T: High-Speed MOSFET Driver
(Tape and Reel)
Temperature Range:
Examples:
e) MCP14A0602T-E/MNY: Tape and Reel,
Extended temperature,
8LD TDFN package
Note 1:
Tape and Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering purposes and
is not printed on the device package. Check
with your Microchip Sales Office for package
availability with the Tape and Reel option.
DS20005593A-page 27
MCP14A0601/2
NOTES:
DS20005593A-page 28
2016 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate,
dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq,
KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST,
MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo,
RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O
are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company,
ETHERSYNCH, Hyper Speed Control, HyperLight Load,
IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut,
BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, Dynamic Average Matching, DAM, ECAN,
EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip
Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code
Generation, PICDEM, PICDEM.net, PICkit, PICtail,
PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker,
Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
2016 Microchip Technology Inc.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademarks of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2016, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-5224-0913-7
DS20005593A-page 29
Worldwide Sales and Service
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DS20005593A-page 30
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Tel: 33-1-30-60-70-00
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Tel: 49-8931-9700
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10/28/16
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