MCP2542FD/4FD,
MCP2542WFD/4WFD
CAN FD Transceiver with Wake-up Pattern (WUP) Option
Features
Description
• Supports CAN 2.0 and CAN with Flexible
Data-Rate (CAN FD) Physical Layer Transceiver
Requirements
• Optimized for CAN FD at 2, 5 and 8 Mbps Operation:
- Maximum propagation delay: 120 ns
- Loop delay symmetry: -10%/+10% (2 Mbps)
• MCP2542FD/4FD:
- Wake-up on CAN activity, 3.6 µs filter time
• MCP2542WFD/4WFD:
- Wake-up on Pattern (WUP), as specified in
ISO 11898-2:2016, 3.6 µs activity filter time
• Implements ISO 11898-2:2016
• Qualified According to AEC-Q100 Rev. G
• Very Low Standby Current (4 µA, typical)
• VIO Supply Pin to Interface Directly to CAN
Controllers and Microcontrollers with 1.8V to 5V I/O
• CAN Bus Pins are Disconnected when Device is
Unpowered:
- An unpowered node or brown-out event will
not load the CAN bus
- Device is unpowered if VDD or VIO drop
below its POR level
• Detection of Ground Fault:
- Permanent dominant detection on TXD
- Permanent dominant detection on bus
• Automatic Thermal Shutdown Protection
• Suitable for 12V and 24V Systems
• Meets or Exceeds Stringent Automotive Design
Requirements, Including “Hardware Requirements for LIN, CAN and FlexRay Interfaces in
Automotive Applications”, Version 1.3, May 2012:
- Conducted emissions @ 2 Mbps with
Common-Mode Choke (CMC)
- Direct Power Injection (DPI) @ 2 Mbps with
CMC
• Meets SAE J2962/2 “Communication Transceiver
Qualification Requirements - CAN”:
- Radiated emissions @ 2 Mbps without a CMC
• High Electrostatic Discharge (ESD) Protection on
CANH and CANL, meeting IEC61000-4-2 up
to ±13 kV
• Temperature Ranges:
- Extended (E): -40°C to +125°C
- High (H): -40°C to +150°C
The MCP2542FD/4FD and MCP2542WFD/4WFD
CAN transceiver family is designed for high-speed
CAN FD applications of up to 8 Mbps communication
speed. The maximum propagation delay was improved
to support longer bus length.
2016-2020 Microchip Technology Inc.
The device meets the automotive requirements for
CAN FD bit rates exceeding 2 Mbps, low quiescent
current, Electromagnetic Compatibility (EMC) and
Electrostatic Discharge (ESD).
Applications
CAN 2.0 and CAN FD networks in automotive, industrial,
aerospace, medical and consumer applications.
Package Types
MCP2542FD
MCP2542WFD
MCP2544FD
MCP2544WFDT
3x3 DFN*
TXD 1
VSS 2
VDD 3
EP
9
RXD 4
3x3 DFN*
8 STBY
TXD 1
7 CANH
VSS 2
6 CANL
VDD 3
5 VIO
RXD 4
MCP2542FD
MCP2542WFD
8-Lead SOIC
8 STBY
EP
9
7 CANH
6 CANL
5 NC
MCP2544FD
MCP2544WFDT
8-Lead SOIC
TXD 1
8 STBY
TXD 1
8 STBY
VSS 2
7 CANH
VSS 2
7 CANH
VDD 3
6 CANL
VDD 3
6 CANL
RXD 4
5 VIO
RXD 4
5 NC
MCP2542FD
MCP2542WFD
2x3 TDFN*
TXD 1
VSS 2
VDD 3
RXD 4
EP
9
MCP2544FD
MCP2544WFDT
2x3 TDFN*
8 STBY
TXD 1
7 CANH
VSS 2
6 CANL
VDD 3
5 VIO
RXD 4
8 STBY
EP
9
7 CANH
6 CANL
5 NC
* Includes Exposed Thermal Pad (EP); see Table 1-1.
DS20005514C-page 1
MCP2542FD/4FD, MCP2542WFD/4WFD
MCP2542FD/4FD, MCP2542WFD/4WFD Family Members
Device
VIO pin
WUP
MCP2542FD
Yes
No
MCP2544FD
No
No
Internal Level Shifter on Digital I/O Pins
MCP2542WFD
Yes
Yes
Wake-up on Pattern (see Section 1.6.5 “Remote Wake-up via
CAN Bus (WUP)”)
MCP2544WFDT
No
Yes
Internal Level Shifter on Digital I/O Pins; Wake-up on Pattern
Note:
Description
For ordering information, see the Product Identification System section.
Block Diagram
VIO
VDD
Digital I/O
Supply
Thermal
Protection
POR
UVLO
VIO
Permanent Dominant
Detect
TXD
CANH
Driver
and
Slope Control
VIO
CANL
STBY
Mode Control
VDD
CANH
Wake-up
Filter
LP_RX
CANL
VDD
RXD
CANH
HS_RX
CANL
VSS
Note 1:
2:
3:
There is one receiver implemented. The receiver can operate in Low-Power or High-Speed mode.
Only MCP2542FD and MCP2542WFD have the VIO pin.
In the MCP2544FD and MCP2544WFDT, the supply for the digital I/O is internally connected to
DS20005514C-page 2
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
1.0
DEVICE OVERVIEW
The MCP2542FD/4FD and MCP2542WFD/4WFD
devices serve as the interface between a CAN protocol
controller and the physical bus. The devices provide
differential transmit and receive capability for the CAN
protocol controller. The devices are fully compatible
with ISO 11898-2:2016.
Excellent loop delay symmetry supports data rates up
to 8 Mbps for CAN FD. The maximum propagation
delay was improved to support longer bus length.
Typically, each node in a CAN system must have a
device to convert the digital signals generated by a
CAN controller to signals suitable for transmission over
the bus cabling (differential output). It also provides a
buffer between the CAN controller and the high-voltage
spikes that can be generated on the CAN bus by
outside sources.
The MCP2542FD/4FD wakes up on CAN activity (basic
wake-up). The CAN activity filter time is 3.6 µs maximum.
The MCP2542WFD/4WFD wakes up after receiving
two consecutive Dominant states separated by a
Recessive state: WUP. The minimum duration of each
Dominant and Recessive state is tFILTER. The complete
WUP has to be detected within tWAKE(TO).
1.1
Transmitter Function
The CAN bus has two states: Dominant and
Recessive. A Dominant state occurs when the
differential voltage between CANH and CANL is
greater than VDIFF(D)(I). A Recessive state occurs
when the differential voltage is less than VDIFF(R)(I).
The Dominant and Recessive states correspond to the
Low and High states of the TXD input pin, respectively.
However, a Dominant state initiated by another CAN
node will override a Recessive state on the CAN bus.
1.2
Receiver Function
In Normal mode, the RXD output pin reflects the differential bus voltage between CANH and CANL. The Low
and High states of the RXD output pin correspond to the
Dominant and Recessive states of the CAN bus,
respectively.
1.3
Internal Protection
CANH and CANL are protected against battery short
circuits and electrical transients that can occur on the
CAN bus. This feature prevents destruction of the
transmitter output stage during such a Fault condition.
All other parts of the chip remain operational and the
chip temperature is lowered due to the decreased
power dissipation in the transmitter outputs. This
protection is essential to protect against bus line
short-circuit induced damage. Thermal protection is
only active during Normal mode.
1.4
Permanent Dominant Detection
The MCP2542FD/4FD and MCP2542WFD/4WFD
devices prevent two conditions:
• Permanent Dominant condition on TXD
• Permanent Dominant condition on the bus
In Normal mode, if the MCP2542FD/4FD and
MCP2542WFD/4WFD devices detect an extended
Low state on the TXD input, they will disable the CANH
and CANL output drivers in order to prevent the corruption of data on the CAN bus. The drivers will remain
disabled until TXD goes high. The high-speed receiver
is active and data on the CAN bus are received on RXD.
In Standby mode, if the MCP2542FD/4FD and
MCP2542WFD/4WFD devices detect an extended
dominant condition on the bus, it will set the RXD pin to
a Recessive state. This allows the attached controller
to go to Low-Power mode until the dominant issue is
corrected. RXD is latched high until a Recessive state is
detected on the bus and the wake-up function is
enabled again.
1.5
Power-on Reset (POR) and
Undervoltage Detection
The MCP2542FD/4FD and MCP2542WFD/4WFD
have POR detection on both supply pins: VDD and VIO.
Typical POR thresholds to deassert the Reset are 1.2V
and 3.0V for VIO and VDD, respectively.
When the device is powered on, CANH and CANL
remain in a high-impedance state until VDD exceeds its
undervoltage level. Once powered on, CANH and
CANL will enter a high-impedance state if the voltage
level at VDD drops below the undervoltage level,
providing voltage brown-out protection during normal
operation.
In Normal mode, the receiver output is forced to the
Recessive state during an undervoltage condition on
VDD. In Standby mode, the low-power receiver is
designed to work down to 1.7V VIO. Therefore, the
low-power receiver remains operational down to VPORL
on VDD (MCP2544FD and MCP2544WFDT). The
MCP2542FD and MCP2542WFD transfer data to the
RXD pin down to 1.7V on the VIO supply.
The device is further protected from excessive current
loading by thermal shutdown circuitry that disables the
output drivers when the junction temperature exceeds
a nominal limit of +175°C.
2016-2020 Microchip Technology Inc.
DS20005514C-page 3
MCP2542FD/4FD, MCP2542WFD/4WFD
1.6
Mode Control
The main difference between the MCP2542FD/4FD
and MCP2542WFD/4WFD is the wake-up method.
Figure 1-1 shows the state diagram of the
MCP2542FD/4FD. The devices wake up on CAN activity.
Figure 1-2 shows the state diagram of the
MCP2542WFD/4WFD. The devices wake up on a
WUP.
1.6.1
UNPOWERED MODE (POR)
The MCP2542FD/4FD and MCP2542WFD/4WFD
enter Unpowered mode under the following conditions:
• After powering up the device, or
• If VDD drops below VPORL, or
• If VIO drops below VPORL_VIO
In Unpowered mode, the CAN bus will be biased to
ground using a high-impedance. The MCP2542FD/4FD
and MCP2542WFD/4WFD are not able to communicate
on the bus or detect a wake-up event.
1.6.2
WAKE MODE
The MCP2542FD/4FD and MCP2542WFD/4WFD
devices transition from Unpowered mode to Wake
mode when VDD and VIO are above their PORH levels.
From Normal mode, the devices will also enter Wake
mode if VDD is smaller than VUVL, or if the band gap
output voltage is not within valid range. Additionally, the
device will transition from Standby mode to Wake mode
if STBY is pulled low.
In Wake mode, the CAN bus is biased to ground and
RXD is always high.
1.6.3
NORMAL MODE
When VDD exceeds VUVH, the band gap is within valid
range and TXD is high; the device transitions into
Normal mode. During POR, when the microcontroller
powers up, the TXD pin could be unintentionally pulled
down by the microcontroller powering up. To avoid
driving the bus during a POR of the microcontroller, the
transceiver proceeds to Normal mode only after TXD is
high.
1.6.4
STANDBY MODE
The device may be placed in Standby mode by applying a high level to the STBY pin. In Standby mode, the
transmitter and the high-speed part of the receiver are
switched off to minimize power consumption.
The low-power receiver and the wake-up block are
enabled in order to monitor the bus for activity. The
CAN bus is biased to ground.
The RXD pin remains high until a wake-up event has
occurred.
The MCP2542FD/4FD uses basic wake-up: one dominant phase for a minimum time of tFILTER will wake up
the device.
The MCP2542WFD/4WFD will only wake up if it
detects a complete WUP. The WUP method is
described in the next section.
After a wake-up event was detected, the CAN controller
gets interrupted by a negative edge on the RXD pin.
The CAN controller must put the MCP2542FD/4FD and
MCP2542WFD/4WFD back into Normal mode by
deasserting the STBY pin in order to enable
high-speed data communication.
The CAN bus wake-up function requires both supply
voltages, VDD and VIO, to be in valid range.
1.6.5
REMOTE WAKE-UP VIA CAN BUS
(WUP)
The MCP2542WFD/4WFD wakes up from Standby/
Silent mode when a dedicated Wake-up Pattern (WUP)
is detected on the CAN bus. The Wake-up Pattern is
specified in ISO 11898-6 and ISO 11898-2:2016 (see
Figure 1-2 and Figure 2-11).
The Wake-up Pattern consists of three events:
• A dominant phase of at least tFILTER, followed by
• A recessive phase of at least tFILTER, followed by
• A dominant phase of at least tFILTER
The complete pattern must be received within
tWAKE(TO). Otherwise, the internal wake-up logic is
reset and the complete Wake-up Pattern must be
retransmitted in order to trigger a wake-up event.
In Normal mode, the driver block is operational and can
drive the bus pins. The slopes of the output signals on
CANH and CANL are optimized to reduce Electromagnetic Emissions (EME). The CAN bus is biased to
VDD/2.
The high-speed differential receiver is active.
DS20005514C-page 4
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
FIGURE 1-1:
MCP2542FD/4FD STATE DIAGRAM: BASIC WAKE-UP
From Any
State
or
Un owered (POR)
CAN High-Impedance
Common-Mode Tied to GND
HS RX Off
Wake-up Disabled
Rචඌ High
Band Gap Off
Tචඌ Time-out
CAN Recessive
Common-Mode Vඌඌ/2
HS RX On
Wake-up Disabled
RXD = f(HS RX)
VDD > VPORH
and
VIO > VPORH_VIO
and
STBY Low
VDD > VPORH
and
VIO > VPORH_VIO
and
STBY High
Wake
Start Band Gap
CAN High-Impedance
Common-Mode Tied to GND
HS RX Off
Wake-up Disabled
Rචඌ High
TXD Low > TPDT
TXD High
or
and
T > TJ(SD) T < TJ(SD) – TJ(HYST)
TXD High
and
Band Gap OK
and
VDD > VUVH
Band Gap not OK
or
VDD < VUVL
Normal
CAN Driven
Common-Mode Vඌඌ/2
HS RX On
Wake-up Disabled
Rxd = f(HS RX)
STBY Low
Standby
CAN High-Impedance
Common-Mode Tied to GND
HS RX Off
Wake-up Enabled
Rචඌ = f(LP RX)
Stop Band Gap
2016-2020 Microchip Technology Inc.
Bus Dominant > tPDT
Bus Recessive
Bus Dominant
Time-out
CAN High-Impedance
Common-Mode Tied to GND
HS RX Off
Wake-up Disabled
Rචඌ High
DS20005514C-page 5
MCP2542FD/4FD, MCP2542WFD/4WFD
FIGURE 1-2:
MCP2542WFD/4WFD STATE DIAGRAM: WAKE-UP PATTERN
From Any
State
Unpowered (POR)
CAN High-Impedance
Common-Mode Tied to GND
HS RX Off
Wake-up Disabled
Rචඌ High
Band Gap Off
TXD Time-out
CAN Recessive
Common-Mode Vඌඌ/2
HS RX On
Wake-up Disabled
RXD = f(HS RX)
VDD > VPORH
and
VIO > VPORH_VIO
and
STBY Low
TXD Low > TPDT
TXD High
or
and
T > TJ(SD)
T < TJ(SD)-TJ(HYST)
Wake
Start Band Gap
CAN High-Impedance
Common-Mode Tied to GND
HS RX Off
Wake-up Disabled
RXD High
TXD High
and
Band Gap OK
and
VDD > VUVH
Band Gap Not Ok
or
VDD < VUVL
Normal
CAN Driven
Common-Mode Vඌඌ/2
HS RX On
Wake-up Disabled
RXD = f(HS RX)
STBY High
Standby
Standby Init
CAN High-Impedance
Common-Mode Tied to GND
HS RX Off
Wake-up Enabled
RXD High
Stop Band Gap
Standby 3
RXD High
Bus Dominant > tFILTER
Standby 1
Start tWAKE Time-out
RXD High
tWAKE(TO)
Expired
Bus Recessive > tFILTER
Standby 2
RXD High
Bus Dominant > tFILTER
Bus Dominant
Time-out
CAN High-Impedance
Common-Mode Tied to GND
HS RX Off
Wake-up Disabled
RXD High
DS20005514C-page 6
Bus Dominant > tPDT
Standby/Receiving
CAN High-Impedance
Common-Mode Tied to GND
HS RX Off
RXD = f(LP RX)
Bus Recessive
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
1.7
Pin Descriptions
The description of the pins are listed in Table 1-1.
TABLE 1-1:
MCP2542/4FD AND MCP2542/4WFD PIN DESCRIPTIONS
MCP2542FD
MCP2542WFD
3x3 DFN,
2x3 TDFN
1.7.1
MCP2544FD
MCP2542FD
MCP2544FD
MCP2544WFDT
MCP2542WFD
MCP2544WFDT Symbol
3x3 DFN,
SOIC
SOIC
2x3 TDFN
1
1
1
1
2
2
2
3
3
3
4
4
—
TXD
Transmit Data Input
2
VSS
Ground
3
VDD
Supply Voltage
4
4
RXD
Receive Data Output
—
5
5
NC
No Connect
5
5
—
—
VIO
Digital I/O Supply Pin
6
6
6
6
CANL
CAN Low-Level Voltage I/O
7
7
7
7
CANH
CAN High-Level Voltage I/O
8
8
8
8
STBY
Standby Mode Input
9
—
9
—
EP
TRANSMITTER DATA INPUT
PIN (TXD)
The CAN transceiver drives the differential output pins,
CANH and CANL, according to TXD. It is usually
connected to the transmitter data output of the CAN
controller device. When TXD is low, CANH and CANL
are in the Dominant state. When TXD is high, CANH
and CANL are in the Recessive state, provided that
another CAN node is not driving the CAN bus with a
Dominant state. TXD is connected from an internal
pull-up resistor (nominal 33 k) to VIO in the
MCP2542FD and MCP2542WFD, and to VDD in the
MCP2544FD and MCP2544WFDT.
1.7.2
GROUND SUPPLY PIN (VSS)
Ground supply pin.
1.7.3
Pin Function
SUPPLY VOLTAGE PIN (VDD)
1.7.5
Exposed Thermal Pad
NC PIN (MCP2544FD AND
MCP2544WFDT)
No Connect. This pin can be left open or connected to
VSS.
1.7.6
VIO PIN (MCP2542FD AND
MCP2542WFD)
Supply for digital I/O pins. In the MCP2544FD and
MCP2544WFDT, the supply for the digital I/O (TXD,
RXD and STBY) is internally connected to VDD.
1.7.7
DIGITAL I/O
The MCP2542FD/4FD and MCP2542WFD/4WFD
enable easy interfacing to MCU with I/O ranges from
1.8V to 5V.
1.7.7.1
MCP2544FD and MCP2544WFDT
Positive supply voltage pin. Supplies transmitter and
receiver, including the wake-up receiver.
The VIH(MIN) and VIL(MAX) for STBY and TXD are
independent of VDD. They are set at levels that are
compatible with 3V and 5V microcontrollers.
1.7.4
The RXD pin is always driven to VDD, therefore, a 3V
microcontroller will need a 5V tolerant input.
RECEIVER DATA OUTPUT PIN
(RXD)
RXD is a CMOS-compatible output that drives high or
low depending on the differential signals on the CANH
and CANL pins, and is usually connected to the
receiver data input of the CAN controller device. RXD is
high when the CAN bus is Recessive and low in the
Dominant state. RXD is supplied by VIO in the
MCP2542FD and MCP2542WFD, and by VDD in the
MCP2544FD and MCP2544WFDT.
2016-2020 Microchip Technology Inc.
1.7.7.2
MCP2542FD and MCP2542WFD
VIH and VIL for STBY and TXD depend on VIO. The
RXD pin is driven to VIO.
DS20005514C-page 7
MCP2542FD/4FD, MCP2542WFD/4WFD
1.7.8
CAN LOW PIN (CANL)
The CANL output drives the low side of the CAN
differential bus. This pin is also tied internally to the
receive input comparator. CANL disconnects from the
bus when MCP2542FD/4FD and MCP2542WFD/4WFD
are not powered.
1.7.9
CAN HIGH PIN (CANH)
The CANH output drives the high side of the CAN
differential bus. This pin is also tied internally to the
receive input comparator. CANH disconnects from the
bus when MCP2542FD/4FD and MCP2542WFD/4WFD
are not powered.
DS20005514C-page 8
1.7.10
STANDBY MODE INPUT PIN (STBY)
This pin selects between Normal or Standby mode. In
Standby mode, the transmitter and high-speed receiver
are turned off, only the low-power receiver and wake-up
filter are active. STBY is connected from an internal
MOS pull-up resistor to VIO in the MCP2542FD and
MCP2542WFD, and to VDD in the MCP2544FD and
MCP2544WFDT. The value of the MOS pull-up resistor
depends on the supply voltage. Typical values are
660 k for 5V, 1.1 M for 3.3V and 4.4 M for 1.8V.
1.7.11
EXPOSED THERMAL PAD (EP)
It is recommended to connect this pad to VSS to enhance
electromagnetic immunity and thermal resistance.
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
1.8
Typical Applications
In order to meet the EMC/EMI requirements, a
Common-Mode Choke (CMC) may be required for data
rates greater than 1 Mbps. Figure 1-3 and Figure 1-4
illustrate examples of typical applications of the
devices.
FIGURE 1-3:
MCP2544WFDT WITH NC AND SPLIT TERMINATION
VBAT
5V LDO
0.1 μF
VDD
CANTX
TXD
CANRX
RXD
RBX
STBY
VSS
FIGURE 1-4:
MCP2544WFD
PIC® MCU
VDD
VSS
CANH
CANH
60 4700 pF
NC
60
CANL
CANL
MCP2542FD WITH VIO PIN
VBAT
5V LDO
EN
3.3V LDO
0.1 μF
RBX
CANTX
CANRX
VSS
2016-2020 Microchip Technology Inc.
RBX
VIO
TXD
RXD
STBY
MCP2542FD
®
PIC MCU
VDD
0.1 μF
VSS
CANH
VDD
CANH
120
CANL
CANL
DS20005514C-page 9
MCP2542FD/4FD, MCP2542WFD/4WFD
NOTES:
DS20005514C-page 10
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
2.0
ELECTRICAL
CHARACTERISTICS
2.1
Terms and Definitions
A number of terms are defined in ISO 11898 that are
used to describe the electrical characteristics of a CAN
transceiver device. These terms and definitions are
summarized in this section.
2.1.1
BUS VOLTAGE
VCANL and VCANH denote the voltages of the bus line
wires, CANL and CANH, relative to the ground of each
individual CAN node.
2.1.2
COMMON-MODE BUS VOLTAGE
RANGE
Boundary voltage levels of VCANL and VCANH, with
respect to ground, for which proper operation will occur
if up to the maximum number of CAN nodes are
connected to the bus.
2.1.3
2.1.5
DIFFERENTIAL VOLTAGE, VDIFF
(OF CAN BUS)
Differential voltage of the two-wire CAN bus with value
equal to VDIFF = VCANH – VCANL.
2.1.6
INTERNAL CAPACITANCE, CIN
(OF A CAN NODE)
Capacitance seen between CANL (or CANH) and
ground during the Recessive state when the CAN node
is disconnected from the bus (see Figure 2-1).
2.1.7
INTERNAL RESISTANCE, RIN
(OF A CAN NODE)
Resistance seen between CANL (or CANH) and
ground during the Recessive state when the CAN node
is disconnected from the bus (see Figure 2-1).
FIGURE 2-1:
ECU
DIFFERENTIAL INTERNAL
CAPACITANCE, CDIFF
(OF A CAN NODE)
RIN
Capacitance seen between CANL and CANH during
the Recessive state when the CAN node is
disconnected from the bus (see Figure 2-1).
RIN
2.1.4
DIFFERENTIAL INTERNAL
RESISTANCE, RDIFF
(OF A CAN NODE)
PHYSICAL LAYER
DEFINITIONS
CANL
CDIFF
RDIFF
CANH
CIN
CIN
GROUND
Resistance seen between CANL and CANH during the
Recessive state when the CAN node is disconnected
from the bus (see Figure 2-1).
2016-2020 Microchip Technology Inc.
DS20005514C-page 11
MCP2542FD/4FD, MCP2542WFD/4WFD
2.2
Absolute Maximum Ratings†
VDD .............................................................................................................................................................................7.0V
VIO ..............................................................................................................................................................................7.0V
DC Voltage at TXD, RXD, STBY and VSS ............................................................................................ -0.3V to VIO + 0.3V
DC Voltage at CANH and CANL .................................................................................................................. -58V to +58V
Transient Voltage on CANH and CANL (ISO-7637) (Figure 2-5) ............................................................. -150V to +100V
Differential Bus Input Voltage VDIFF(I) (t = 60 days, continuous) ................................................................... -5V to +10V
Differential Bus Input Voltage VDIFF(I) (1000 pulses, t = 0.1 ms, VCANH = +18V) .....................................................+17V
Dominant State Detection VDIFF(I) (10000 pulses, t = 1 ms).......................................................................................+9V
Storage Temperature...............................................................................................................................-55°C to +150°C
Operating Ambient Temperature .............................................................................................................-40°C to +150°C
Virtual Junction Temperature, TVJ (IEC 60747-1)....................................................................................-40°C to +190°C
Soldering Temperature of Leads (10 seconds) ..................................................................................................... +300°C
ESD Protection on CANH and CANL Pins (IEC 61000-4-2) ..................................................................................±13 kV
ESD Protection on CANH and CANL Pins (IEC 801; Human Body Model) .............................................................±8 kV
ESD Protection on All Other Pins (IEC 801; Human Body Model) ...........................................................................±4 kV
ESD Protection on All Pins (IEC 801; Machine Model) ...........................................................................................±400V
ESD Protection on All Pins (IEC 801; Charge Device Model) .................................................................................±750V
† Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
DS20005514C-page 12
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
TABLE 2-1:
DC CHARACTERISTICS
DC Specifications
Electrical Characteristics: Unless otherwise indicated,
Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;
VDD = 4.5V to 5.5V; VIO = 1.7V to 5.5V (Note 2); RL = 60CL = 100 pF;
unless otherwise specified.
Parameter
Sym.
Min.
Typ.
Max.
Units
Voltage Range
VDD
4.5
—
5.5
V
Supply Current
IDD
—
2.5
5
mA
—
55
70
—
4
15
—
4
16
Conditions
Supply
VDD Pin
Standby Current
IDDS
Recessive, VTXD = VDD
Dominant, VTXD = 0V
µA
MCP2544FD and
MCP2544WFDT, bus recessive
MCP2542FD and
MCP2542WFD, includes IIO
Maximum Supply Current
IDDMAX
—
95
140
mA
Fault condition: VTXD = VSS,
VCANH = VCANL = -5V to +18V
(Note 1)
High Level of the POR
Comparator for VDD
VPORH
—
3.0
3.95
V
Note 1
Low Level of the POR
Comparator for VDD
VPORL
1.0
2.0
3.2
V
Note 1
Hysteresis of POR
Comparator for VDD
VPORD
0.2
0.9
2.0
V
Note 1
High Level of the UV
Comparator for VDD
VUVH
4.0
4.25
4.4
V
Low Level of the UV
Comparator for VDD
VUVL
3.6
3.8
4.0
V
Hysteresis of UV Comparator
VUVD
—
0.4
—
V
Digital Supply Voltage Range
VIO
1.7
—
5.5
V
Supply Current on VIO
IIO
—
7
20
µA
—
200
400
IDDS
—
0.3
2
µA
High Level of the POR
Comparator for VIO
VPORH_VIO
0.8
1.2
1.7
V
Low Level of the POR
Comparator for VIO
VPORL_VIO
0.7
1.1
1.4
V
Hysteresis of POR
Comparator for VIO
VPORD_VIO
—
0.2
—
V
2.0
0.5 VDD
3.0
V
Note 1
VIO Pin
Standby Current
Recessive, VTXD = VIO
Dominant, VTXD = 0V
Bus recessive (Note 1)
Bus Line (CANH; CANL) Transmitter
CANH; CANL: Recessive Bus
Output Voltage
Note 1:
2:
3:
VO(R)
VTXD = VDD, no load
Characterized; not 100% tested.
Only MCP2542FD and MCP2542WFD have a VIO pin. For the MCP2544FD and MCP2544WFDT, VIO is
internally connected to VDD.
-12V to 12V is ensured by characterization and tested from -2V to 7V.
2016-2020 Microchip Technology Inc.
DS20005514C-page 13
MCP2542FD/4FD, MCP2542WFD/4WFD
TABLE 2-1:
DC CHARACTERISTICS (CONTINUED)
DC Specifications
Parameter
Electrical Characteristics: Unless otherwise indicated,
Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;
VDD = 4.5V to 5.5V; VIO = 1.7V to 5.5V (Note 2); RL = 60CL = 100 pF;
unless otherwise specified.
Sym.
Min.
Typ.
Max.
Units
CANH; CANL: Bus Output
Voltage in Standby
VO(S)
-0.1
0.0
+0.1
V
Recessive Output Current
IO(R)
-5
—
+5
mA
VO(D)
2.75
3.50
4.50
V
0.50
1.50
2.25
VSYM
0.9
1.0
1.1
V
1 MHz square wave,
Recessive and Dominant
states, and transition (Note 1)
VO(DIFF)(D)
1.5
2.0
3.0
V
VTXD = VSS, RL = 50 to 65
(Figure 2-2, Figure 2-4,
Section 3.0 “Typical
Performance Curves”)
(Note 1)
1.4
2.0
3.3
VTXD = VSS, RL = 45 to 70
(Figure 2-2, Figure 2-4,
Section 3.0 “Typical
Performance Curves”)
(Note 1)
1.3
2.0
3.3
VTXD = VSS, RL = 40 to 75
(Figure 2-2, Figure 2-4)
1.5
—
5.0
VTXD = VSS, RL = 2240
(Figure 2-2, Figure 2-4,
Section 3.0 “Typical
Performance Curves”)
(Note 1)
VO(DIFF)(R)
-500
0
50
VO(DIFF)(S)
-200
0
200
IO(SC)
-115
-85
—
mA
VTXD = VSS, VCANH = -3V,
CANL: floating
—
75
+115
mA
VTXD = VSS, VCANL = +18V,
CANH: floating
-4.0
—
+0.5
V
-4.0
—
+0.4
CANH: Dominant Output
Voltage
CANL: Dominant Output
Voltage
Driver Symmetry
(VCANH + VCANL)/VDD
Dominant: Differential Output
Voltage
Recessive:
Differential Output Voltage
CANH: Short-Circuit
Output Current
CANL: Short-Circuit
Output Current
Conditions
STBY = VTXD = VDD, no load
-24V < VCAN < +24V
TXD = 0, RL = 50 to 65
RL = 50 to 65
mV
VTXD = VDD, no load, normal
(Figure 2-2, Figure 2-4)
VTXD = VDD, no load, standby
Figure 2-2, Figure 2-4
Bus Line (CANH; CANL) Receiver
Recessive Differential
Input Voltage
Note 1:
2:
3:
VDIFF(R)(I)
Normal mode,
-12V < V(CANH, CANL) < +12V,
see Figure 2-6 (Note 3)
Standby mode,
-12V < V(CANH, CANL) < +12V,
see Figure 2-6 (Note 3)
Characterized; not 100% tested.
Only MCP2542FD and MCP2542WFD have a VIO pin. For the MCP2544FD and MCP2544WFDT, VIO is
internally connected to VDD.
-12V to 12V is ensured by characterization and tested from -2V to 7V.
DS20005514C-page 14
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
TABLE 2-1:
DC CHARACTERISTICS (CONTINUED)
DC Specifications
Electrical Characteristics: Unless otherwise indicated,
Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;
VDD = 4.5V to 5.5V; VIO = 1.7V to 5.5V (Note 2); RL = 60CL = 100 pF;
unless otherwise specified.
Parameter
Sym.
Min.
Typ.
Max.
Units
Conditions
VDIFF(D)(I)
0.9
—
9.0
V
Normal mode,
-12V < V(CANH, CANL) < +12V,
see Figure 2-6 (Note 3)
1.1
—
9.0
0.5
0.7
0.9
0.4
0.7
0.9
VHYS(DIFF)
30
—
200
mV
Normal mode, see Figure 2-6
(Note 1)
RCAN_H,
RCAN_L
6
—
50
k
Note 1
Internal Resistance Matching
mR = 2 * (RCANH – RCANL)/
(RCANH + RCANL)
mR
-3
0
+3
%
VCANH = VCANL (Note 1)
Differential Input Resistance
Dominant Differential
Input Voltage
Differential Receiver
Threshold
Differential Input Hysteresis
Single-Ended Input
Resistance
VTH(DIFF)
Standby mode,
-12V < V(CANH, CANL) < +12V,
see Figure 2-6 (Note 3)
V
Normal mode,
-12V < V(CANH, CANL) < +12V,
see Figure 2-6 (Note 3)
Standby mode,
-12V < V(CANH, CANL) < +12V,
see Figure 2-6 (Note 3)
RDIFF
12
25
100
k
Note 1
Internal Capacitance
CIN
—
20
—
pF
1 Mbps (Note 1)
Differential Internal
Capacitance
CDIFF
—
10
—
pF
1 Mbps (Note 1)
ILI
-5
—
+5
µA
VDD = VTXD = VSTBY = 0V,
for MCP2542FD and
MCP2542WFD, VIO = 0V,
VCANH = VCANL = 5 V
VIH
2.0
—
VDD + 0.3
V
MCP2544FD and
MCP2544WFDT
0.7 VIO
—
VIO + 0.3
-0.3
—
0.8
-0.3
—
0.3 VIO
CANH, CANL: Input Leakage
Digital Input Pins (TXD, STBY)
High-Level Input Voltage
Low-Level Input Voltage
VIL
High-Level Input Current
MCP2542FD and
MCP2542WFD
V
MCP2542FD and
MCP2542WFD
IIH
-1
—
+1
µA
TXD: Low-Level Input Current
IIL(TXD)
-270
-150
-30
µA
STBY: Low-Level Input
Current
IIL(STBY)
-30
—
-1
µA
Note 1:
2:
3:
MCP2544FD and
MCP2544WFDT
Characterized; not 100% tested.
Only MCP2542FD and MCP2542WFD have a VIO pin. For the MCP2544FD and MCP2544WFDT, VIO is
internally connected to VDD.
-12V to 12V is ensured by characterization and tested from -2V to 7V.
2016-2020 Microchip Technology Inc.
DS20005514C-page 15
MCP2542FD/4FD, MCP2542WFD/4WFD
TABLE 2-1:
DC CHARACTERISTICS (CONTINUED)
DC Specifications
Parameter
Electrical Characteristics: Unless otherwise indicated,
Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;
VDD = 4.5V to 5.5V; VIO = 1.7V to 5.5V (Note 2); RL = 60CL = 100 pF;
unless otherwise specified.
Sym.
Min.
Typ.
Max.
Units
Conditions
VOH
VDD – 0.4
—
—
V
MCP2544FD and
MCP2544WFDT: IOH = -2 mA,
typical -4 mA
VIO – 0.4
—
—
VOL
—
—
0.4
V
IOL = 4 mA, typical 8 mA
TJ(SD)
165
175
185
°C
-12V < V(CANH, CANL) < +12V
(Note 1)
TJ(HYST)
15
—
30
°C
-12V < V(CANH, CANL) < +12V
(Note 1)
Receive Data (RXD) Output
High-Level Output Voltage
Low-Level Output Voltage
MCP2542FD and
MCP2542WFD:
VIO = 2.7V to 5.5V,
IOH = -1 mA,
VIO = 1.7V to 2.7V,
IOH = -0.5 mA,
typical -2 mA
Thermal Shutdown
Shutdown Junction
Temperature
Shutdown Temperature
Hysteresis
Note 1:
2:
3:
Characterized; not 100% tested.
Only MCP2542FD and MCP2542WFD have a VIO pin. For the MCP2544FD and MCP2544WFDT, VIO is
internally connected to VDD.
-12V to 12V is ensured by characterization and tested from -2V to 7V.
DS20005514C-page 16
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
FIGURE 2-2:
PHYSICAL BIT REPRESENTATION AND SIMPLIFIED BIAS IMPLEMENTATION
Normal Mode
Standby Mode
CANH, CANL
CANH
CANL
Recessive
Dominant
Recessive
Time
VDD
CANH
Normal
VDD/2
RXD
Standby
Mode
CANL
TABLE 2-2:
AC CHARACTERISTICS
AC Characteristics
Param.
No.
Parameter
Electrical Characteristics: Unless otherwise indicated,
Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;
VDD = 4.5V to 5.5V; VIO = 1.7V to 5.5V (Note 2); RL = 60CL = 100 pF;
Maximum VDIFF(D)(I) = 3V.
Sym.
Min.
Typ.
Max. Units
Conditions
1
Bit Time
tBIT
0.125
—
69.44
µs
2
Nominal Bit Rate
NBR
14.4
—
8000
kbps
3
Delay TXD Low to Bus
Dominant
tTXD-BUSON
—
50
85
ns
Note 1
4
Delay TXD High to Bus
Recessive
tTXD-BUSOFF
—
40
85
ns
Note 1
5
Delay Bus Dominant to RXD
tBUSON-RXD
—
70
85
ns
Note 1
6
Delay Bus Recessive to RXD
tBUSOFF-RXD
—
110
145
ns
Note 1
Note 1:
2:
3:
Characterized, not 100% tested.
Only MCP2542FD and MCP2542WFD have a VIO pin. For the MCP2544FD and MCP2544WFD, VIO is
internally connected to VDD.
Characterized. Not in ISO 11898-2:2016.
2016-2020 Microchip Technology Inc.
DS20005514C-page 17
MCP2542FD/4FD, MCP2542WFD/4WFD
TABLE 2-2:
AC CHARACTERISTICS (CONTINUED)
AC Characteristics
Param.
No.
7
Electrical Characteristics: Unless otherwise indicated,
Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;
VDD = 4.5V to 5.5V; VIO = 1.7V to 5.5V (Note 2); RL = 60CL = 100 pF;
Maximum VDIFF(D)(I) = 3V.
Parameter
Sym.
Min.
Typ.
Max. Units
Propagation Delay TXD to RXD
Worst Case of tLOOP(R) and
tLOOP(F); see Figure 2-10
tTXD – RXD
—
90
120
—
115
150
Conditions
ns
RL = 150, CL = 200pF
(Note 1)
7a
Propagation Delay, Rising
Edge
tLOOP(R)
—
90
120
ns
7b
Propagation Delay, Falling
Edge
tLOOP(F)
—
80
120
ns
8a
Recessive Bit Time on
RXD – 1 Mbps, Loop Delay
Symmetry (Note 3)
tBIT(RXD), 1M
900
985
1100
ns
800
960
1255
Recessive Bit Time on
RXD – 2 Mbps, Loop Delay
Symmetry
tBIT(RXD), 2M
450
490
550
400
460
550
8c
Recessive Bit Time on
RXD – 5 Mbps, Loop Delay
Symmetry
tBIT(RXD), 5M
160
190
220
ns
tBIT(TXD) = 200 ns
(Figure 2-10)
8d
Recessive Bit Time on
RXD – 8 Mbps, Loop Delay
Symmetry (Note 3)
tBIT(RXD), 8M
85
100
135
ns
tBIT(TXD) = 120 ns
(Figure 2-10) (Note 1)
9
CAN Activity Filter Time
(Standby)
tFILTER
0.5
1.7
3.6
µs
VDIFF(D)(I) = 1.2V to 3V
10
Delay Standby to Normal
Mode
tWAKE
—
7
30
µs
Negative edge on STBY
11
Permanent Dominant Detect
Time
tPDT
0.8
1.9
5
ms
TXD = 0V
12
Permanent Dominant Timer
Reset
tPDTR
—
5
—
ns
The shortest recessive
pulse on TXD or CAN bus
to reset permanent
dominant timer
8b
Note 1:
2:
3:
tBIT(TXD) = 1000 ns
(Figure 2-10)
tBIT(TXD) = 1000 ns
(Figure 2-10), RL = 150,
CL = 200pF (Note 1)
ns
tBIT(TXD) = 500 ns
(Figure 2-10)
tBIT(TXD) = 500 ns
(Figure 2-10), RL = 150,
CL = 200pF(Note 1)
Characterized, not 100% tested.
Only MCP2542FD and MCP2542WFD have a VIO pin. For the MCP2544FD and MCP2544WFD, VIO is
internally connected to VDD.
Characterized. Not in ISO 11898-2:2016.
DS20005514C-page 18
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
TABLE 2-2:
AC CHARACTERISTICS (CONTINUED)
AC Characteristics
Param.
No.
Parameter
Transmitted Bit Time on
Bus – 1 Mbps (Note 3)
13a
Transmitted Bit Time on
Bus – 2 Mbps
13b
Electrical Characteristics: Unless otherwise indicated,
Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;
VDD = 4.5V to 5.5V; VIO = 1.7V to 5.5V (Note 2); RL = 60CL = 100 pF;
Maximum VDIFF(D)(I) = 3V.
Sym.
Min.
Typ.
Max. Units
tBIT(BUS), 1M
870
1000
1060
870
1000
1060
435
515
530
435
480
550
tBIT(BUS), 2M
ns
Conditions
tBIT(TXD) = 1000 ns
(Figure 2-10)
tBIT(TXD) = 1000 ns
(Figure 2-10),
RL = 150, CL = 200pF
(Note 1)
ns
tBIT(TXD) = 500 ns
(Figure 2-10)
tBIT(TXD) = 500 ns
(Figure 2-10), RL = 150,
CL = 200pF (Note 1)
13c
Transmitted Bit Time on
Bus – 5 Mbps
tBIT(BUS), 5M
155
200
210
ns
tBIT(TXD) = 200ns
(Figure 2-10) (Note 1)
13d
Transmitted Bit Time on
Bus – 8 Mbps (Note 3)
tBIT(BUS), 8M
100
125
140
ns
tBIT(TXD) = 120 ns
(Figure 2-10) (Note 1)
14a
Receiver Timing
Symmetry – 1 Mbps (Note 3)
tDIFF(REC), 1M =
tBIT(RXD) –
tBIT(BUS)
-65
0
40
ns
tBIT(TXD) = 1000 ns
(Figure 2-10)
-130
0
80
tDIFF(REC), 2M
-65
0
40
-70
0
40
Receiver Timing
Symmetry – 2 Mbps
14b
tBIT(TXD) = 1000ns
(Figure 2-10), RL = 150,
CL = 200pF (Note 1)
ns
tBIT(TXD) = 500 ns
(Figure 2-10)
tBIT(TXD) = 500 ns
(Figure 2-10), RL = 150,
CL = 200pF (Note 1)
14c
Receiver Timing
Symmetry – 5 Mbps
tDIFF(REC), 5M
-45
0
15
ns
tBIT(TXD) = 200 ns
(Figure 2-10) (Note 1)
14d
Receiver Timing
Symmetry – 8 Mbps (Note 3),
tDIFF(REC), 8M
tDIFF(REC), 8M
-45
0
10
ns
tBIT(TXD) = 120 ns
(Figure 2-10) (Note 1)
15
WUP Time-out
tWAKE(TO)
1
1.9
5
ms
MCP2542WFD/4WFD
(Figure 2-11)
16
Delay Bus Dominant/
Recessive to RXD (Standby
mode)
tBUS-RXD(S)
—
0.5
—
µs
Note 1:
2:
3:
Characterized, not 100% tested.
Only MCP2542FD and MCP2542WFD have a VIO pin. For the MCP2544FD and MCP2544WFD, VIO is
internally connected to VDD.
Characterized. Not in ISO 11898-2:2016.
2016-2020 Microchip Technology Inc.
DS20005514C-page 19
MCP2542FD/4FD, MCP2542WFD/4WFD
FIGURE 2-3:
TEST LOAD CONDITIONS
Load Condition 1
Load Condition 2
VDD/2
RL
CL
Pin
CL
Pin
RL = 464
CL = 50 pF
FIGURE 2-4:
VSS
for all digital pins
VSS
TEST CIRCUIT FOR ELECTRICAL CHARACTERISTICS
0.1 µF
VDD
CANH
TXD
CAN
Transceiver
RL
CL
RXD
CANL
15 pF
GND
STBY
Note: On MCP2544FD and MCP2544WFDT, VIO is connected to VDD.
TEST CIRCUIT FOR AUTOMOTIVE TRANSIENTS(1,2)
FIGURE 2-5:
CANH
TXD
RXD
CAN
Transceiver
GND
Note 1:
2:
1000 pF
RL
CANL
STBY
Transient
Generator
1000 pF
On MCP2544FD and MCP2544WFDT, VIO is connected to VDD.
The waveforms of the applied transients shall be in accordance with ISO 7637, Part 1,
Test Pulses 1, 2, 3a and 3b.
DS20005514C-page 20
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
FIGURE 2-6:
HYSTERESIS OF THE RECEIVER
RXD (Receive Data
Output Voltage)
VOH
VDIFF (R)(I)
VDIFF (D)(I)
VOL
VDIFF (H)(I)
0.5
2016-2020 Microchip Technology Inc.
VDIFF (V)
0.9
DS20005514C-page 21
MCP2542FD/4FD, MCP2542WFD/4WFD
2.3
Timing Diagrams and Specifications
FIGURE 2-7:
TIMING DIAGRAM FOR AC CHARACTERISTICS
VDD
TXD (transmit data
input voltage)
0V
VDIFF (CANH,
CANL differential
voltage)
RXD (receive data
output voltage)
3
5
6
4
7
7
FIGURE 2-8:
TIMING DIAGRAM FOR WAKE-UP FROM STANDBY
TXD
STBY
VCANH
VCANL
10
FIGURE 2-9:
PERMANENT DOMINANT TIMER RESET DETECT
Minimum Pulse Width until CAN Bus goes to Dominant State after the Falling Edge
TXD
VDIFF (VCANH-VCANL)
Driver is Off
11
DS20005514C-page 22
12
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
FIGURE 2-10:
TIMING DIAGRAM FOR LOOP DELAY SYMMETRY
70%
TXD
30%
30%
5*tBIT(TXD)
tLOOP(F)
TBIT(TXD)
VDIFF_BUS
900 mV
500 mV
13
tBIT(BUS)
70%
RXD
30%
tLOOP(R)
8
tBIT(RXD)
FIGURE 2-11:
TIMING DIAGRAM FOR WAKE-UP PATTERN (WUP)
CANH
CANL
tFILTER
(9)
tFILTER
(9)
tFILTER
(9)
t < tWAKE(TO) (15)
RXD
tBU S-RXD (S )
(16)
TABLE 2-3:
tBU S-RXD (S )
(16)
THERMAL SPECIFICATIONS
Parameter
Sym.
Min.
Typ.
Max.
Units
TA
-40
—
+125
C
-40
—
+150
Test Conditions
Temperature Ranges
Specified Temperature Range
Operating Temperature Range
TA
-40
—
+150
C
Storage Temperature Range
TA
-65
—
+155
C
Thermal Resistance, 8-Lead DFN (3x3)
JA
—
56.7
—
C/W
Thermal Resistance, 8-Lead SOIC
JA
—
149.5
—
C/W
Thermal Resistance, 8-Lead TDFN (2x3)
JA
—
53
—
C/W
Package Thermal Resistances
2016-2020 Microchip Technology Inc.
DS20005514C-page 23
MCP2542FD/4FD, MCP2542WFD/4WFD
NOTES:
DS20005514C-page 24
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
3.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
VDD = 5.5 V
2.6
2.3
2.2
2.1
2
1.9
1.8
1.7
1.6
1.5
1.4
1.3
-40
25
150
40
45
50
55
60
65
70
75
Dominant Differential Output (V)
Dominant Differential Output (V)
VDD = 4.5 V
2.5
2.4
2.3
2.2
-40
2.1
2
25
1.9
150
1.8
1.7
1.6
RL (ɏ)
40
45
50
55
60
65
70
75
RL (ɏ)
FIGURE 3-1:
Dominant Differential Output
vs. RL (VDD = 4.5V).
FIGURE 3-3:
Dominant Differential Output
vs. RL (VDD = 5.5V).
Dominant Differential Output (V)
VDD = 5.0 V
2.3
2.2
2.1
2
1.9
1.8
1.7
1.6
1.5
1.4
1.3
-40
25
150
40
45
50
55
60
65
70
75
RL (ɏ)
FIGURE 3-2:
Dominant Differential Output
vs. RL (VDD = 5.0V).
2016-2020 Microchip Technology Inc.
DS20005514C-page 25
MCP2542FD/4FD, MCP2542WFD/4WFD
NOTES:
DS20005514C-page 26
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
8-Lead DFN (03x03x0.9 mm)
XXXX
YYWW
NNN
PIN 1
8-Lead SOIC (150 mil)
Part Number
MCP2542FD-E/MF
DAEK
MCP2542FDT-H/MF
DAEK
MCP2542FD-H/MF
DAEK
MCP2542FDT-E/MF
DAEK
MCP2542WFD-E/MF
DAEH
MCP2542WFDT-H/MF
DAEH
MCP2542WFD-H/MF
DAEH
MCP2542WFDT-E/MF
DAEH
MCP2544FD-E/MF
DAEJ
MCP2544FDT-H/MF
DAEJ
MCP2544FD-H/MF
DAEJ
MCP2544FDT-E/MF
DAEJ
MCP2544WFD-E/MF
DAEG
MCP2544WFDT-H/MF
DAEG
MCP2544WFD-H/MF
DAEG
MCP2544WFDT-E/MF
DAEG
Part Number
XXXXXXXX
XXXXYYWW
MCP2542W
MCP2542WFDT-H/SN
MCP2542W
MCP2542WFD-H/SN
MCP2542W
MCP2542WFDT-E/SN
MCP2542W
MCP2542
MCP2542FD-H/SN
MCP2542
MCP2542FDT-E/SN
MCP2542
MCP2544WFD-E/SN
MCP2544W
e3
*
Note:
Example
DAEK
1538
256
PIN 1
Example
MCP2542W
SN e3 1538
256
2544WFD
MCP2544WFD-H/SN
2544WFD
MCP2544WFDT-E/SN
MCP2544W
MCP2544FD-E/SN
XX...X
Y
YY
WW
NNN
MCP2542
MCP2542FDT-H/SN
MCP2544WFDT-H/SN
Legend:
Code
MCP2542WFD-E/SN
MCP2542FD-E/SN
NNN
Code
MCP2544
MCP2544FDT-H/SN
MCP2544
MCP2544FD-H/SN
MCP2544
MCP2544FDT-E/SN
MCP2544
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC®designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC® designator ( e)
3
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will be
carried over to the next line, thus limiting the number of available characters for
customer-specific information.
2016-2020 Microchip Technology Inc.
DS20005514C-page 27
MCP2542FD/4FD, MCP2542WFD/4WFD
4.1
Package Marking Information (Continued)
8-Lead TDFN (02x03x0.8 mm)
XXX
YWW
NN
PIN 1
DS20005514C-page 28
Part Number
Code
MCP2542FDT-E/MNY
ACR
MCP2542FDT-H/MNY
ACR
MCP2542WFDT-E/MNY
ACP
MCP2542WFDT-H/MNY
ACP
MCP2544FDT-E/MNY
ACQ
MCP2544FDT-H/MNY
ACQ
MCP2544WFDTT-E/MNY
ACN
MCP2544WFDTT-H/MNY
ACN
Example
ACQ
607
25
PIN 1
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2016-2020 Microchip Technology Inc.
DS20005514C-page 29
MCP2542FD/4FD, MCP2542WFD/4WFD
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20005514C-page 30
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2016-2020 Microchip Technology Inc.
DS20005514C-page 31
MCP2542FD/4FD, MCP2542WFD/4WFD
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2X
0.10 C A–B
D
A
D
NOTE 5
N
E
2
E1
2
E1
E
2X
0.10 C A–B
2X
0.10 C A–B
NOTE 1
2
1
e
B
NX b
0.25
C A–B D
NOTE 5
TOP VIEW
0.10 C
C
A A2
SEATING
PLANE
8X
A1
SIDE VIEW
0.10 C
h
R0.13
h
R0.13
H
SEE VIEW C
VIEW A–A
0.23
L
(L1)
VIEW C
Microchip Technology Drawing No. C04-057-SN Rev F Sheet 1 of 2
DS20005514C-page 32
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
Number of Pins
N
e
Pitch
Overall Height
A
Molded Package Thickness
A2
§
Standoff
A1
Overall Width
E
Molded Package Width
E1
Overall Length
D
Chamfer (Optional)
h
Foot Length
L
L1
Footprint
Foot Angle
c
Lead Thickness
b
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
MIN
1.25
0.10
0.25
0.40
0°
0.17
0.31
5°
5°
MILLIMETERS
NOM
8
1.27 BSC
6.00 BSC
3.90 BSC
4.90 BSC
1.04 REF
-
MAX
1.75
0.25
0.50
1.27
8°
0.25
0.51
15°
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.15mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
5. Datums A & B to be determined at Datum H.
Microchip Technology Drawing No. C04-057-SN Rev F Sheet 2 of 2
2016-2020 Microchip Technology Inc.
DS20005514C-page 33
MCP2542FD/4FD, MCP2542WFD/4WFD
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
SILK SCREEN
C
Y1
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
Contact Pitch
Contact Pad Spacing
C
Contact Pad Width (X8)
X1
Contact Pad Length (X8)
Y1
MIN
MILLIMETERS
NOM
1.27 BSC
5.40
MAX
0.60
1.55
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-2057-SN Rev F
DS20005514C-page 34
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
8-Lead Plastic Dual Flat, No Lead Package (MNY) – 2x3x0.8 mm Body [TDFN]
With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
N
(DATUM A)
(DATUM B)
E
NOTE 1
2X
0.15 C
1
2
2X
0.15 C
TOP VIEW
0.10 C
C
(A3)
A
SEATING
PLANE
8X
0.08 C
A1
SIDE VIEW
0.10
C A B
D2
L
1
2
0.10
C A B
NOTE 1
E2
K
N
8X b
e
0.10
0.05
C A B
C
BOTTOM VIEW
Microchip Technology Drawing No. C04-129-MNY Rev E Sheet 1 of 2
2016-2020 Microchip Technology Inc.
DS20005514C-page 35
MCP2542FD/4FD, MCP2542WFD/4WFD
8-Lead Plastic Dual Flat, No Lead Package (MNY) – 2x3x0.8 mm Body [TDFN]
With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
N
Number of Pins
e
Pitch
A
Overall Height
Standoff
A1
Contact Thickness
A3
D
Overall Length
Overall Width
E
Exposed Pad Length
D2
Exposed Pad Width
E2
b
Contact Width
L
Contact Length
Contact-to-Exposed Pad
K
MIN
0.70
0.00
1.35
1.25
0.20
0.25
0.20
MILLIMETERS
NOM
8
0.50 BSC
0.75
0.02
0.20 REF
2.00 BSC
3.00 BSC
1.40
1.30
0.25
0.30
-
MAX
0.80
0.05
1.45
1.35
0.30
0.45
-
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package may have one or more exposed tie bars at ends.
3. Package is saw singulated
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing No. C04-129-MNY Rev E Sheet 2 of 2
DS20005514C-page 36
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
8-Lead Plastic Dual Flat, No Lead Package (MNY) – 2x3x0.8 mm Body [TDFN]
With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
X2
EV
8
ØV
C
Y2
EV
Y1
1
2
SILK SCREEN
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
Contact Pitch
Optional Center Pad Width
X2
Optional Center Pad Length
Y2
Contact Pad Spacing
C
Contact Pad Width (X8)
X1
Contact Pad Length (X8)
Y1
Thermal Via Diameter
V
Thermal Via Pitch
EV
MIN
MILLIMETERS
NOM
0.50 BSC
MAX
1.60
1.50
2.90
0.25
0.85
0.30
1.00
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing No. C04-129-MNY Rev. B
2016-2020 Microchip Technology Inc.
DS20005514C-page 37
MCP2542FD/4FD, MCP2542WFD/4WFD
NOTES:
DS20005514C-page 38
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
APPENDIX A:
REVISION HISTORY
Revision C (August 2020)
The following is the list of modifications:
•
•
•
•
Updated “Features” section.
Updated Section 1.0 “Device Overview”.
Updated Section 4.0 “Packaging Information”.
Updated Section “Product Identification
System”.
Revision B (March 2019)
The following is the list of modifications:
• Changed High-Level Input Voltage for
MCP2544FD and MCP2544WFD from VIO-0.3 to
VDD-0.3 in TABLE 2-1: “DC Characteristics”.
• Fixed SOIC package markings in Section 4.1
“Package Marking Information”.
• Clarified that MCP2544FD/4FD is a CAN FD
Transceiver without WUP Option in Section
“Product Identification System”.
• Minor typographical corrections.
Revision A (February 2016)
Initial release of this document.
2016-2020 Microchip Technology Inc.
DS20005514C-page 39
MCP2542FD/4FD, MCP2542WFD/4WFD
NOTES:
DS20005514C-page 40
2016-2020 Microchip Technology Inc.
MCP2542FD/4FD, MCP2542WFD/4WFD
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
[X](1)
Tape and Reel
Option
X
/XX
Temperature
Range
Package
Examples:
a) MCP2542FD-E/MF:
b)
Device:
MCP2542FD/4FD:
CAN FD Transceiver without WUP Option
MCP2542WFD/4WFD: CAN FD Transceiver with WUP Option
c)
Tape and Reel
Option:
Blank
T
= Standard packaging (tube or tray)
= Tape and Reel(1)
d)
Temperature
Range:
E
H
= -40C to+125C(Extended)
= -40C to +150°C (High)
e)
Package:
MF
= Plastic Dual Flat No Lead Package –
3 x 3 x 0.9 mm Body (DFN), 8-Lead
MNY
= Plastic Dual Flat No Lead Package –
2 x 3 x 0.8 mm Body (TDFN), 8-Lead
SN
= Plastic Small Outline – Narrow, 3.90 mm Body
(SOIC), 8-Lead
MFVAO = Plastic Dual Flat No Lead Package –
3 x 3 x 0.9 mm Body (DFN), 8-Lead,
Automotive, AEC-Q100 Qualified
MNYVAO = Plastic Dual Flat No Lead Package –
2 x 3 x 0.8 mm Body (TDFN), 8-Lead,
Automotive, AEC-Q100 Qualified
SNVAO = Plastic Small Outline – Narrow, 3.90 mm, Body
(SOIC), 8-Lead, Automotive, AEC-Q100 Qualified
2016-2020 Microchip Technology Inc.
f)
g)
Extended Temperature,
8-Lead, Plastic Dual Flat
No Lead DFN package.
MCP2544WFD-H/MF:
High Temperature,
8-Lead, Plastic Dual Flat
No Lead DFN package.
MCP2542WFDT-H/SN: Tape and Reel, High
Temperature, 8-Lead,
Plastic Small Outline
SOIC package.
MCP2544WFDT-E/SN: Tape and Reel, Extended
Temperature, 8-Lead,
Plastic Small Outline
SOIC package.
MCP2542FDT-E/MNY:
Tape and Reel, Extended
Temperature, 8-Lead,
Plastic Dual Flat No Lead
TDFN package.
MCP2544WFDT-H/MNY: Tape and Reel, High
Temperature, 8-Lead,
Plastic Dual Flat No Lead
TDFN package.
MCP2542FDT-E/MFVAO: Tape and Reel,
Extended Temperature,
8-Lead, Plastic Dual Flat
No Lead DFN package,
Automotive AEC-Q100
Qualified.
Note 1:
Tape and Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering purposes and
is not printed on the device package. Check
with your Microchip Sales Office for package
availability with the Tape and Reel option.
DS20005514C-page 41
MCP2542FD/4FD, MCP2542WFD/4WFD
NOTES:
DS20005514C-page 42
2016-2020 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, Adaptec,
AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT,
chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex,
flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck,
LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi,
Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer,
PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire,
Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST,
SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,
TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA
are registered trademarks of Microchip Technology Incorporated in
the U.S.A. and other countries.
APT, ClockWorks, The Embedded Control Solutions Company,
EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load,
IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision
Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire,
SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub,
TimePictra, TimeProvider, Vite, WinPath, and ZL are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard,
CryptoAuthentication, CryptoAutomotive, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage
Technology, and Symmcom are registered trademarks of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany
II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2016-2020, Microchip Technology Incorporated, All Rights
Reserved.
For information regarding Microchip’s Quality Management Systems,
please visit www.microchip.com/quality.
2016-2020 Microchip Technology Inc.
ISBN: 978-1-5224-6575-1
DS20005514C-page 43
Worldwide Sales and Service
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Corporate Office
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Technical Support:
http://www.microchip.com/
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Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Novi, MI
Tel: 248-848-4000
Houston, TX
Tel: 281-894-5983
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Tel: 317-536-2380
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Tel: 951-273-7800
Raleigh, NC
Tel: 919-844-7510
New York, NY
Tel: 631-435-6000
San Jose, CA
Tel: 408-735-9110
Tel: 408-436-4270
Canada - Toronto
Tel: 905-695-1980
Fax: 905-695-2078
DS20005514C-page 44
China - Xiamen
Tel: 86-592-2388138
China - Zhuhai
Tel: 86-756-3210040
Germany - Garching
Tel: 49-8931-9700
Germany - Haan
Tel: 49-2129-3766400
Germany - Heilbronn
Tel: 49-7131-72400
Germany - Karlsruhe
Tel: 49-721-625370
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Germany - Rosenheim
Tel: 49-8031-354-560
Israel - Ra’anana
Tel: 972-9-744-7705
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Italy - Padova
Tel: 39-049-7625286
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Norway - Trondheim
Tel: 47-7288-4388
Poland - Warsaw
Tel: 48-22-3325737
Romania - Bucharest
Tel: 40-21-407-87-50
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Sweden - Gothenberg
Tel: 46-31-704-60-40
Sweden - Stockholm
Tel: 46-8-5090-4654
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
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