MCP2557FD/8FD
CAN FD Transceiver with Silent Mode
Features
Description
• Silent Mode is Useful in the Following
Applications:
- Disables transmitter in redundant systems
- Implements babbling idiot protection
- Tests connection of bus medium
- Prevents a faulty CAN controller from
disrupting all network communications
• Optimized for CAN FD at 2, 5 and 8 Mbps
Operation:
- Maximum propagation delay: 120 ns
- Loop delay symmetry: ±10%(2 Mbps)
• Meets or Exceeds Stringent Automotive Design
Requirements Including “Hardware Requirements for LIN, CAN and FlexRay Interfaces in
Automotive Applications”, Version 1.3, May 2012:
- Conducted emissions at 2 Mbps with
Common-Mode Choke (CMC)
- DPI at 2 Mbps with CMC
• Meets SAE J2962/2 “Communication Transceivers Qualification Requirements – CAN”
- Passes radiated emissions at 2 Mbps without
a CMC
• Meets Latest ISO/DIS-11898-2:2015
• Meets Latest SAE J2284-4 and -5 Working Drafts
• Digital Inputs of the MCP2557FD are Compatible
to 3.3V and 5V Microcontrollers. RXD Output
Requires a 5V Tolerant Microcontroller Input
• Functional Behavior Predictable Under all Supply
Conditions:
- Device is in Unpowered mode if VDD drops
below Power-on Reset (POR) level
- Device is in Unpowered mode if VIO drops
below POR level
The MCP2557FD/8FD CAN transceiver family is
designed for high-speed CAN FD applications with up
to 8 Mbps communication speed. The maximum propagation delay was improved to support longer bus
length.
The device meets automotive requirements for CAN
FD bit rates exceeding 2 Mbps, low quiescent current,
electromagnetic compatibility (EMC) and electrostatic
discharge (ESD).
Package Types
MCP2557FD
SOIC
MCP2558FD
SOIC
TXD 1
8 S
TXD 1
8 S
VSS 2
7 CANH
VSS 2
7 CANH
VDD 3
6 CANL
VDD 3
6 CANL
RXD 4
5 NC
RXD 4
5 VIO
MCP2557FD
2x3 TDFN*
TXD 1
VSS 2
VDD 3
MCP2558FD
2x3 TDFN*
8 S
EP
9
RXD 4
TXD 1
7 CANH
VSS 2
6 CANL
5 NC
VDD 3
1
VSS
2
VDD
3
RXD
4
EP
9
EP
9
RXD 4
7 CANH
6 CANL
5 VIO
MCP2558FD
3x3 DFN*
MCP2557FD
3x3 DFN*
TXD
8 S
8
S
TXD
1
7
CANH
VSS
2
6
CANL
VDD
3
5
NC
RXD
4
EP
9
8
S
7
CANH
6
CANL
5
VIO
*Includes Exposed Thermal Pad (EP); see Table 1-1.
Applications
CAN 2.0 and CAN FD networks in Automotive,
Industrial, Aerospace, Medical, and Consumer
applications.
MCP2557FD/8FD Family Members
Device
VIO Pin
MCP2557FD
N/A
MCP2558FD
Yes
Note:
NC
TTL I/O
VIO I/O
Description
Yes
Yes
N/A
—
N/A
N/A
Yes
Internal level shifter on digital I/O pins.
For ordering information, see the Product Identification System section.
2016 Microchip Technology Inc.
DS20005533A-page 1
MCP2557FD/8FD
Block Diagram
VIO
VDD
DIGITAL I/O
SUPPLY
THERMAL
PROTECTION
POR
UVLO
VIO
PERMANENT
DOMINANT DETECT
TXD
CANH
DRIVER
AND
SLOPE CONTROL
VIO
CANL
MODE
CONTROL
S
VDD
RXD
CANH
HS_RX
CANL
VSS
Note:
Only the MCP2558FD has the VIO pin. In the MCP2557FD, the supply for the digital I/O is internally
connected to VDD.
DS20005533A-page 2
2016 Microchip Technology Inc.
MCP2557FD/8FD
1.0
DEVICE OVERVIEW
The MCP2557FD/8FD CAN transceiver family is
designed for high-speed CAN FD applications with up
to 8 Mbps communication speed. The product offers a
Silent mode controlled by the Silent mode pin. The
Silent mode is used to disable the CAN transmitter.
This ensures that the device doesn’t drive the CAN
bus. The MCP2557FD/8FD device provides
differential transmit and receive capability for the CAN
protocol controller, and is fully compatible with
specification ISO/DIS-11898-2:2015.
The loop delay symmetry is tested to support data rates
that are up to 8 Mbps for CAN FD (Flexible Data rate).
The maximum propagation delay was improved to
support longer bus length.
Typically, each node in a CAN system must have a
device convert the digital signals generated by a CAN
controller to signals suitable for transmission over the
bus cabling (differential output). It also provides a buffer
between the CAN controller and the high-voltage
spikes that can be generated on the CAN bus by
outside sources.
1.1
Transmitter Function
The CAN bus has two states: Dominant and
Recessive. A Dominant state occurs when the
differential voltage between CANH and CANL is
greater than VDIFF(D)(I). A Recessive state occurs
when the differential voltage is less than VDIFF(R)(I).
The Dominant and Recessive states correspond to the
Low and High states of the TXD input pin, respectively.
However, a Dominant state initiated by another CAN
node will override a Recessive state on the CAN bus.
1.2
1.4
Permanent Dominant Detection
The MCP2557FD/8FD device prevents a permanent
dominant condition on TXD.
In Normal mode, if the MCP2557FD/8FD detects an
extended Low state on the TXD input, it will disable the
CANH and CANL output drivers in order to prevent
data corruption on the CAN bus. The drivers will remain
disabled until TXD goes High. The high-speed receiver
is active, and data on the CAN bus is received on RXD.
The condition has a time-out of 1.9 ms (typical). This
implies a maximum bit time of 128 µs (7.8 kHz),
allowing up to 18 consecutive dominant bits on the bus.
1.5
Power-on Reset (POR) and
Undervoltage Detection
The MCP2557FD/8FD have POR detection on both
supply pins, VDD and VIO. Typical POR thresholds to
deassert the reset are 1.2V and 3.0V for VIO and VDD,
respectively.
When the device is powered on, CANH and CANL
remain in a high-impedance state until VDD exceeds its
undervoltage level. Once powered on, CANH and
CANL will enter a high-impedance state if the voltage
level at VDD drops below the undervoltage level,
providing voltage brown-out protection during normal
operation.
The receiver output is forced to a Recessive state
during an undervoltage condition on VDD.
Receiver Function
The RXD output pin reflects the differential bus voltage
between CANH and CANL. The Low and High states of
the RXD output pin correspond to the Dominant and
Recessive states of the CAN bus, respectively.
1.3
Internal Protection
CANH and CANL are protected against battery short
circuits and electrical transients that can occur on the
CAN bus. This feature prevents destruction of the
transmitter output stage during such a fault condition.
The device is further protected from excessive current
loading by thermal shutdown circuitry that disables the
output drivers when the junction temperature exceeds
a nominal limit of +175°C.
All other parts of the chip remain operational, and the
chip temperature is lowered due to the decreased
power dissipation in the transmitter outputs. This
protection is essential to guard against bus line shortcircuit-induced damage. Thermal protection is only
active during Normal mode.
2016 Microchip Technology Inc.
DS20005533A-page 3
MCP2557FD/8FD
1.6
Mode Control
Figure 1-1 shows the state diagram of the MCP2557FD/
8FD.
1.6.1
UNPOWERED MODE (POR)
The MCP2557FD/8FD enters Unpowered mode if any
of the following conditions occur:
• After powering up the device
• If VDD drops below VPORL
• If VIO drops below VPORL_VIO
In Unpowered mode, the CAN bus will be biased to
ground using a high impedance. The MCP2557FD/
8FD is not able to communicate on the bus.
1.6.2
WAKE MODE
The MCP2557FD/8FD transitions from Unpowered
mode to Wake mode when VDD and VIO are above
their PORH levels. From Normal mode, if VDD is
smaller than VUVL, or if the bandgap output voltage is
not within valid range, the device will also enter Wake
mode.
In Wake mode, the CAN bus is biased to ground and
RXD is always high.
1.6.3
NORMAL MODE
When VDD exceeds VUVH, the band gap is within valid
range and TXD is High, the device transitions into
Normal mode. During POR, when the microcontroller
powers up, the TXD pin could be unintentionally pulled
down by the microcontroller powering up. To avoid
driving the bus during a POR of the microcontroller,
the transceiver proceeds to Normal mode only after
TXD is high.
In Normal mode, the driver block is operational and
can drive the bus pins. The slopes of the output
signals on CANH and CANL are optimized to reduce
Electromagnetic Emissions (EME). The CAN bus is
biased to VDD/2.
The high-speed differential receiver is active.
1.6.4
SILENT MODE
The device may be placed in Silent mode by applying
a high level to the ‘S’ pin (pin 8). In Silent mode, the
transmitter is disabled and the CAN bus is biased to
VDD/2. The high-speed differential receiver is active.
The CAN controller must put the MCP2557FD/8FD
back into Normal mode to enable the transmitter.
DS20005533A-page 4
2016 Microchip Technology Inc.
MCP2557FD/8FD
FIGURE 1-1:
MCP2557FD/8FD STATE DIAGRAM
From any
State
VDD < VPORL
Or
VIO < VPORL_VIO
UnPowered (POR)
CAN High Impedance
Common Mode Tied to
GND
HS RX OFF
RXD High
Bandgap OFF
TXD Time-Out
CAN Recessive
Common Mode VDD/2
HS RX ON
RXD = f(HS RX)
VDD > VPORH
And
VIO > VPORH_VIO
Wake
Start Bandgap
CAN High Impedance
Common Mode Tied to
GND
HS RX OFF
RXD High
Bandgap Not Ok
Or
VDD < VUVL
And
TXD Low > Tpdt
TXD High
Or
And
T > TJ(SD)
T < TJ(SD)-TJ(HYST)
TXD High
And
Bandgap ok
And
VDD > VUVH
And
Silent Low
Bandgap Not Ok
Or
VDD < VUVL
Normal
CAN Driven
Common Mode VDD/2
HS RX ON
RXD = f(HS RX)
SILENT Low
SILENT High
SILENT High
Silent
CAN Recessive (TX OFF)
Common Mode VDD/2
HS RX ON
RXD = f(HS RX)
2016 Microchip Technology Inc.
DS20005533A-page 5
MCP2557FD/8FD
1.7
Pin Descriptions
The descriptions of the pins are listed in Table 1-1.
TABLE 1-1:
MCP2557FD/8FD PIN DESCRIPTIONS
MCP2557FD
3 x 3 DFN,
2 x 3 TDFN
MCP2557FD
SOIC
MCP2558FD
3 x 3 DFN,
2 x 3 TDFN
MCP2558FD
SOIC
Symbol
1
1
1
1
TXD
Transmit Data Input
2
2
2
2
VSS
Ground
3
3
3
3
VDD
Supply Voltage
4
4
4
4
RXD
Receive Data Output
5
5
—
—
NC
No Connect (MCP2557FD only)
—
—
5
5
VIO
Digital I/O Supply Pin
(MCP2558FD only)
6
6
6
6
CANL
CAN Low-Level Voltage I/O
7
7
7
7
CANH
CAN High-Level Voltage I/O
8
8
8
8
S
9
—
9
—
EP
1.7.1
TRANSMITTER DATA
INPUT PIN (TXD)
The CAN transceiver drives the differential output pins
CANH and CANL according to TXD. It is usually
connected to the transmitter data output of the CAN
controller device. When TXD is Low, CANH and CANL
are in the Dominant state. When TXD is High, CANH
and CANL are in the Recessive state, provided that
another CAN node is not driving the CAN bus with a
Dominant state. TXD is connected from an internal pullup resistor (nominal 33 k) to VDD or VIO, in the
MCP2557FD or MCP2558FD, respectively.
1.7.2
GROUND SUPPLY PIN (VSS)
Ground supply pin.
1.7.3
1.7.6
Exposed Thermal Pad
VIO PIN (MCP2557FD)
Supply for digital I/O pins. In the MCP2557FD, the
supply for the digital I/O (TXD, RXD and S) is internally
connected to VDD.
1.7.7
DIGITAL I/O
The MCP2557FD/8FD enable easy interfacing to
MCUs with I/O ranges from 1.8V to 5V.
1.7.7.1
MCP2557FD
The VIH(MIN) and VIL(MAX) for TXD are independent of
VDD. They are set at levels that are compatible with 3V
and 5V microcontrollers.
The RXD pin is always driven to VDD; therefore, a 3V
microcontroller will need a 5V tolerant input.
1.7.7.2
MCP2558FD
VIH and VIL for S and TXD depend on VIO. The RXD pin
is driven to VIO.
RECEIVER DATA OUTPUT PIN (RXD)
RXD is a CMOS-compatible output that drives High or
Low depending on the differential signals on the CANH
and CANL pins, and is usually connected to the
receiver data input of the CAN controller device. RXD is
High when the CAN bus is Recessive, and Low in the
Dominant state. RXD is supplied by VDD or VIO, in the
MCP2557FD or MCP2558FD, respectively.
1.7.5
Silent Mode Input
SUPPLY VOLTAGE PIN (VDD)
Positive supply voltage pin. Supplies transmitter and
receiver.
1.7.4
Pin Function
NC PIN (MCP2557FD)
No Connect. This pin can be left open or connected to
VSS.
DS20005533A-page 6
1.7.8
CAN LOW PIN (CANL)
The CANL output drives the Low side of the CAN
differential bus. This pin is also tied internally to the
receive input comparator. CANL disconnects from the
bus when the MCP2557FD/8FD devices are not
powered.
1.7.9
CAN HIGH PIN (CANH)
The CANH output drives the high side of the CAN
differential bus. This pin is also tied internally to the
receive input comparator. CANH disconnects from the
bus when the MCP2557FD/8FD devices are not
powered.
2016 Microchip Technology Inc.
MCP2557FD/8FD
1.7.10
SILENT MODE INPUT PIN (S)
This pin sets Normal or Silent mode. In Silent mode, the
transmitter is off and the high-speed receiver is active.
The CAN bus common mode voltage is VDD/2 when in
Silent mode.
The ‘S’ pin (pin 8) is connected to an internal MOS pullup resistor to VDD or VIO, in the MCP2557FD or
MCP2558FD, respectively. The value of the MOS pullup resistor depends on the supply voltage. Typical values are 660 k for 5V, 1.1 M for 3.3V and 4.4 M for
1.8V
1.7.11
EXPOSED THERMAL PAD (EP)
It is recommended to connect this pad to VSS to
enhance electromagnetic immunity and thermal
resistance.
2016 Microchip Technology Inc.
DS20005533A-page 7
MCP2557FD/8FD
1.8
TYPICAL APPLICATION
Figure 1-2 shows a typical application for the
MCP2557FD with the NC pin and a split termination.
Figure 1-3 illustrates a typical application for the
MCP2558FD.
FIGURE 1-2:
MCP2557FD WITH NC AND SPLIT TERMINATION
VBAT
5V LDO
0.1 μF
VDD
CANTX
TXD
CANRX
RXD
RBX
MCP2557FD
PIC®
MCU
VDD
S
VSS
FIGURE 1-3:
CANH
CANH
60
4700 pF
NC
60
VSS
CANL
CANL
MCP2558FD WITH VIO PIN
VBAT
5V LDO
3.3V LDO
0.1 µF
0.1 µF
CANTX
TXD
CANRX
RXD
RBX
VSS
DS20005533A-page 8
S
MCP2558FD
VIO
PIC®
MCU
VDD
VSS
CANH
VDD
CANH
120
CANL
CANL
2016 Microchip Technology Inc.
MCP2557FD/8FD
2.0
ELECTRICAL
CHARACTERISTICS
2.1
Terms and Definitions
A number of terms are defined in ISO/DIS-11898 that
are used to describe the electrical characteristics of a
CAN transceiver device. These terms and definitions
are summarized in this section.
2.1.1
BUS VOLTAGE
VCANL and VCANH denote the voltages of the bus line
wires CANL and CANH relative to the ground of each
individual CAN node.
2.1.2
COMMON MODE BUS VOLTAGE
RANGE
Boundary voltage levels of VCANL and VCANH with
respect to ground, for which proper operation will occur,
if the maximum number of CAN nodes are connected
to the bus.
2.1.3
2.1.5
DIFFERENTIAL VOLTAGE, VDIFF
(OF CAN BUS)
Differential voltage of the two-wire CAN bus, with value
equal to VDIFF = VCANH – VCANL.
2.1.6
INTERNAL CAPACITANCE, CIN
(OF A CAN NODE)
Capacitance seen between CANL (or CANH) and
ground during the Recessive state when the CAN node
is disconnected from the bus (see Figure 2-1).
2.1.7
INTERNAL RESISTANCE, RIN
(OF A CAN NODE)
Resistance seen between CANL (or CANH) and
ground during the Recessive state when the CAN node
is disconnected from the bus (see Figure 2-1).
FIGURE 2-1:
PHYSICAL LAYER
DEFINITIONS
ECU
DIFFERENTIAL INTERNAL
CAPACITANCE, CDIFF
(OF A CAN NODE)
RIN
Capacitance seen between CANL and CANH during
the Recessive state when the CAN node is
disconnected from the bus (see Figure 2-1).
RIN
CANL
CANH
CIN
2.1.4
DIFFERENTIAL INTERNAL
RESISTANCE, RDIFF
(OF A CAN NODE)
CDIFF
RDIFF
CIN
GROUND
Resistance seen between CANL and CANH during the
Recessive state when the CAN node is disconnected
from the bus (see Figure 2-1).
2016 Microchip Technology Inc.
DS20005533A-page 9
MCP2557FD/8FD
2.2
Absolute Maximum Ratings†
VDD .............................................................................................................................................................................7.0V
VIO ..............................................................................................................................................................................7.0V
DC Voltage at TXD, RXD, S and VSS ....................................................................................................-0.3V to VIO + 0.3V
DC Voltage at CANH, and CANL ................................................................................................................. -58V to +58V
Transient Voltage on CANH, and CANL (ISO/DIS-7637) (Figure 2-5) ..................................................... -150V to +100V
Differential Bus Input Voltage VDIFF(I) (t = 60 days, continuous)....................................................................-5V to +10V
Differential Bus Input Voltage VDIFF(I) (1000 pulses, t = 0.1 ms, VCANH = +18V).....................................................+17V
Dominant State Detection VDIFF(I) (10000 pulses, t = 1 ms).......................................................................................+9V
Storage temperature ...............................................................................................................................-55°C to +150°C
Operating ambient temperature ..............................................................................................................-40°C to +150°C
Virtual Junction Temperature, TVJ (IEC60747-1) ....................................................................................-40°C to +190°C
Soldering temperature of leads (10 seconds) .......................................................................................................+300°C
ESD protection on CANH and CANL pins (IEC 61000-4-2) ...................................................................................±13 kV
ESD protection on CANH and CANL pins (IEC 801; Human Body Model)..............................................................±8 kV
ESD protection on all other pins (IEC 801; Human Body Model).............................................................................±4 kV
ESD protection on all pins (IEC 801; Machine Model) ............................................................................................±400V
ESD protection on all pins (IEC 801; Charge Device Model) ..................................................................................±750V
† Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
DS20005533A-page 10
2016 Microchip Technology Inc.
MCP2557FD/8FD
TABLE 2-1:
DC CHARACTERISTICS
DC Specifications
Parameter
Electrical Characteristics: Unless otherwise indicated, TAMB = -40°C to +150°C;
VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF; unless
otherwise specified.
Sym.
Min.
Typ.
Max.
Units
Voltage Range
VDD
4.5
—
5.5
V
Supply Current
IDD
—
2.5
5
mA
—
55
70
—
1
3
—
1
3
Conditions
Supply
VDD Pin
Silent Current
IDDS
Recessive; VTXD = VDD
Dominant; VTXD = 0V
mA
MCP2557FD
MCP2558FD Includes IIO
Maximum Supply Current
IDDMAX
—
95
140
mA
Fault condition: VTXD = VSS;
VCANH = VCANL = -5V to +18V
High Level of the POR
Comparator for VDD
VPORH
—
3.0
3.95
V
Note 1
Low Level of the POR
Comparator for VDD
VPORL
1.0
2.0
3.2
V
Note 1
Hysteresis of POR
Comparator for VDD
VPORD
0.2
0.9
2.0
V
Note 1
High Level of the UV
Comparator for VDD
VUVH
4.0
4.25
4.4
V
Low Level of the UV
Comparator for VDD
VUVL
3.6
3.8
4.0
V
Hysteresis of UV comparator
VUVD
—
0.4
—
V
VIO
1.7
—
5.5
V
IIO
—
7
30
µA
—
200
400
High Level of the POR
Comparator for VIO
VPORH_VIO
0.8
1.2
1.7
V
Low Level of the POR
Comparator for VIO
VPORL_VIO
0.7
1.1
1.4
V
Hysteresis of POR
Comparator for VIO
VPORD_VIO
—
0.2
—
V
2.0
0.5 VDD
3.0
V
VTXD = VDD; No load
-24V < VCAN < +24V
Note 1
VIO Pin
Digital Supply Voltage Range
Supply Current on VIO
Recessive; VTXD = VIO
Dominant; VTXD = 0V
Bus Line (CANH; CANL) Transmitter
CANH; CANL:
Recessive Bus Output Voltage
VO(R)
Recessive Output Current
IO(R)
-5
—
+5
mA
VO(D)
2.75
3.50
4.50
V
0.50
1.50
2.25
0.9
1.0
1.1
CANH: Dominant Output
Voltage
CANL: Dominant Output
Voltage
Driver Symmetry
(VCANH+VCANL)/VDD
Note 1:
2:
3:
VSYM
TXD = 0; RL = 50 to 65
RL = 50 to 65
V
1 MHz square wave,
Recessive and Dominant
states, and transition (Note 1)
Characterized; not 100% tested.
Only MCP2558FD has a VIO pin. For MCP2557FD, VIO is internally connected to VDD.
-12V to 12V is ensured by characterization, and tested from -2V to 7V.
2016 Microchip Technology Inc.
DS20005533A-page 11
MCP2557FD/8FD
TABLE 2-1:
DC CHARACTERISTICS (CONTINUED)
DC Specifications
Electrical Characteristics: Unless otherwise indicated, TAMB = -40°C to +150°C;
VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF; unless
otherwise specified.
Parameter
Sym.
Min.
Typ.
Max.
Units
Dominant: Differential Output
Voltage
VO(DIFF)(D)
1.5
2.0
3.0
V
1.4
2.0
3.0
VTXD = VSS; RL = 45 to 70
(Figure 2-2, Figure 2-4,
Section 3) (Note 1)
1.3
2.0
3.0
VTXD = VSS; RL = 40 to 75
(Figure 2-2, Figure 2-4,
Section 3)
1.5
—
5.0
VTXD = VSS; RL = 2240
(Figure 2-2, Figure 2-4,
Section 3) (Note 1)
VO(DIFF)(R)
-500
0
50
mV
VTXD = VDD, no load
(Figure 2-2, Figure 2-4)
IO(SC)
-115
-85
—
mA
VTXD = VSS; VCANH = -3V;
CANL: floating
—
75
+115
mA
VTXD = VSS; VCANL = +18V;
CANH: floating
Recessive:
Differential Output Voltage
CANH: Short-Circuit
Output Current
CANL: Short Circuit
Output Current
Conditions
VTXD = VSS; RL = 50 to 65
(Figure 2-2, Figure 2-4)
(Note 1)
Bus Line (CANH; CANL) Receiver
Recessive Differential
Input Voltage
VDIFF(R)(I)
-4.0
—
+0.5
V
-12V < V(CANH, CANL) < +12V;
see Figure 2-6 (Note 3)
Dominant Differential
Input Voltage
VDIFF(D)(I)
0.9
—
9.0
V
-12V < V(CANH, CANL) < +12V;
see Figure 2-6 (Note 3)
Differential
Receiver Threshold
VTH(DIFF)
0.5
0.7
0.9
V
-12V < V(CANH, CANL) < +12V;
see Figure 2-6 (Note 3)
Differential
Input Hysteresis
VHYS(DIFF)
30
—
200
mV
See Figure 2-6, (Note 1)
Single Ended
Input Resistance
RCAN_H,
RCAN_L
6
—
50
k
Note 1
mR
-3
0
+3
%
VCANH = VCANL (Note 1)
RDIFF
12
25
100
k
Note 1
Internal Capacitance
CIN
—
20
—
pF
1 Mbps (Note 1)
Differential
Internal Capacitance
CDIFF
—
10
—
pF
1 Mbps (Note 1)
ILI
-5
—
+5
µA
VDD = VTXD = VS = 0V.
For MCP2558FD, VIO = 0V.
VCANH = VCANL = 5 V.
2.0
—
VDD + 0.3
V
0.7 VIO
—
VIO + 0.3
Internal
Resistance Matching
mR=2*(RCANH-RCANL)/(RCANH+RCANL)
Differential Input
Resistance
CANH, CANL:
Input Leakage
Digital Input Pins (TXD, S)
High-Level Input Voltage
Note 1:
2:
3:
VIH
MCP2557FD
MCP2558FD
Characterized; not 100% tested.
Only MCP2558FD has a VIO pin. For MCP2557FD, VIO is internally connected to VDD.
-12V to 12V is ensured by characterization, and tested from -2V to 7V.
DS20005533A-page 12
2016 Microchip Technology Inc.
MCP2557FD/8FD
TABLE 2-1:
DC CHARACTERISTICS (CONTINUED)
DC Specifications
Parameter
Electrical Characteristics: Unless otherwise indicated, TAMB = -40°C to +150°C;
VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF; unless
otherwise specified.
Sym.
Min.
Typ.
Max.
Units
Low-Level Input Voltage
VIL
-0.3
—
0.8
V
-0.3
—
0.3VIO
High-Level Input Current
IIH
-1
—
+1
µA
IIL(TXD)
-270
-150
-30
µA
IIL(S)
-30
—
-1
µA
VOH
VDD - 0.4
—
—
V
VIO - 0.4
—
—
VOL
—
—
0.4
V
IOL = 4 mA; typical 8 mA
TJ(SD)
165
175
185
°C
-12V < V(CANH, CANL) < +12V
(Note 1)
TJ(HYST)
15
—
30
°C
-12V < V(CANH, CANL) < +12V
(Note 1)
TXD: Low-Level Input Current
S: Low-Level Input Current
Conditions
MCP2557FD
MCP2558FD
Receive Data (RXD) Output
High-Level Output Voltage
Low-Level Output Voltage
MCP2557FD: IOH = -2 mA;
typical -4 mA
MCP2558FD:
VIO = 2.7V to 5.5V,
IOH = -1 mA;
VIO = 1.7V to 2.7V,
IOH = -0.5 mA,
typical -2 mA
Thermal Shutdown
Shutdown
Junction Temperature
Shutdown
Temperature Hysteresis
Note 1:
2:
3:
Characterized; not 100% tested.
Only MCP2558FD has a VIO pin. For MCP2557FD, VIO is internally connected to VDD.
-12V to 12V is ensured by characterization, and tested from -2V to 7V.
2016 Microchip Technology Inc.
DS20005533A-page 13
MCP2557FD/8FD
FIGURE 2-2:
PHYSICAL BIT REPRESENTATION AND SIMPLIFIED BIAS IMPLEMENTATION
Normal Mode
Silent Mode
CANH, CANL
CANH
CANL
Recessive
Dominant
Recessive
Recessive
Time
VDD
CANH
VDD/2
Normal and Silent
RxD
Unpowered
CANL
TABLE 2-2:
AC CHARACTERISTICS
AC Characteristics
Param.
No.
Parameter
Electrical Characteristics: Unless otherwise indicated, TAMB = -40°C to
+150°C; VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF.
Maximum VDIFF(D)(I) = 3V.
Sym.
Min.
Typ.
Max. Units
tBIT
0.125
—
69.44
µs
Conditions
1
Bit Time
2
Nominal Bit Rate
NBR
14.4
—
8000
kbps
3
Delay TXD Low to Bus
Dominant
tTXD-BUSON
—
50
85
ns
Note 1
4
Delay TXD High to Bus
Recessive
tTXD-BUSOFF
—
40
85
ns
Note 1
5
Delay Bus Dominant to
RXD
tBUSON-RXD
—
70
85
ns
Note 1
6
Delay Bus Recessive to
RXD
tBUSOFF-RXD
—
110
145
ns
Note 1
Note 1: Characterized, not 100% tested.
2: Not in ISO/DIS-11898-2:2015, but needs to be characterized.
DS20005533A-page 14
2016 Microchip Technology Inc.
MCP2557FD/8FD
TABLE 2-2:
AC CHARACTERISTICS (CONTINUED)
AC Characteristics
Param.
No.
7
Electrical Characteristics: Unless otherwise indicated, TAMB = -40°C to
+150°C; VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF.
Maximum VDIFF(D)(I) = 3V.
Parameter
Sym.
Min.
Typ.
Max. Units
Propagation Delay TXD to
RXD
Worst Case of tLOOP(R)
and tLOOP(F) Figure 2-9
tTXD - RXD
—
90
120
—
115
150
Conditions
ns
RL = 150,
CL = 200 pF(Note 1)
7a
Propagation Delay,
Rising Edge
tLOOP(R)
—
90
120
ns
7b
Propagation Delay,
Falling Edge
tLOOP(F)
—
80
120
ns
8a
Recessive Bit Time on
RXD – 1 Mbps,
Loop Delay Symmetry
(Note 2)
tBIT(RXD), 1M
900
985
1100
ns
800
960
1255
Recessive Bit Time on
RXD – 2 Mbps,
Loop Delay Symmetry
tBIT(RXD), 2M
450
490
550
400
460
550
8c
Recessive Bit Time on
RXD – 5 Mbps,
Loop Delay Symmetry
tBIT(RXD), 5M
160
190
220
ns
tBIT(TXD) = 200 ns
(Figure 2-9)
8d
Recessive Bit Time on
RXD – 8 Mbps,
Loop Delay Symmetry
(Note 2)
tBIT(RXD), 8M
85
100
135
ns
tBIT(TXD) = 120 ns
(Figure 2-9) (Note 1)
10
Delay Silent to Normal
Mode
tWAKE
—
7
30
µs
Negative edge on S
11
Permanent Dominant
Detect Time
tPDT
0.8
1.9
5
ms
TXD = 0V
12
Permanent Dominant
Timer Reset
tPDTR
—
5
—
ns
The shortest recessive
pulse on TXD or CAN bus
to reset Permanent
Dominant Timer
13a
Transmitted Bit Time on
Bus – 1 Mbps (Note 2)
tBIT(BUS), 1M
870
1000
1060
ns
tBIT(TXD) = 1000 ns
(Figure 2-9)
870
1000
1060
435
515
530
435
480
550
8b
13b
Transmitted Bit Time on
Bus – 2 Mbp
tBIT(BUS), 2M
tBIT(TXD) = 1000 ns
(Figure 2-9)
tBIT(TXD) = 1000 ns
(Figure 2-9), RL = 150,
CL = 200 pF (Note 1)
ns
tBIT(TXD) = 500 ns
(Figure 2-9)
tBIT(TXD) = 500 ns
(Figure 2-9), RL = 150,
CL = 200 pF(Note 1)
tBIT(TXD) = 1000 ns
(Figure 2-9),
RL = 150, CL = 200 pF
(Note 1)
ns
tBIT(TXD) = 500 ns
(Figure 2-9)
tBIT(TXD) = 500 ns
(Figure 2-9) RL = 150,
CL = 200 pF (Note 1)
Note 1: Characterized, not 100% tested.
2: Not in ISO/DIS-11898-2:2015, but needs to be characterized.
2016 Microchip Technology Inc.
DS20005533A-page 15
MCP2557FD/8FD
TABLE 2-2:
AC CHARACTERISTICS (CONTINUED)
AC Characteristics
Param.
No.
Electrical Characteristics: Unless otherwise indicated, TAMB = -40°C to
+150°C; VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF.
Maximum VDIFF(D)(I) = 3V.
Parameter
Sym.
Min.
Typ.
Max. Units
Conditions
13c
Transmitted Bit Time on
Bus – 5 Mbps
tBIT(BUS), 5M
155
200
210
ns
tBIT(TXD) = 200 ns
(Figure 2-9) (Note 1)
13d
Transmitted Bit Time on
Bus - 8Mbps
(Note 2)
tBIT(BUS), 8M
100
125
140
ns
tBIT(TXD) = 120 ns
(Figure 2-9) (Note 1)
14a
Receiver Timing
Symmetry – 1 Mbps
(Note 2)
tDIFF(REC), 1M
=
tBIT(RXD)
tBIT(BUS)
-65
0
40
ns
tBIT(TXD) = 1000 ns
(Figure 2-9)
-130
0
80
Receiver Timing
Symmetry – 2 Mbps
tDIFF(REC), 2M
-65
0
40
-70
0
40
14b
tBIT(TXD) = 1000 ns
(Figure 2-9), RL = 150,
CL = 200 pF (Note 1)
ns
tBIT(TXD) = 500 ns
(Figure 2-9)
tBIT(TXD) = 500 ns
(Figure 2-9), RL = 150,
CL = 200 pF (Note 1)
14c
Receiver Timing
Symmetry – 5 Mbps
tDIFF(REC), 5M
-45
0
15
ns
tBIT(TXD) = 200 ns
(Figure 2-9) (Note 1)
14d
Receiver Timing
Symmetry – 8 Mbps
(Note 2) tDIFF(REC),8M
tDIFF(REC), 8M
-45
0
10
ns
tBIT(TXD) = 120 ns
(Figure 2-9) (Note 1)
Note 1: Characterized, not 100% tested.
2: Not in ISO/DIS-11898-2:2015, but needs to be characterized.
FIGURE 2-3:
TEST LOAD CONDITIONS
Load Condition 1
Load Condition 2
VDD/2
RL
CL
Pin
CL
Pin
RL = 464
CL = 50 pF
DS20005533A-page 16
for all digital pins
VSS
VSS
2016 Microchip Technology Inc.
MCP2557FD/8FD
FIGURE 2-4:
TEST CIRCUIT FOR ELECTRICAL CHARACTERISTICS
0.1 µF
VDD
CANH
TXD
CAN
Transceiver
RL
CL
RXD
CANL
15 pF
Note:
GND
S
On MCP2558FD, VIO is connected to VDD.
FIGURE 2-5:
TEST CIRCUIT FOR AUTOMOTIVE TRANSIENTS
CANH
TXD
CAN
Transceiver
1000 pF
RL
Transient
Generator
RXD
CANL
GND
1000 pF
S
Note 1: On MCP2558FD, VIO is connected to VDD.
2: The wave forms of the applied transients should comply with ISO/DIS-7637, Part 1, test pulses 1, 2, 3a
and 3b.
FIGURE 2-6:
HYSTERESIS OF THE RECEIVER
RXD (receive data
output voltage)
VOH
VDIFF (R)(I)
VDIFF (D)(I)
VOL
VDIFF (H)(I)
0.5
2016 Microchip Technology Inc.
VDIFF (V)
0.9
DS20005533A-page 17
MCP2557FD/8FD
2.3
Timing Diagrams and Specifications
FIGURE 2-7:
TIMING DIAGRAM FOR AC CHARACTERISTICS
VDD
TXD (transmit data
input voltage)
0V
VDIFF (CANH,
CANL differential
voltage)
RXD (receive data
output voltage)
3
5
6
4
7
7
FIGURE 2-8:
PERMANENT DOMINANT TIMER RESET DETECT
Minimum pulse width until CAN bus goes to Dominant state after the falling edge.
TXD
VDIFF (VCANH-VCANL)
Driver is off
11
DS20005533A-page 18
12
2016 Microchip Technology Inc.
MCP2557FD/8FD
FIGURE 2-9:
TIMING DIAGRAM FOR LOOP DELAY SYMMETRY
70%
TXD
30%
30%
5*tBIT(TXD)
tLOOP(F)
TBIT(TXD)
VDIFF_BUS
900 mV
500 mV
13
tBIT(BUS)
70%
RXD
30%
tLOOP(R)
8
tBIT(RXD)
2.4
Thermal Specifications
Parameter
Sym.
Min.
Typ.
Max.
Units
Specified Temperature Range
TA
-40
—
+150
C
Operating Temperature Range
TA
-40
—
+150
C
Storage Temperature Range
TA
-65
—
+155
C
Thermal Resistance, 8LD DFN (3x3)
JA
—
56.7
—
C/W
Thermal Resistance, 8LD SOIC
JA
—
149.5
—
C/W
Thermal Resistance, 8LD TDFN (2x3)
JA
—
53
—
C/W
Temperature Ranges
Package Thermal Resistances
2016 Microchip Technology Inc.
DS20005533A-page 19
MCP2557FD/8FD
3.0
TYPICAL PERFORMANCE CURVES
Dominant Differential Output
(V)
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
2.3
2.2
2.1
2
1.9
1.8
1.7
1.6
1.5
1.4
1.3
-40
40
45
50
55
60
RL (Ω)
25
65
150
70
75
Dominant Differential Output
(V)
FIGURE 3-1:
Dominant Differential Output
vs. RL (VDD = 4.5V).
2.3
2.2
2.1
2
1.9
1.8
1.7
1.6
1.5
1.4
1.3
-40
40
45
50
55
60
RL (Ω)
25
65
150
70
75
Dominant Differential Output
(V)
FIGURE 3-2:
Dominant Differential Output
vs. RL (VDD = 5.0V).
2.6
2.5
2.4
2.3
2.2
2.1
2
1.9
1.8
1.7
1.6
-40
40
45
50
55
60
RL (Ω)
25
65
150
70
75
FIGURE 3-3:
Dominant Differential Output
vs. RL (VDD = 5.5V).
DS20005533A-page 20
2016 Microchip Technology Inc.
MCP2557FD/8FD
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
8-Lead SOIC (150 mil)
Example:
Part Number
Code
MCP2557FDT-H/SN
MCP2557
MCP2557FD-H/SN
MCP2557
MCP2558FDT-H/SN
MCP2558
MCP2558FD-H/SN
MCP2558
8-Lead TDFN (02x03x0.8 mm)
Example:
Part Number
Code
MCP2557FDT-H/MNY
ACZ
MCP2558FDT-H/MNY
ADA
8-Lead DFN (03x03x0.9 mm)
Legend:
XX...X
Y
YY
WW
NNN
e*3
Note:
MCP2557
SN e3 1609
256
ACZ
609
25
Example:
Part Number
Code
MCP2557FDT-H/MF
DAEO
MCP2557FD-H/MF
DAEO
MCP2558FDT-H/MF
DAEQ
MCP2558FD-H/MF
DAEQ
DAEN
1609
256
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC®designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC® designator ( e)3
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will be
carried over to the next line, thus limiting the number of available characters for
customer-specific information.
2016 Microchip Technology Inc.
DS20005533A-page 21
MCP2557FD/8FD
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20005533A-page 22
2016 Microchip Technology Inc.
MCP2557FD/8FD
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2016 Microchip Technology Inc.
DS20005533A-page 23
MCP2557FD/8FD
!" #$%&
'
!"#! $
!
%&
'#(
##!
) %
* ! !&!
!!
+11'''"
"1
%
DS20005533A-page 24
2016 Microchip Technology Inc.
MCP2557FD/8FD
8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.75mm Body [TDFN]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
N
(DATUM A)
(DATUM B)
E
NOTE 1
2X
0.15 C
1
2
2X
0.15 C
TOP VIEW
0.10 C
C
(A3)
A
SEATING
PLANE
8X
0.08 C
A1
SIDE VIEW
0.10
C A B
D2
L
1
2
0.10
C A B
NOTE 1
E2
K
N
8X b
e
0.10
0.05
C A B
C
BOTTOM VIEW
Microchip Technology Drawing No. C04-129-MN Rev D Sheet 2 of 2
2016 Microchip Technology Inc.
DS20005533A-page 25
MCP2557FD/8FD
8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.75mm Body [TDFN]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
N
Number of Pins
e
Pitch
A
Overall Height
Standoff
A1
Contact Thickness
A3
D
Overall Length
Overall Width
E
Exposed Pad Length
D2
Exposed Pad Width
E2
b
Contact Width
Contact Length
L
Contact-to-Exposed Pad
K
MIN
0.70
0.00
1.45
1.60
0.20
0.25
0.20
MILLIMETERS
NOM
8
0.50 BSC
0.75
0.02
0.20 REF
2.00 BSC
3.00 BSC
0.25
0.30
-
MAX
0.80
0.05
1.65
1.80
0.30
0.45
-
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package may have one or more exposed tie bars at ends.
3. Package is saw singulated
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing No. C04-129-MN Rev D Sheet 2 of 2
DS20005533A-page 26
2016 Microchip Technology Inc.
MCP2557FD/8FD
8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.75mm Body [TDFN]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
X2
EV
8
ØV
C
Y2
EV
Y1
1
2
SILK SCREEN
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
Contact Pitch
Optional Center Pad Width
X2
Optional Center Pad Length
Y2
Contact Pad Spacing
C
Contact Pad Width (X8)
X1
Contact Pad Length (X8)
Y1
Thermal Via Diameter
V
Thermal Via Pitch
EV
MIN
MILLIMETERS
NOM
0.50 BSC
MAX
1.65
1.80
2.90
0.25
0.85
0.30
1.00
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing No. C04-129-MN Rev. A
2016 Microchip Technology Inc.
DS20005533A-page 27
MCP2557FD/8FD
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20005533A-page 28
2016 Microchip Technology Inc.
MCP2557FD/8FD
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2016 Microchip Technology Inc.
DS20005533A-page 29
MCP2557FD/8FD
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20005533A-page 30
2016 Microchip Technology Inc.
MCP2557FD/8FD
APPENDIX A:
REVISION HISTORY
Revision A (March 2016)
Initial release of this document.
2016 Microchip Technology Inc.
DS20005533A-page 31
MCP2557FD/8FD
NOTES:
DS20005533A-page 32
2016 Microchip Technology Inc.
MCP2557FD/8FD
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
[X](1)
X
/XX
Tape and Reel
Option
Temperature
Range
Package
PART NO.
Device
Device:
MCP2557FD:
MCP2558FD:
CAN FD Transceiver w/No
Connect Pin 5
CAN FD Transceiver w/VIO
Connect Pin 5
Tape and Reel
Option:
Blank = Standard packaging (tube or tray)
T
= Tape and Reel(1)
Temperature
Range:
H
= -40C to +150°C
Package:
MF
=
Plastic Dual Flat No Lead Package –
3x3x0.9 mm Body (DFN), 8-lead
MNY =
Plastic Dual Flat No Lead Package –
2x3x0.75 mm Body (TDFN), 8-lead
SN
Plastic Small Outline (SN) – Narrow,
3.90 mm, Body (SOIC), 8-lead
=
2016 Microchip Technology Inc.
Examples:
a) MCP2558FDT-H/MF:
b) MCP2557FD-H/SN:
Tape and Reel,
8-lead, Plastic Dual
Flat No Lead DFN
package.
8-lead, Plastic Small
Outline SOIC package.
c) MCP2558FDT-H/MNY:Tape and Reel,
8-lead, Plastic Dual
Flat No Lead TDFN
package.
Note1:
Tape and Reel identifier only appears
in the catalog part number description.
This identifier is used for ordering
purposes and is not printed on the
device package. Check with your
Microchip Sales Office for package
availability with the Tape and Reel
option.
DS20005533A-page 33
MCP2557FD/8FD
NOTES:
DS20005533A-page 34
2016 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate,
dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq,
KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST,
MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo,
RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O
are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company,
ETHERSYNCH, Hyper Speed Control, HyperLight Load,
IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut,
BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, Dynamic Average Matching, DAM, ECAN,
EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip
Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code
Generation, PICDEM, PICDEM.net, PICkit, PICtail,
PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker,
Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
2016 Microchip Technology Inc.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademarks of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2016, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-5224-0443-9
DS20005533A-page 35
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
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EUROPE
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07/14/15
DS20005533A-page 36
2016 Microchip Technology Inc.