MCP6071/2/4
110 µA, High Precision Op Amps
Description
Features
•
•
•
•
•
•
•
•
Low Offset Voltage: ±150 µV (maximum)
Low Quiescent Current: 110 µA (typical)
Rail-to-Rail Input and Output
Wide Supply Voltage Range: 1.8V to 6.0V
Gain Bandwidth Product: 1.2 MHz (typical)
Unity Gain Stable
Extended Temperature Range: -40°C to +125°C
No Phase Reversal
Applications
•
•
•
•
•
•
•
The Microchip Technology Inc. MCP6071/2/4 family of
operational amplifiers (op amps) has low input offset
voltage (±150 µV, maximum) and rail-to-rail input and
output operation. This family is unity gain stable and
has a gain bandwidth product of 1.2 MHz (typical).
These devices operate with a single supply voltage as
low as 1.8V, while drawing low quiescent current per
amplifier (110 µA, typical). These features make the
family of op amps well suited for single-supply, high
precision, battery-powered applications.
The MCP6071/2/4 family is offered in single
(MCP6071), dual (MCP6072), and quad (MCP6074)
configurations.
Automotive
Portable Instrumentation
Sensor Conditioning
Battery Powered Systems
Medical Instrumentation
Test Equipment
Analog Filters
The MCP6071/2/4 is designed with Microchip’s
advanced CMOS process. All devices are available in
the extended temperature range, with a power supply
range of 1.8V to 6.0V.
Package Types
•
•
•
•
•
MCP6072
SOIC
MCP6071
SOIC
Design Aids
SPICE Macro Models
FilterLab® Software
MAPS (Microchip Advanced Part Selector)
Analog Demonstration and Evaluation Boards
Application Notes
Typical Application
7 VDD
VINA– 2
7 VOUTB
6 VOUT
5 NC
VINA+ 3
6 VINB–
5 VINB+
VIN– 2
VIN+ 3
VSS 4
VIN+ 3
MCP6071
C
Gyrator
EP
9
MCP6072
2x3 TDFN
8 NC
VOUTA 1
7 VDD
VINA– 2
6 VOUT VINA+ 3
VSS 4
5 NC
MCP6071
SOT-23-5
VOUT 1
VSS 2
R
L = R L RC
VOUT
VSS 4
MCP6071
2x3 TDFN
VIN– 2
Z IN = RL + jωL
8 VDD
8 NC
NC 1
RL
ZIN
VOUTA 1
NC 1
VIN+ 3
VSS 4
8 VDD
EP
9
7 VOUTB
6 VINB–
5 VINB+
MCP6074
SOIC, TSSOP
5 VDD
VOUTA 1
4 VIN–
VINA+ 3
VINA– 2
14 VOUTD
13 VIND–
VDD 4
12 VIND+
11 VSS
VINB+ 5
10 VINC+
VINB– 6
9 VINC–
VOUTB 7
8 VOUTC
* Includes Exposed Thermal Pad (EP); see Table 3-1.
© 2010 Microchip Technology Inc.
DS22142B-page 1
MCP6071/2/4
NOTES:
DS22142B-page 2
© 2010 Microchip Technology Inc.
MCP6071/2/4
1.0
ELECTRICAL CHARACTERISTICS
1.1
Absolute Maximum Ratings †
Current at Output and Supply Pins ............................±30 mA
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at those or any other conditions
above those indicated in the operational listings of this
specification is not implied. Exposure to maximum
rating conditions for extended periods may affect
device reliability.
Storage Temperature ....................................-65°C to +150°C
†† See 4.1.2 “Input Voltage Limits”
VDD – VSS ........................................................................7.0V
Current at Input Pins .....................................................±2 mA
Analog Inputs (VIN+, VIN-)†† .......... VSS – 1.0V to VDD + 1.0V
All Other Inputs and Outputs ......... VSS – 0.3V to VDD + 0.3V
Difference Input Voltage ...................................... |VDD – VSS|
Output Short-Circuit Current .................................continuous
Maximum Junction Temperature (TJ) .......................... +150°C
ESD protection on all pins (HBM; MM) ................ ≥ 4 kV; 400V
1.2
Specifications
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V, VSS= GND, TA= +25°C, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2 and RL = 10 kΩ to VL. (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
VOS
-150
—
+150
µV
ΔVOS/ΔTA
—
±1.5
—
µV/°C TA= -40°C to +85°C,
VDD = 3.0V, VCM = VDD/3
ΔVOS/ΔTA
—
±4.0
—
µV/°C TA= +85°C to +125°C,
VDD = 3.0V, VCM = VDD/3
PSRR
70
87
—
dB
pA
Input Offset
Input Offset Voltage
Input Offset Drift with Temperature
Power Supply Rejection Ratio
VDD = 3.0V,
VCM = VDD/3
VCM = VSS
Input Bias Current and Impedance
Input Bias Current
Input Offset Current
IB
—
±1.0
100
IB
—
60
—
pA
TA = +85°C
IB
—
1100
5000
pA
TA = +125°C
IOS
—
±1.0
—
pA
13
Common Mode Input Impedance
ZCM
—
10 ||6
—
Ω||pF
Differential Input Impedance
ZDIFF
—
1013||6
—
Ω||pF
VCMR
VSS−0.15
—
VDD+0.15
V
VDD = 1.8V (Note 1)
VCMR
VSS−0.3
—
VDD+0.3
V
VDD = 6.0V (Note 1)
CMRR
72
89
—
dB
VCM = -0.15V to 1.95V,
VDD = 1.8V
74
91
—
dB
VCM = -0.3V to 6.3V,
VDD = 6.0V
72
87
—
dB
VCM = 3.0V to 6.3V,
VDD = 6.0V
74
89
—
dB
VCM = -0.3V to 3.0V,
VDD = 6.0V
Common Mode
Common Mode Input Voltage Range
Common Mode Rejection Ratio
Note 1:
Figure 2-13 shows how VCMR changed across temperature.
© 2010 Microchip Technology Inc.
DS22142B-page 3
MCP6071/2/4
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V, VSS= GND, TA= +25°C, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2 and RL = 10 kΩ to VL. (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
AOL
95
115
—
dB
0.2V < VOUT
2 mA
min(R1,R2) >
Simplified Analog Input ESD
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below VSS. They also
clamp any voltages that go well above VDD; their breakdown voltage is high enough to allow normal operation,
but not low enough to protect against slow over-voltage
(beyond VDD) events. Very fast ESD events (that meet
the spec) are limited so that damage does not occur.
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs.
Figure 4-2 shows one approach to protecting these
inputs.
FIGURE 4-3:
Inputs.
4.1.4
Protecting the Analog
NORMAL OPERATION
The input stage of the MCP6071/2/4 op amps use two
differential input stages in parallel. One operates at a
low common mode input voltage (VCM), while the other
operates at a high VCM. With this topology, the device
operates with a VCM up to 300 mV above VDD and
300 mV below VSS. (See Figure 2-13). The input offset
voltage is measured at VCM = VSS – 0.3V and
VDD + 0.3V to ensure proper operation.
The transition between the input stages occurs when
VCM is near VDD – 1.1V (See Figures 2-4, 2-5 and
Figure 2-6). For the best distortion performance and
gain linearity, with non-inverting gains, avoid this region
of operation.
© 2010 Microchip Technology Inc.
DS22142B-page 15
MCP6071/2/4
4.2
Rail-to-Rail Output
The output voltage range of the MCP6071/2/4 op amps
is VSS + 15 mV (minimum) and VDD – 15 mV
(maximum) when RL = 10 kΩ is connected to VDD/2
and VDD = 6.0V. Refer to Figures 2-27 and 2-28 for
more information.
4.3
4.4
Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1) is the most
sensitive to capacitive loads, all gains show the same
general behavior.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (RISO in Figure 4-4) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitance load.
–
Supply Bypass
With this family of operational amplifiers, the power
supply pin (VDD for single-supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high frequency performance. It can use a bulk
capacitor (i.e., 1 µF or larger) within 100 mm to provide
large, slow currents. This bulk capacitor can be shared
with other analog parts.
4.5
Unused Op Amps
An unused op amp in a quad package (MCP6074)
should be configured as shown in Figure 4-6. These
circuits prevent the output from toggling and causing
crosstalk. Circuit A sets the op amp at its minimum
noise gain. The resistor divider produces any desired
reference voltage within the output voltage range of the
op amp; the op amp buffers that reference voltage.
Circuit B uses the minimum number of components
and operates as a comparator, but it may draw more
current.
RISO
MCP607X
+
VIN
After selecting RISO for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP6071/2/4 SPICE macro
model are very helpful.
VOUT
CL
¼ MCP6074 (A)
¼ MCP6074 (B)
VDD
FIGURE 4-4:
Output Resistor, RISO
Stabilizes Large Capacitive Loads.
Figure 4-5 gives recommended RISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit's noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
R1
VDD
VDD
R2
VREF
R2
VREF = VDD × -------------------R1 + R2
FIGURE 4-6:
Unused Op Amps.
1000
Recommended R
ISO
(Ω)
VDD = 6.0 V
RL = 10 kΩ
100
10
GN:
1 V/V
2 V/V
≥ 5 V/V
1
10p
100p 1.E-09
1n
10n
0.1µ
1µ
1.E-11
1.E-10
1.E-08
1.E-07
1.E-06
Normalized Load Capacitance; CL/GN (F)
FIGURE 4-5:
Recommended RISO Values
for Capacitive Loads.
DS22142B-page 16
© 2010 Microchip Technology Inc.
MCP6071/2/4
4.6
PCB Surface Leakage
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow; which is greater than the
MCP6071/2/4 family’s bias current at +25°C (±1.0 pA,
typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-7.
Guard Ring
FIGURE 4-7:
for Inverting Gain.
1.
2.
VIN– VIN+
VSS
Example Guard Ring Layout
Non-inverting Gain and Unity-Gain Buffer:
a.Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
b.Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
common mode input voltage.
Inverting Gain and Transimpedance Gain
Amplifiers (convert current to voltage, such as
photo detectors):
a.Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
b.Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
© 2010 Microchip Technology Inc.
DS22142B-page 17
MCP6071/2/4
4.7
Application Circuits
4.7.1
4.7.2
GYRATOR
The MCP6071/2/4 op amps can be used in gyrator
applications. The gyrator is an electric circuit which can
make a capacitive circuit behave inductively.
Figure 4-8 shows an example of a gyrator simulating
inductance, with an approximately equivalent circuit
below. The two ZIN have similar values in typical
applications. The primary application for a gyrator is to
reduce the size and cost of a system by removing the
need for bulky, heavy and expensive inductors. For
example, RLC bandpass filter characteristics can be
realized with capacitors, resistors and operational
amplifiers without using inductors. Moreover, gyrators
will typically have higher accuracy than real inductors,
due to the lower cost of precision capacitors than
inductors.
INSTRUMENTATION AMPLIFIER
The MCP6071/2/4 op amps are well suited for
conditioning sensor signals in battery-powered
applications. Figure 4-9 shows a two op amp
instrumentation amplifier, using the MCP6072, that
works well for applications requiring rejection of
common mode noise at higher gains. The reference
voltage (VREF) is supplied by a low impedance source.
In single supply applications, VREF is typically VDD/2.
RG
VREF R1
R2
R2
R1
VOUT
V2
½
MCP6072
½
MCP6072
V1
.
RL
ZIN
MCP6071
C
VOUT
Gyrator
Z IN = R L + jωL
L = RL RC
4.7.3
RL
Equivalent Circuit
L
FIGURE 4-8:
FIGURE 4-9:
Two Op Amp
Instrumentation Amplifier.
To obtain the best CMRR possible, and not limit the
performance by the resistor tolerances, set a high gain
with the RG resistor.
R
ZIN
R1 2R 1
VOUT = ( V1 – V 2 ) ⎛ 1 + ------ + ---------⎞ + VREF
⎝
R2 RG ⎠
PRECISION COMPARATOR
Use high gain before a comparator to improve the
latter’s input offset performance. Figure 4-10 shows a
gain of 11 V/V placed before a comparator. The
reference voltage VREF can be any value between the
supply rails.
Gyrator.
VIN
MCP6071
1 MΩ
100 kΩ
FIGURE 4-10:
Comparator.
DS22142B-page 18
MCP6541
VOUT
VREF
Precision, Non-inverting
© 2010 Microchip Technology Inc.
MCP6071/2/4
5.0
DESIGN AIDS
Microchip provides the basic design tools needed for
the MCP6071/2/4 family of op amps.
5.1
SPICE Macro Model
The latest SPICE macro model for the MCP6071/2/4
op amps is available on the Microchip web site at
www.microchip.com. The model was written and tested
in official Orcad (Cadence) owned PSPICE. For the
other simulators, it may require translation.
The model covers a wide aspect of the op amp's
electrical specifications. Not only does the model cover
voltage, current, and resistance of the op amp, but it
also covers the temperature and noise effects on the
behavior of the op amp. The model has not been
verified outside of the specification range listed in the
op amp data sheet. The model behaviors under these
conditions can not be guaranteed that it will match the
actual op amp performance.
Moreover, the model is intended to be an initial design
tool. Bench testing is a very important part of any
design and cannot be replaced with simulations. Also,
simulation results using this macro model need to be
validated by comparing them to the data sheet
specifications and characteristic curves.
5.2
FilterLab® Software
Microchip’s FilterLab® software is an innovative
software tool that simplifies analog active filter (using
op amps) design. Available at no cost from the
Microchip web site at www.microchip.com/filterlab, the
FilterLab design tool provides full schematic diagrams
of the filter circuit with component values. It also
outputs the filter circuit in SPICE format, which can be
used with the macro model to simulate actual filter
performance.
5.3
MAPS (Microchip Advanced Part
Selector)
MAPS is a software tool that helps semiconductor
professionals efficiently identify Microchip devices that
fit a particular design requirement. Available at no cost
from the Microchip website at www.microchip.com/
maps, the MAPS is an overall selection tool for
Microchip’s product portfolio that includes Analog,
Memory, MCUs and DSCs. Using this tool you can
define a filter to sort features for a parametric search of
devices and export side-by-side technical comparison
reports. Helpful links are also provided for Data Sheets,
purchase, and sampling of Microchip parts.
© 2010 Microchip Technology Inc.
5.4
Analog Demonstration and
Evaluation Boards
Microchip offers a broad spectrum of Analog
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market. For
a complete listing of these boards and their
corresponding user’s guides and technical information,
visit the Microchip web site at www.microchip.com/
analogtools.
Some boards that are especially useful are:
•
•
•
•
•
•
•
MCP6XXX Amplifier Evaluation Board 1
MCP6XXX Amplifier Evaluation Board 2
MCP6XXX Amplifier Evaluation Board 3
MCP6XXX Amplifier Evaluation Board 4
Active Filter Demo Board Kit
5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,
P/N SOIC8EV
• 14-Pin SOIC/TSSOP/DIP Evaluation Board, P/N
SOIC14EV
5.5
Application Notes
The following Microchip Analog Design Note and
Application Notes are available on the Microchip web
site at www.microchip. com/appnotes and are
recommended as supplemental reference resources.
• ADN003: “Select the Right Operational Amplifier
for your Filtering Circuits”, DS21821
• AN722: “Operational Amplifier Topologies and DC
Specifications”, DS00722
• AN723: “Operational Amplifier AC Specifications
and Applications”, DS00723
• AN884: “Driving Capacitive Loads With Op
Amps”, DS00884
• AN990: “Analog Sensor Conditioning Circuits –
An Overview”, DS00990
• AN1177: “Op Amp Precision Design: DC Errors”,
DS01177
• AN1228: “Op Amp Precision Design: Random
Noise”, DS01228
• AN1332: “Current Sensing Circuit Concepts and
Fundamentals”, DS01332
These application notes and others are listed in the
design guide:
• “Signal Chain Design Guide”, DS21825
DS22142B-page 19
MCP6071/2/4
NOTES:
DS22142B-page 20
© 2010 Microchip Technology Inc.
MCP6071/2/4
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
5-Lead SOT-23 (MCP6071)
YH25
XXNN
8-Lead SOIC (150 mil) (MCP6071, MCP6072)
8-Lead 2x3 TDFN (MCP6071, MCP6072)
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Example:
MCP6071E
e3 1044
SN^^
256
XXXXXXXX
XXXXYYWW
NNN
XXX
YWW
NN
Example:
Example:
AHE
044
25
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2010 Microchip Technology Inc.
DS22142B-page 21
MCP6071/2/4
Package Marking Information (Continuation)
14-Lead SOIC (150 mil) (MCP6074)
Example:
MCP6074
E/SL e3
1044256
XXXXXXXXXXX
XXXXXXXXXXX
YYWWNNN
14-Lead TSSOP (MCP6074)
XXXXXXXX
YYWW
NNN
DS22142B-page 22
Example:
MCP6074E
1044
256
© 2010 Microchip Technology Inc.
MCP6071/2/4
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