MCP6L1T-E/MS

MCP6L1/1R/2/4 2.8 MHz, 200 µA Op Amps Features Description • • • • • • • The Microchip Technology Inc. MCP6L1/1R/2/4 family of operational amplifiers (op amps) supports generalpurpose applications. Battery powered circuits benefit from their low quiescent current, A/D converters from their wide bandwidth and anti-aliasing filters from their low input bias current. Supply Voltage: 2.7V to 6.0V Rail-to-Rail Output Input Range Includes Ground Available in SOT-23-5 Package Gain Bandwidth Product: 2.8 MHz (typical) Supply Current: IQ = 200 µA/Amplifier (typical) Extended Temperature Range: -40°C to +125°C Typical Applications • • • • • • Portable Equipment Photodiode Amplifier Analog Filters Data Acquisition Notebooks and PDAs Battery-Powered Systems Package Types MCP6L1 SOT-23-5 VOUT 1 SPICE Macro Model FilterLab® Software Microchip Advanced Part Selector (MAPS) Analog Demonstration and Evaluation Boards Application Notes Typical Application VIN+ 3 8 VDD 4 VIN- VINA- 2 VINA+ 3 7 VOUTB 6 VINB- VSS 4 SOIC, MSOP R2 29.4 k VIN 8 NC 7 VDD VOUTA 1 14 VOUTD VIN+ 3 6 VOUT 5 NC VINA- 2 VINA+ 3 13 VIND- VOUT 1 VOUT MCP6L4 SOIC, TSSOP NC 1 MCP6L1R MCP6L1 5 VINB+ VIN- 2 SOT-23-5 R1 18.2 k SOIC, MSOP VOUTA 1 MCP6L1 VSS 4 C1 1.0 µF MCP6L2 5 VDD VSS 2 Design Aids • • • • • This family has a 2.8 MHz Gain Bandwidth Product (GBWP) with a low 200 µA per amplifier quiescent current. These op amps operate on supply voltages between 2.7V and 6.0V, with rail-to-rail output swing. They are available in the extended temperature range. 5 VSS VDD 4 VINB+ 5 VINB- 6 VOUTB 7 12 VIND+ 11 VSS 10 VINC+ 9 VINC8 VOUTC VDD 2 VIN+ 3 4 VIN- C2 470 nF Low-Pass Filter  2009-2012 Microchip Technology Inc. DS22135C-page 1 MCP6L1/1R/2/4 NOTES: DS22135C-page 2  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 1.0 ELECTRICAL CHARACTERISTICS 1.1 Absolute Maximum Ratings † VDD – VSS .......................................................................7.0V Current at Input Pins ....................................................±2 mA Analog Inputs (VIN+, VIN-) †† ........ VSS – 1.0V to VDD + 1.0V All Inputs and Outputs ................... VSS – 0.3V to VDD + 0.3V Difference Input voltage ...................................... |VDD – VSS| Output Short Circuit Current ................................ Continuous Current at Output and Supply Pins ............................±30 mA Storage Temperature ...................................-65°C to +150°C Max. Junction Temperature ........................................ +150°C ESD Protection on All Pins (HBM, MM)  3 kV, 200V 1.2 † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those, or any other conditions above those indicated in the operational listings of this specification, is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. †† See Section 4.1.2 “Input Voltage and Current Limits”. Specifications TABLE 1-1: DC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = 5.0V, VSS = GND, VCM = VSS, VOUT  VDD/2, VL = VDD/2, and RL = 10 k to VL (refer to Figure 1-1). Sym Min (Note 1) Typ Max (Note 1) Units VOS -3 ±1 +3 mV VOS/TA — ±2.5 — PSRR — 90 — dB IB — 1 — pA Across Temperature IB — 20 — pA TA= +85°C Across Temperature IB — 500 — pA TA= +125°C Parameters Conditions Input Offset Input Offset Voltage Input Offset Voltage Drift Power Supply Rejection Ratio µV/°C TA= -40°C to+125°C Input Current and Impedance Input Bias Current Input Offset Current IOS — ±1 — pA Common-Mode Input Impedance ZCM — 1013||5 — ||pF Differential Input Impedance ZDIFF — 1013||2 — ||pF Common-Mode Input Voltage Range VCMR -0.3 — 3.7 V Common-Mode Rejection Ratio CMRR — 90 — dB VCM = -0.3V to 3.7V AOL — 105 — dB VOUT = 0.2V to 4.8V VOL — — 0.030 V G = +2, 0.5V Input Overdrive VOH 4.960 — — V G = +2, 0.5V Input Overdrive ISC — ±20 — mA VDD 2.7 — 6.0 V IQ 70 200 330 µA Common-Mode Open-Loop Gain DC Open-Loop Gain (large signal) Output Maximum Output Voltage Swing Output Short Circuit Current Power Supply Supply Voltage Quiescent Current per Amplifier Note 1: IO = 0 For design guidance only; not tested.  2009-2012 Microchip Technology Inc. DS22135C-page 3 MCP6L1/1R/2/4 TABLE 1-2: AC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = 25°C, VDD = +5.0V, VSS = GND, VCM = VSS, VOUT  VDD/2, VL = VDD/2, RL = 10 k to VL and CL = 60 pF (refer to Figure 1-1). Parameters Sym Min Typ Max Units Conditions GBWP — 2.8 — MHz Phase Margin PM — 50 — Slew Rate SR — 2.3 — Input Noise Voltage Eni — 7 — µVP-P Input Noise Voltage Density eni — 21 — nV/Hz f = 10 kHz Input Noise Current Density ini — 0.6 — fA/Hz f = 1 kHz AC Response Gain Bandwidth Product ° G = +1 (degree) V/µs Noise TABLE 1-3: f = 0.1 Hz to 10 Hz TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VDD = +2.7V to +6.0V, VSS = GND. Parameters Sym Min Typ Max Units Specified Temperature Range TA -40 — +125 °C Operating Temperature Range TA -40 — +125 °C Storage Temperature Range TA -65 — +150 °C Conditions Temperature Ranges (Note 1) Thermal Package Resistances Thermal Resistance, 5L-SOT-23 JA — 220.7 — °C/W Thermal Resistance, 8L-MSOP JA — 211 — °C/W Thermal Resistance, 8L-SOIC (150 mil) JA — 149.5 — °C/W Thermal Resistance, 14L-SOIC JA — 95.3 — °C/W Thermal Resistance, 14L-TSSOP JA — 100 — °C/W Note 1: 1.3 Operation must not cause TJ to exceed Maximum Junction Temperature specification (150°C). Test Circuit The circuit used for most DC and AC tests is shown in Figure 1-1. This circuit can independently set VCM and VOUT; see Equation 1-1. Note that VCM is not the circuit’s common-mode voltage ((VP + VM)/2) and that VOST includes VOS, plus the effects (on the input offset error, VOST) of temperature, CMRR, PSRR and AOL. CF 6.8 pF RG 100 k VP EQUATION 1-1: VDD VIN+ G DM = R F  R G V CM =  VP + VDD  2   2 V OST = V IN– – V IN+ V OUT =  V DD  2  +  V P – V M  + VOST  1 + G DM  Where: GDM = Differential-Mode Gain (V/V) VCM = Op Amp’s Common-Mode Input Voltage (V) VOST = Op Amp’s Total Input Offset Voltage RF 100 k (mV) CB1 100 nF MCP6LX VDD/2 CB2 1 µF VINVM RG 100 k RL 10 k RF 100 k CF 6.8 pF VOUT CL 60 pF VL FIGURE 1-1: AC and DC Test Circuit for Most Specifications. DS22135C-page 4  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25°C, VDD = 5.0V, VSS = GND, VCM = VSS, VOUT = VDD/2, VL = VDD/2, Representative Part VDD = 2.7V -40°C +25°C +85°C +125° C 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 1.5 -0.2 1.4 -0.3 1.3 -0.4 -0.5 1.0 -25 0 25 50 75 100 125 Ambient Temperature (°C) -50 100 CMRR, PSRR (dB) CMRR (VCMRL to VCMRH) 95 90 PSRR (VCM = VSS) 85 80 75 70 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 1.2 1.1 -50 -25 Common Mode Input Voltage (V) FIGURE 2-2: Input Offset Voltage vs. Common-Mode Input Voltage at VDD = 5.5V. 0 25 50 75 Ambient Temperature (°C) FIGURE 2-5: Temperature. 100 125 CMRR, PSRR vs. Ambient 100 Representative Part 90 CMRR, PSRR (dB) Input Offset Voltage (mV) VDD – VCMRH VCMRL – VSS FIGURE 2-4: Input Common-Mode Range Voltage vs. Ambient Temperature. -40°C +25°C +85°C +125° C -0.5 -0.1 3.0 Representative Part VDD = 5.5V 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 1.6 One Wafer Lot -0.6 0.0 0.5 1.0 1.5 2.0 2.5 Common Mode Input Voltage (V) FIGURE 2-1: Input Offset Voltage vs. Common-Mode Input Voltage at VDD = 2.7V. Input Offset Voltage (µV) 0.0 Common Mode Range; VDD – V CMRH (V) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 -0.5 Common Mode Range; VCMRL – V SS (V) Input Offset Voltage (mV) RL = 10 kto VL and CL = 60 pF. VDD = 5.5V VDD = 2.7V 80 PSRR+ 70 PSRR– 60 CMRR 50 40 30 -50 -25 0 25 50 75 Ambient Temperature (°C) 100 125 FIGURE 2-3: Input Offset Voltage vs. Ambient Temperature.  2009-2012 Microchip Technology Inc. 20 1 1.E+00 FIGURE 2-6: Frequency. 10 1.E+01 100 1k 1.E+02 1.E+03 Frequency (Hz) 10k 1.E+04 100k 1.E+05 CMRR, PSRR vs. DS22135C-page 5 MCP6L1/1R/2/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +5.0V, VSS = GND, VCM = VSS, VOUT = VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 60 pF. 1.E-02 10m 1m 1.E-03 100µ 1.E-04 10µ 1.E-05 1µ 1.E-06 100n 1.E-07 10n 1.E-08 1n 1.E-09 100p 1.E-10 10p 1.E-11 1p 1.E-12 Input, Output Voltages (V) Input Current Magnitude (A) 6 +125°C +85°C +25°C -40°C 3 2 1 0 0.E+00 5.E-06 100 -30 250 80 -60 40 Gain -90 -120 20 -150 0 -180 -20 0.1 1 10 1.E- 1.E+ 1.E+ 01 00 01 FIGURE 2-8: Frequency. Quiescent Current per amplifier (µA) 300 Phase 50 -40°C +25°C +85°C +125°C 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Power Supply Voltage (V) FIGURE 2-11: Quiescent Current vs. Power Supply Voltage. Short Circuit Current (mA) Input Noise Voltage Density (nV/Hz) 100 40 100 10 0.1 1 10 100 1.E+0 1k 10k 1.E+0 100k 1.E-01 1.E+0 1.E+0 1.E+0 1.E+0 0 1Frequency 2 (Hz) 3 4 5 DS22135C-page 6 3.E-05 150 0 1,000 FIGURE 2-9: vs. Frequency. 2.E-05 200 -210 100 1k 10k 100k 1M 10M 1.E+ 1.E+ 1.E+ 1.E+ 1.E+ 1.E+ Frequency (Hz) 02 03 04 05 06 07 Open-Loop Gain, Phase vs. 2.E-05 FIGURE 2-10: The MCP6L1/1R/2/4 Show No Phase Reversal. 0 60 1.E-05 Time (5 µs/div) 120 Open-Loop Phase (°) Open-Loop Gain (dB) FIGURE 2-7: Measured Input Current vs. Input Voltage (below VSS). VIN VOUT 4 -1 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 Input Voltage (V) G = +2 V/V 5 Input Noise Voltage Density 30 20 10 0 -10 -40°C +25°C +85°C +125°C -20 -30 -40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Power Supply Voltage (V) FIGURE 2-12: Output Short Circuit Current vs. Power Supply Voltage.  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +5.0V, VSS = GND, VCM = VSS, VOUT = VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 60 pF. 3.0 VDD – VOH IOUT 60 2.5 Slew Rate (V/µs) Ratio of Output Headroom to Output Current (mV/mA) 70 50 40 VOL – VSS -IOUT 30 20 1m 1.E-03 Output Current Magnitude (A) -50 10m 1.E-02 FIGURE 2-13: Ratio of Output Voltage Headroom to Output Current vs. Output Current. FIGURE 2-16: Temperature. 10 P-P ) G = +1 V/V Output Voltage Swing (V 2.56 2.54 2.52 2.50 2.48 2.46 2.44 2.42 1.E-06 -25 2.E-06 3.E-06 4.E-06 5.E-06 6.E-06 7.E-06 8.E-06 9.E-06 1.E-05 Time (1 µs/div) FIGURE 2-14: Pulse Response. Small Signal, Non-Inverting 5.0 0 25 50 75 100 125 Ambient Temperature (°C) 2.58 Output Voltage (20 mV/div) 1.0 0.0 0 100µ 1.E-04 Slew Rate vs. Ambient VDD = 5.5V VDD = 2.7V 1 0.1 10k 1.E+04 FIGURE 2-17: Frequency. 100k 1.E+05 Frequency (Hz) 1M 1.E+06 Output Voltage Swing vs. G = +1 V/V 4.5 Output Voltage (V) Rising Edge 1.5 0.5 10 0.E+00 Falling Edge 2.0 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.E+00 1.E-06 2. E-06 3.E-06 4.E-06 5. E-06 6.E-06 7. E-06 8.E -06 9.E-06 1. E-05 Time (1 µs/div) FIGURE 2-15: Pulse Response. Large Signal, Non-Inverting  2009-2012 Microchip Technology Inc. DS22135C-page 7 MCP6L1/1R/2/4 NOTES: DS22135C-page 8  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE MCP6L1 MCP6L1R MCP6L2 MCP6L4 SOT-23-5 SOIC-8, MSOP-8 SOT-23-5 SOIC-8, MSOP-8 SOIC-14, TSSOP-14 Symbol 1 4 3 5 — — — — — — 2 — — — — 6 2 3 7 — — — — — — 4 — — — 1, 5, 8 1 4 3 2 — — — — — — 5 — — — — 1 2 3 8 5 6 7 — — — 4 — — — — 1 2 3 4 5 6 7 8 9 10 11 12 13 14 — VOUT, VOUTA VIN-, VINAVIN+, VINA+ VDD VINB+ VINBVOUTB VOUTC VINCVINC+ VSS VIND+ VINDVOUTD NC 3.1 Analog Outputs The analog output pins (VOUT) are low-impedance voltage sources. 3.2 Analog Inputs The non-inverting and inverting inputs (VIN+, VIN-, …) are high-impedance CMOS inputs with low bias currents.  2009-2012 Microchip Technology Inc. 3.3 Description Output (op amp A) Inverting Input (op amp A) Non-Inverting Input (op amp A) Positive Power Supply Non-Inverting Input (op amp B) Inverting Input (op amp B) Output (op amp B) Output (op amp C) Inverting Input (op amp C) Non-Inverting Input (op amp C) Negative Power Supply Non-Inverting Input (op amp D) Inverting Input (op amp D) Output (op amp D) No Internal Connection Power Supply Pins The positive power supply (VDD) is 2.7V to 6.0V higher than the negative power supply (VSS). For normal operation, the other pins are between VSS and VDD. Typically, these parts are used in a single (positive) supply configuration. In this case, VSS is connected to ground and VDD is connected to the supply. VDD will need bypass capacitors. DS22135C-page 9 MCP6L1/1R/2/4 NOTES: DS22135C-page 10  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 4.0 APPLICATION INFORMATION The MCP6L1/1R/2/4 family of op amps is manufactured using Microchip’s state of the art CMOS process. They are unity gain stable and suitable for a wide range of general purpose applications. 4.1 Inputs 4.1.1 PHASE REVERSAL The MCP6L1/1R/2/4 op amps are designed to prevent phase inversion when the input pins exceed the supply voltages. Figure 2-10 shows an input voltage exceeding both supplies without any phase reversal. 4.1.2 4.1.3 NORMAL OPERATION The Common-Mode Input Voltage Range (VCMR) includes ground in single-supply systems (VSS), but does not include VDD. This means that the amplifier input behaves linearly as long as the Common-Mode Input Voltage (VCM) is kept within the VCMR limits (typically VSS – 0.3V to VDD – 1.3V at +25°C). Figure 4-3 shows a unity gain buffer. Since VOUT is the same voltage as the inverting input, VOUT must be kept below VDD – 1.2V (typically) for correct operation. V1 In order to prevent damage and/or improper operation of these amplifiers, the circuit they are in must limit the currents (and voltages) at the input pins (see Section 1.1 “Absolute Maximum Ratings †”). Figure 4-1 shows the recommended approach to protecting these inputs. The internal ESD diodes prevent the input pins (VIN+ and VIN-) from going too far below ground, and the resistors, R1 and R2, limit the possible current drawn out of the input pins. Diodes, D1 and D2, prevent the input pins (VIN+ and VIN-) from going too far above VDD, and dump any currents onto VDD. VDD D1 V1 V2 R1 D2 MCP6LX R2 R3 VSS – (minimum expected V1) 2 mA VSS – (minimum expected V2) R2 > 2 mA V2 MCP6LX INPUT VOLTAGE AND CURRENT LIMITS FIGURE 4-2: Unity Gain Buffer has a Limited VOUT Range. 4.2 Rail-to-Rail Output The output voltage range of the MCP6L1/1R/2/4 op amps is VDD – 35 mV (minimum) and VSS + 35 mV (maximum) when RL = 10 k is connected to VDD/2 and VDD = 5.0V. Refer to Figure 2-13 for more information. 4.3 Capacitive Loads Driving large capacitive loads can cause stability problems for voltage feedback op amps. As the load capacitance increases, the feedback loop’s phase margin decreases and the closed-loop bandwidth is reduced. This produces gain peaking in the frequency response, with overshoot and ringing in the step response. When driving large capacitive loads with these op amps (e.g., > 100 pF when G = +1), a small series resistor at the output (RISO in Figure 4-3) improves the feedback loop’s stability by making the output load resistive at higher frequencies; the bandwidth will usually be decreased. R1 > FIGURE 4-1: Inputs. Protecting the Analog A significant amount of current can flow out of the inputs (through the ESD diodes) when the commonmode voltage (VCM) is below ground (VSS); see Figure 2-7. Applications that are high-impedance may need to limit the usable voltage range.  2009-2012 Microchip Technology Inc. RG RF RISO VOUT CL RN MCP6LX FIGURE 4-3: Output Resistor, RISO, Stabilizes Large Capacitive Loads. Bench measurements are helpful in choosing RISO. Adjust RISO so that a small signal step response (see Figure 2-14) has reasonable overshoot (e.g., 4%). DS22135C-page 11 MCP6L1/1R/2/4 4.4 Supply Bypass 1. Inverting Amplifiers (Figure 4-5) and Transimpedance Gain Amplifiers (convert current to voltage, such as photo detectors). a) Connect the guard ring to the non-inverting input pin (VIN+); this biases the guard ring to the same reference voltage as the op amp’s input (e.g., VDD/2 or ground). b) Connect the inverting pin (VIN-) to the input with a wire that does not touch the PCB surface. Non-Inverting Gain and Unity Gain Buffer. a) Connect the guard ring to the inverting input pin (VIN-); this biases the guard ring to the common-mode input voltage. b) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. With this family of operational amplifiers, the power supply pin (VDD for single supply) should have a local bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good high-frequency performance. It also needs a bulk capacitor (i.e., 1 µF or larger) within 100 mm to provide large, slow currents. This bulk capacitor can be shared with other nearby analog parts. 4.5 Unused Op Amps 2. An unused op amp in a quad package (e.g., MCP6L4) should be configured, as shown in Figure 4-4. These circuits prevent the output from toggling and causing crosstalk. Circuit A sets the op amp at its minimum noise gain. The resistor divider produces any desired reference voltage within the output voltage range of the op amp; the op amp buffers that reference voltage. Circuit B uses the minimum number of components and operates as a comparator, but it may draw more current. ¼ MCP6L4 (A) ¼ MCP6L4 (B) VDD VDD R1 VDD 4.7.1 Application Circuits ACTIVE LOW-PASS FILTER Figure 4-6 shows a second-order Butterworth filter, with a 10 Hz cutoff frequency and a gain of +1 V/V, using a Sallen Key topology. Microchip’s FilterLab® software designed the filter, then the capacitors were reduced in value (using the same program). VREF R2 V REF FIGURE 4-4: 4.6 4.7 R2 = VDD  ------------------R1 + R 2 R1 18.2 k VIN VOUT Unused Op Amps. C2 470 nF PCB Surface Leakage In applications where low input bias current is critical, the PCB (Printed Circuit Board) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5 pA of current to flow; this is greater than this family’s bias current at +25°C (1 pA, typical). FIGURE 4-6: VIN- VIN+ DS22135C-page 12 Sallen Key Topology. R2 25.5 k R1 54.9 k C1 220 nF R3 25.5 k VIN MCP6L1 VOUT C2 820 nF FIGURE 4-7: FIGURE 4-5: MCP6L1 Figure 4-7 shows a filter with the same requirements, except the gain is -1 V/V, in a Multiple Feedback Topology. It was designed in a similar fashion using FilterLab. The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. Figure 4-5 shows an example of this type of layout. Guard Ring C1 R2 1.0 µF 29.4 k VDD/2 Multiple Feedback Topology. Example Guard Ring Layout.  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 5.0 DESIGN AIDS Microchip provides the basic design aids needed for the MCP6L1/1R/2/4 family of op amps. 5.1 SPICE Macro Model The latest SPICE macro model for the MCP6L1/1R/2/4 op amp is available on the Microchip web site at www.microchip.com. The model was written and tested in official Orcad (Cadence) owned PSPICE. For other simulators, translation may be required. The model covers a wide aspect of the op amp’s electrical specifications. Not only does the model cover voltage, current and resistance of the op amp, but it also covers the temperature and noise effects on the behavior of the op amp. The model has not been verified outside of the specification range listed in the op amp data sheet. The model behaviors under these conditions cannot be ensured to match the actual op amp performance. Moreover, the model is intended to be an initial design tool. Bench testing is a very important part of any design and cannot be replaced with simulations. Also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. 5.2 FilterLab® Software 5.4 Analog Demonstration and Evaluation Boards Microchip offers a broad spectrum of analog demonstration and evaluation boards that are designed to help customers achieve faster time to market. For a complete listing of these boards and their corresponding user’s guides and technical information, visit the Microchip web site at: www.microchip.com/analog tools. Some boards that are especially useful are: • • • • • • • MCP6XXX Amplifier Evaluation Board 1 MCP6XXX Amplifier Evaluation Board 2 MCP6XXX Amplifier Evaluation Board 3 MCP6XXX Amplifier Evaluation Board 4 Active Filter Demo Board Kit P/N VSUPEV2: 5/6-Pin SOT-23 Evaluation Board P/N SOIC8EV: 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board • P/N SOIC14EV: 14-Pin SOIC/TSSOP/DIP Evaluation Board 5.5 Application Notes The following Microchip Application Notes are available on the Microchip web site at: www.microchip.com/appnotes and are recommended as supplemental reference resources. Microchip’s FilterLab software is an innovative software tool that simplifies analog active filter (using op amps) design. Available at no cost from the Microchip web site at www.microchip.com/filterlab, the Filter-Lab design tool provides full schematic diagrams of the filter circuit with component values. It also outputs the filter circuit in SPICE format, which can be used with the macro model to simulate actual filter performance. ADN003: “Select the Right Operational Amplifier for your Filtering Circuits”, DS21821 5.3 AN990: “Analog Sensor Conditioning Circuits – An Overview”, DS00990 Microchip Advanced Part Selector (MAPS) AN722: “Operational Amplifier Topologies and DC Specifications”, DS00722 AN723: “Operational Amplifier AC Specifications and Applications”, DS00723 AN884: “Driving Capacitive Loads With Op Amps”, DS00884 MAPS is a software tool that helps efficiently identify Microchip devices that fit a particular design requirement. Available at no cost from the Microchip web site at www.microchip.com/maps, the MAPS is an overall selection tool for Microchip’s product portfolio that includes Analog, Memory, MCUs and DSCs. Using this tool, a customer can define a filter to sort features for a parametric search of devices and export side-byside technical comparison reports. Helpful links are also provided for data sheets, purchasing and sampling of Microchip parts.  2009-2012 Microchip Technology Inc. DS22135C-page 13 MCP6L1/1R/2/4 NOTES: DS22135C-page 14  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 6.0 PACKAGING INFORMATION 6.1 Package Marking Information Example: 5-Lead SOT-23 (MCP6L1, MCP6L1R) Device Code MCP6L1 WCNN MCP6L1R WDNN Note: Applies to 5-Lead SOT-23. 8-Lead MSOP (MCP6L1, MCP6L2) WC25 Example: 6L2E 14526 8-Lead SOIC (150 mil)(MCP6L1, MCP6L2) NNN Legend: XX...X Y YY WW NNN e3 * Note: Example: MCP6L2E SN 3 1145 256 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.  2009-2012 Microchip Technology Inc. DS22135C-page 15 MCP6L1/1R/2/4 Package Marking Information (Continued) 14-Lead SOIC (150 mil) (MCP6L4) Example: MCP6L4 E/SL 3 1145256 14-Lead TSSOP (MCP6L4) Example: XXXXXXXX YYWW NNN 6L4E Legend: XX...X Y YY WW NNN Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. e3 * Note: DS22135C-page 16 1145 256 In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4        0$ !$% $ 1 "/!2  ! ! $  31 &$$ "$ $$ ,44/// 4 1 b N E E1 3 2 1 e e1 D A2 A c φ A1 L L1 5$!  !6$! 7%: &3! 66## 7 78 9 7 ) 6 "3$ )*+ 8%$!" 6 "3$  8- ; $   = " "31 1 !!  ? =  $"&&   = ) 8- @"$ #  =  " "31 @"$ #  = ? 8- 6 $   =  *+ ) 0$6 $ 6  = B 0$ $ 6 ) = ? 0$  D = D 6 "1 !!  ? = B 6 "@"$ :  = )    !!"#"$%" "&! $%!!"&! $%!!!$ ' " !"    !"$  #() *+, *! !  $ '$-% !//$%$$  !    / + *  2009-2012 Microchip Technology Inc. DS22135C-page 17 MCP6L1/1R/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22135C-page 18  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2009-2012 Microchip Technology Inc. DS22135C-page 19 MCP6L1/1R/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22135C-page 20  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2009-2012 Microchip Technology Inc. DS22135C-page 21 MCP6L1/1R/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22135C-page 22  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2009-2012 Microchip Technology Inc. DS22135C-page 23 MCP6L1/1R/2/4      !"#$%&'()  0$ !$% $ 1 "/!2  ! ! $  31 &$$ "$ $$ ,44/// 4 1 DS22135C-page 24  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2009-2012 Microchip Technology Inc. DS22135C-page 25 MCP6L1/1R/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22135C-page 26  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4  0$ !$% $ 1 "/!2  ! ! $  31 &$$ "$ $$ ,44/// 4 1  2009-2012 Microchip Technology Inc. DS22135C-page 27 MCP6L1/1R/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22135C-page 28  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2009-2012 Microchip Technology Inc. DS22135C-page 29 MCP6L1/1R/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22135C-page 30  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 APPENDIX A: REVISION HISTORY Revision C (January 2012) The following is the list of modifications: 1. 2. 3. Corrected CMRR value condition in Table 1-1. Updated packages temperature values in Table 1-3. Corrected values in first paragraph of Section 4.1.3 “Normal Operation”. Revision B (September 2011) The following is the list of modifications: 1. 2. 3. Updated Section 3.0 “Pin Descriptions”. Updated the value for the Current at Output and Supply Pins parameter in Section 1.1 “Absolute Maximum Ratings †”. Added Section 5.1 “SPICE Macro Model”. Revision A (March 2009) • Original Release of this Document.  2009-2012 Microchip Technology Inc. DS22135C-page 31 MCP6L1/1R/2/4 NOTES: DS22135C-page 32  2009-2012 Microchip Technology Inc. MCP6L1/1R/2/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X /XX Device Temperature Range Package Device: MCP6L1T: MCP6L1RT: MCP6L2T: MCP6L4T: Single Op Amp (Tape and Reel) (SOT-23, MSOP, SOIC) Single Op Amp (Tape and Reel) (SOT-23) Dual Op Amp (Tape and Reel) (SOIC, MSOP) Quad Op Amp (Tape and Reel) (SOIC, TSSOP) Temperature Range: E = -40°C to +125°C Package: OT MS SN SL ST = = = = = Plastic Small Outline Transistor (SOT-23), 5-lead Plastic MSOP, 8-lead Plastic SOIC, (3.99 mm body), 8-lead Plastic SOIC (3.99 mm body), 14-lead Plastic TSSOP (4.4mm body), 14-lead  2009-2012 Microchip Technology Inc. Examples: a) MCP6L1T-E/OT: Tape and Reel, Extended Temperature, 5LD SOT-23 package b) MCP6L1T-E/MS: Tape and Reel, Extended Temperature, 8LD MSOP package. c) MCP6L1T-E/SN: Tape and Reel, Extended Temperature, 8LD SOIC package. a) MCP6L1RT-E/OT:Tape and Reel, Extended Temperature, 5LD SOT-23 package. a) MCP6L2T-E/MS: Tape and Reel, Extended Temperature, 8LD MSOP package. b) MCP6L2T-E/SN: Tape and Reel, Extended Temperature, 8LD SOIC package. a) MCP6L4T-E/SL: Tape and Reel, Extended Temperature, 14LD SOIC package. b) MCP6L4T-E/ST: Tape and Reel, Extended Temperature, 14LD TSSOP package. DS22135C-page 33 MCP6L1/1R/2/4 NOTES: DS22135C-page 34  2009-2012 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2009-2012, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-61341-923-6 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.  2009-2012 Microchip Technology Inc. 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