MD1812
High-Speed Quad-MOSFET Driver
Features
General Description
•
•
•
•
•
•
•
The MD1812 is a high-speed quad-MOSFET driver
designed to drive two P-channel and two N-channel
high-voltage MOSFETs for medical ultrasound
applications and other applications requiring a
high-output current for a capacitive load. The input
stage of the MD1812 is a high-speed level translator
that is able to operate from logic input signals of 1.8V
to 5V amplitude. An adaptive threshold circuit is used
to set the level translator switch threshold to the
average of the input logic 0 and logic 1 levels. The
level translator uses a proprietary circuit which
provides DC coupling together with high-speed
operation.
•
•
•
•
•
6 ns Rise and Fall Time
2A Peak Output Source and Sink Currents
1.8V to 5V Input CMOS Compatible
Smart Logic Threshold
Low-jitter Design
Four Matched Channels
Drives Two P-channel and Two N-channel
MOSFETs
Outputs can Swing below Ground
Built-in Level Translator for Negative Gate Bias
User-defined damping for Return-to-zero
Application
Low-inductance Quad-flat No-lead Package
High-performance Thermally Enhanced Package
Applications
•
•
•
•
•
•
Ultrasound PN Code Transmitter
Medical Ultrasound Imaging
Piezoelectric Transducer Drivers
Non-destructive Testing
High-speed Level Translator
High-voltage Bipolar Pulser
The output stage of the MD1812 has separate power
connections, enabling the output signal L and H levels
to be chosen independently from the supply voltages
used for the majority of the circuit. As an example, the
input logic levels may be 0V and 1.8V, the control logic
may be powered by +5V and –5V, and the
output L and H levels may be varied anywhere over the
range of –5V to +5V. The output stage is capable of
peak currents of up to ±2A, depending on the supply
voltages used and load capacitance present.
The OE pin serves a dual purpose. First, its logic
H level is used to compute the threshold voltage level
for the channel input level translators. Second, when
OE is low, the outputs are disabled, with the A and C
outputs high and the B and D outputs low. This assists
in properly pre-charging the AC coupling capacitors
that may be used in series in the gate drive circuit of an
external PMOS and NMOS transistor pair. A built-in
level shifter provides PMOS gate negative bias drive.
This enables the user-defined damping control to
generate return-to-zero bipolar output pulses.
Package Type
16-lead QFN
(Top view)
1
See Table 2-1 for pin information.
2017 Microchip Technology Inc.
DS20005746A-page 1
MD1812
Functional Block Diagram
+10V
+10V
0.22 µF
OE
0.47µF
VDD
VH
MD1812
OUTA
INA
OUTB
INB
Logic
Inputs
OUTG
LT
INC
OUTC
OUTD
IND
GND
V SS
VL
VNEG
-8V
0.47µF
DS20005746A-page 2
2017 Microchip Technology Inc.
MD1812
Typical Application Circuit
+10V
+100V
+10V
0.22μF
1.0μF
0.47μF
VDD
VH
10nF
OE
OUTA
INA
OUTB
3.3V CMOS
Logic Inputs
10nF
-100V
INB
1.0μF
TC6320
OUTG
LT
2kΩ
OUTC
INC
OUTD
IND
GND
VSS
VL
VNEG
10nF
-8V
MD1812
0.47μF
TC2320
2017 Microchip Technology Inc.
DS20005746A-page 3
MD1812
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Supply Voltage, VDD–VSS...................................................................................................................... –0.5V to +13.5V
Output High Supply Voltage, VH ................................................................................................... VL–0.5V to VDD +0.5V
Output Low Supply Voltage, VL .................................................................................................... VSS–0.5V to VH +0.5V
Low-side Supply Voltage, VSS .................................................................................................................... –7V to +0.5V
Supply Voltage, VDD–VNEG ...................................................................................................................... –0.5V to +20V
Negative Supply Voltage, VNEG–VSS ......................................................................................... VSS–10V to VSS +0.5V
Logic Input Levels ....................................................................................................................... VSS–0.5V to GND +7V
Operating Junction Temperature, TJ .................................................................................................... –25°C to +125°C
Storage Temperature, TS...................................................................................................................... –65°C to +150°C
Power Dissipation .................................................................................................................................................. 2.2W
ESD Rating (Note 1) ................................................................................................................................ ESD Sensitive
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
Note 1: Device is ESD sensitive. Handling precautions are recommended.
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: VH = VDD = 12V, VL = VSS = GND = 0V, VNEG = –6V, VOE = 3.3V and TJ = 25°C
Parameter
Sym.
Min.
Typ.
Max.
Unit
Supply Voltage
VDD–VSS
4.5
—
13
V
Supply Voltage
VDD–VNEG
—
—
18
V
Low-side Supply Voltage
VSS
–5.5
—
0
V
Output High Supply Voltage
VH
VSS +2
—
VDD
V
Output Low Supply Voltage
VL
VSS
—
VDD–
2
V
Negative Supply Voltage
VNEG
–9
—
VSS–2
V
VDD Quiescent Current
IDDQ
—
1.5
—
mA
VH Quiescent Current
IHQ
—
—
10
µA
INEGQ
—
150
—
µA
VDD Average Current
IDD
—
7
—
mA
VH Average Current
IH
—
22
—
mA
VNEG Quiescent Current
VNEG Average Current
INEG
—
1.5
—
mA
Input Logic Voltage High
VIH
VOE–0.3
—
5
V
Input Logic Voltage Low
VIL
0
—
0.3
V
Input Logic Current High
IIH
—
—
1
µA
Input Logic Current Low
IIL
—
—
1
µA
OE Input Logic Voltage High
VIH
1.7
—
5
V
OE Input Logic Voltage Low
VIL
0
—
0.3
V
OE Input Resistance
RIN
10
20
30
kΩ
CIN
—
5
10
pF
—
—
12.5
—
—
200
—
—
12.5
—
—
200
Logic Input Capacitance
Output Sink Resistance
Output Source
Resistance
DS20005746A-page 4
OUTA-D
OUTG
OUTA-D
OUTG
RSINK
RSOURCE
Ω
Ω
Conditions
2.5V ≤ VDD ≤ 13V
May be connected to VSS
if OUTG is not used
No input transitions,
OE = 1
One channel on at 5
MHz,
no load
For logic inputs INA, INB,
INC and IND
For logic input OE
ISINK = 50 mA
ISINK = 5 mA
ISOURCE = 50 mA
ISOURCE = 5 mA
2017 Microchip Technology Inc.
MD1812
DC ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: VH = VDD = 12V, VL = VSS = GND = 0V, VNEG = –6V, VOE = 3.3V and TJ = 25°C
Parameter
Peak Output Sink Current
Peak Output Source Current
Sym.
Min.
Typ.
Max.
Unit
ISINK
—
2
—
A
ISOURCE
—
2
—
A
Conditions
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: VH = VDD = 12V, VL = VSS = GND = 0V, VNEG = –6V, VOE = 3.3V and TA = 25°C
Parameter
Sym.
Min.
Typ.
Max.
Unit
tirf
—
—
10
ns
Logic input edge speed
requirement
Propagation Delay INC to OUTG
tPCG
—
40
—
ns
10 MΩ load to GND
Propagation Delay when Output is
from Low to High for OUTA-D
tPLH
—
7
—
ns
Propagation Delay when Output is
from High to Low for OUTA-D
tPHL
—
7
—
ns
tr
—
6
—
ns
Input or OE Rise and Fall Time
Output Rise Time
Output Fall Time
tf
—
6
—
ns
Rise and Fall Time Matching
l tr–tf l
—
1
—
ns
Propagation Low-to-high and
High-to-low Matching
l tPLH–tPHL l
—
1
—
ns
Propagation Delay Matching
∆tdm
—
±2
—
ns
tOE_ON
—
200
—
ns
tOE_OFF
—
9
—
ns
Output Enable Time
Conditions
CLOAD = 1000 pF, input signal
rise/fall time of 2 ns
For each channel
Device-to-device delay match
TEMPERATURE SPECIFICATIONS
Parameter
Sym.
Min.
Typ.
Max.
Unit
Operating Junction Temperature
TJ
–25
—
125
°C
Storage Temperature
TS
–65
—
150
°C
JA
—
25
—
°C/W
Conditions
TEMPERATURE RANGE
PACKAGE THERMAL RESISTANCE
16-lead QFN
Note 1:
Note 1
1 oz. 4-layer 3” x 4” PCB
2017 Microchip Technology Inc.
DS20005746A-page 5
MD1812
Timing Diagram
INPUT
50%
50%
tPHL
tPLH
90%
90%
OUTPUT
10%
10%
tr
TABLE 1-1:
tf
TRUTH FUNCTION TABLE
Logic Inputs
Outputs
OE
INA
INB
OUTA
OUTB
H
L
L
VH
VH
H
L
H
VH
VL
H
H
L
VL
VH
H
H
H
VL
VL
L
X
X
VH
VL
OE
INC
IND
OUTC
OUTG
OUTD
H
L
L
VH
VSS
VH
H
L
H
VH
VSS
VL
H
H
L
VL
VNEG
VH
H
H
H
VL
VNEG
VL
L
X
X
VH
VSS
VL
DS20005746A-page 6
2017 Microchip Technology Inc.
MD1812
2.0
PIN DESCRIPTION
The details on the pins of MD1812 are listed on
Table 2-1. See Package Type for the location of pins.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number
Pin Name
1
INB
Logic input. Controls OUTB when OE is high.
2
VL
Supply voltage for N-channel output stage
3
GND
4
VNEG
5
INC
Description
Device ground
Supply voltage for the auxiliary gate drive (Note 1)
Logic input. Controls OUTC when OE is high.
6
IND
Logic input. Controls OUTD when OE is high.
7
VSS
Supply voltage for low-side analog, level shifter and gate drive circuit
8
OUTD
Output driver
9
OUTC
Output driver
10
OUTG
Auxiliary output driver
11
VH
12
OUTB
Output driver
13
OUTA
Output driver
14
VDD
Supply voltage for high-side analog, level shifter and gate drive circuit
15
INA
Logic input. Controls OUTA when OE is high.
16
OE
Output enable logic input
Supply voltage for P-channel output stage
Note 1: Thermal pad and pin 4, VNEG must be connected externally.
2017 Microchip Technology Inc.
DS20005746A-page 7
MD1812
3.0
APPLICATION INFORMATION
For proper operation of the MD1812, low-inductance
bypass capacitors should be used on the various
supply pins. The GND input pin should be connected to
the logic ground. The INA, INB, INC, IND and OE pins
should be connected to a logic source with a swing of
GND to VCC, where VCC is 1.8V to 5V. When the input
logic(s) is high, the output(s) will swing to VL, and when
the input(s) logic is low, the output(s) will swing to VH.
All inputs must be kept low until the device is powered
up. Good trace practices should be followed
corresponding to the desired operating speed. The
internal circuitry of the MD1812 is capable of operating
up to 100 MHz, with the primary speed limitation being
the loading effect of the load capacitance. Because of
this speed and the high transient currents due to the
capacitive loads, the bypass capacitors should be as
close to the chip pins as possible. Unless the load
specifically requires bipolar drive, the VSS and VL pins
should have a low-inductance bypass capacitor to
GND and supply power connections. If these voltages
are not zero, they need bypass capacitors in a manner
similar to the positive power supplies. The power
connection VDD should have a ceramic bypass
capacitor to the ground plane with short leads and
decoupling components to prevent resonance in the
power leads.
Ensure that parasitic couplings are minimized from the
driver output to the input signal terminals. The parasitic
feedback may cause oscillations or spurious waveform
shapes on the edges of signal transitions. Since the
input operates with signals down to 1.8V, even small
coupled voltages may cause problems. The use of a
solid ground plane and good power and signal layout
practices will prevent this problem. Make sure that the
circulating ground return current from a capacitive load
will not react with common inductance and cause noise
voltages in the input logic circuitry. Best timing
performance is obtained for OUTC when the voltage of
VSS–VNEG = VH–VL.
Output drivers OUTA and OUTC drive the gate of an
external P-channel MOSFET, while output drivers
OUTB and OUTD drive the gate of an external
N-channel MOSFET, and they all swing from VH to VL.
The auxiliary output drive, OUTG, swings from VSS to
VNEG and drives the gate of an external P-channel
MOSFET through a 2 kΩ series resistor.
The voltages of VH and VL decide the output logic
levels. These two pins can draw fast transient currents
of up to 2A, so they should be provided with a suitable
bypass capacitor located next to the chip pins.
A ceramic capacitor of up to 1 µF may be appropriate,
with a series ferrite bead to prevent resonance in the
power supply lead going to the capacitor. Pay particular
attention to minimizing trace lengths, current loop area
and using sufficient trace width to reduce inductance.
Surface-mount components are highly recommended.
Since the output impedance of this driver is very low, in
some cases, it may be desirable to add a small series
resistor in series with the output signal to obtain better
waveform transitions at the load terminals. This will
reduce the output voltage slew rate at the terminals of
a capacitive load.
The OE pin sets the threshold level of logic for inputs
(VOE + VGND)/2. When OE is low, OUTA and OUTC are
at VH, while OUTB and OUTD are at VL. Auxiliary
output OUTG is at VSS, regardless of the inputs INA
and INB.
DS20005746A-page 8
2017 Microchip Technology Inc.
MD1812
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
16-lead QFN
XXXXXX
XXXXXX
e3 YYWW
NNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Example
MD
1812K6
e3 1710
265
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available characters
for product code or customer-specific information. Package may or not include
the corporate logo.
2017 Microchip Technology Inc.
DS20005746A-page 9
MD1812
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
DS20005746A-page 10
2017 Microchip Technology Inc.
MD1812
APPENDIX A:
REVISION HISTORY
Revision A (May 2017)
• Converted Supertex Doc# DSFP-MD1812 to
Microchip DS20005746A
• Changed the package marking format
• Changed the quantity of the 16-lead QFN K6
package from 3000/Reel to 3300/Reel
• Made minor text changes throughout the document
2017 Microchip Technology Inc.
DS20005746A-page 11
MD1812
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
XX
PART NO.
-
Package
Options
Device
X
-
Environmental
X
Media Type
Device:
MD1812
=
High-Speed Quad-MOSFET Driver
Package:
K6
=
16-lead QFN
Environmental:
G
=
Lead (Pb)-free/RoHS-compliant Package
Media Type:
(blank)
=
3300/Reel for a K6 Package
DS20005746A-page 12
Example:
a) MD1812K6-G:
High-Speed Quad-MOSFET
Driver, 16-lead QFN,
3300/Reel
2017 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
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Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
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•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
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Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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© 2017, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-1699-9
== ISO/TS 16949 ==
2017 Microchip Technology Inc.
DS20005746A-page 13
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DS20005746A-page 14
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Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
France - Saint Cloud
Tel: 33-1-30-60-70-00
Germany - Garching
Tel: 49-8931-9700
Germany - Haan
Tel: 49-2129-3766400
Germany - Heilbronn
Tel: 49-7131-67-3636
Germany - Karlsruhe
Tel: 49-721-625370
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Germany - Rosenheim
Tel: 49-8031-354-560
Israel - Ra’anana
Tel: 972-9-744-7705
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Italy - Padova
Tel: 39-049-7625286
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Norway - Trondheim
Tel: 47-7289-7561
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
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Tel: 886-7-213-7830
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Poland - Warsaw
Tel: 48-22-3325737
Romania - Bucharest
Tel: 40-21-407-87-50
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Sweden - Gothenberg
Tel: 46-31-704-60-40
Sweden - Stockholm
Tel: 46-8-5090-4654
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
2017 Microchip Technology Inc.
11/07/16
